UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG DISPLAY CO., LTD. AND DELL INC.,
`Petitioners,
`
`v.
`
`SOLAS OLED LTD.,
`Patent Owner.
`____________
`
`Case No. IPR2020-00140
`U.S. Patent No. 6,072,450
`____________
`
`DECLARATION OF RICHARD A. FLASCK
`IN SUPPORT OF PATENT OWNER’S RESPONSE
`
`Solas Ex. 2001 - 1 of 35
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`
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG DISPLAY CO., LTD. AND DELL INC.,
`Petitioners,
`
`v.
`
`SOLAS OLED LTD.,
`Patent Owner.
`____________
`
`Case No. IPR2020-00140
`U.S. Patent No. 6,072,450
`____________
`
`DECLARATION OF RICHARD A. FLASCK
`IN SUPPORT OF PATENT OWNER’S RESPONSE
`
`Solas Ex. 2001 - 1 of 35
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`Case No. IPR2020-00140
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`TABLE OF CONTENTS
`
`INTRODUCTION .................................................................. 1
`I.
`BACKGROUND AND QUALIFICATIONS ............................ 2
`II.
`III. SUMMARY OF THE ’450 PATENT ...................................... 5
`The Prosecution History of the ’450 patent .................................... 8
`A.
`IV. LEVEL OF ORDINARY SKILL IN THE ART ....................... 9
`V. UNDERSTANDING OF THE LAW ..................................... 11
`A.
`Claim Construction ....................................................................... 11
`B.
`Anticipation ................................................................................... 12
`C.
`Obviousness .................................................................................. 13
`VI. CLAIM CONSTRUCTION ................................................... 15
`VII. PATENTABILITY OVER UTSUGI AND OVER
`COMBINATIONS WITH UTSUGI ....................................... 17
`A.
`contact hole” ................................................................................. 18
`B.
`drive transistor” ............................................................................. 22
`C.
`constant voltage is applied to said second electrode” ................... 22
`
`Limitation 1[c]: “an insulation film formed over said substrate so
`as to cover said active elements, said insulation having at least one
`
`Limitations 4[a] / 4[b]: “The display apparatus according to claim
`1, wherein said active elements are a selection transistor . . . and a
`
`Claim 8: “The display apparatus according to claim 1, wherein a
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`D.
`correspondence with said drive transistors” .................................. 25
`E.
`data to said data lines” .................................................................. 28
`VIII. CONCLUSION .................................................................... 31
`
`Limitation 15[f]: “an insulation film formed over said substrate so
`as to cover said drive transistors, said address lines and said data
`lines, said insulation film having contact holes formed in
`
`Limitation 15[j]: “a first driver circuit for selectively supplying
`said address signal to said address lines in sequence; and” /
`Limitation 15[k]: “a second driver circuit for supplying said image
`
`
`
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`ii
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`I, Richard A. Flasck, a resident of San Ramon, California, declare as
`
`follows:
`
`I.
`
`1.
`
`INTRODUCTION
`
`I have been retained by Patent Owner Solas OLED Ltd. (“Solas” or
`
`“Patent Owner”) through RAF Electronics Corp. to provide my opinions with
`
`respect to their Response to the Petition for Inter Partes Review in IPR2020-
`
`00140 (“Petition” or “Pet.”) as to U.S. Patent No. 6,072,450 (“’450 patent,”
`
`Exhibit 1001). I have no interest in the outcome of this proceeding and my
`
`compensation is in no way contingent on my providing any particular opin-
`
`ions.
`
`2.
`
`As part of this engagement, I have been asked to provide my opinions
`
`regarding whether claims 1–9, 11–13, and 15–18 (“Challenged Claims”) are
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`invalid as anticipated and/or obvious to a person having ordinary skill in the
`
`part (“POSITA”) as of the earliest claimed priority date, specifically with ref-
`
`erence to the arguments made by Apple Inc. in its Petition for Inter Partes
`
`Review (“Petition”) regarding U.S. Patent No. 5,670,792 (Ex. 1003,
`
`“Utsugi”), Japanese patent application JPH053079 (Ex. 1004, “Manabe”) and
`
`PCT patent publication WO 96/25020 (Ex. 1005, “Eida”).
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`3.
`
`In preparing this Declaration, I have reviewed the Petition, the Institu-
`
`tion Decision, the ’450 patent (Ex. 1001), the ’450 patent file history (Ex.
`
`1002), the Utsugi reference and English translations of the Manabe and Eida
`
`references (Exs. 1003–1005), the declaration of Dr. Fontecchio, the Amos
`
`textbook (Ex. 1006), the Kishita patent (Ex. 1011), and the district court’s
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`claim construction order (Ex. 1012).
`
`II. BACKGROUND AND QUALIFICATIONS
`
`4. My qualifications for forming the opinions set forth in this Declaration
`
`are summarized here and explained in more detail in my curriculum vitae.
`
`5.
`
`6.
`
`A copy of my curriculum vitae is attached as Ex. 2002.
`
`I received a Bachelor of Science degree in Physics from the University
`
`of Michigan, Ann Arbor, in 1970.
`
`7.
`
`I thereafter received a Master of Science degree in Physics from Oak-
`
`land University in Rochester, Michigan, in 1976.
`
`8.
`
`I am the founder and CEO of RAF Electronics Corp., where I developed
`
`and patented Liquid Crystal on Silicon (LCOS) microdisplay projection tech-
`
`nology using active matrix transistor arrays as well as developed proprietary
`
`LED-based Solid State Lighting (SSL) products.
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`9.
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`After receiving my bachelor’s degree, I was employed as a scientist and
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`a manager by Energy Conversion Devices, Inc., from 1970 through 1982. My
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`work at Energy Conversion Devices concerned the development of electrolu-
`
`minescent displays, thin film photovoltaics, ablative imaging films, non-vol-
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`atile memory, multi-chip modules, and superconducting materials.
`
`10. After leaving Energy Conversion Devices, I founded and served as
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`CEO of Alphasil, Inc., where I developed amorphous silicon thin film transis-
`
`tor (TFT) active matrix liquid crystal displays (AMLCDs).
`
`11. My work at Alphasil included thin film transistor array substrate pro-
`
`cess and circuit design, data driver and gate driver design, scalers, video cir-
`
`cuits, gamma correction circuits, backlighting, and inverter design. At
`
`Alphasil I also designed and incorporated touch panel screens into active ma-
`
`trix display devices. The touch panel technologies included surface acoustic
`
`wave and capacitive sensing. I worked at Alphasil from 1982 through 1989.
`
`12. After leaving Alphasil, I founded RAF Electronics Corp., described
`
`above. I have served as CEO of RAF Electronics since that time. At RAF I
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`developed HDTV projection technology including transistor array substrates
`
`for LCOS devices and the associated optical systems. My activities at RAF
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`have included developments in lighting systems using both traditional LED
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`and OLED (Organic Light Emitting Diode) technologies.
`
`13.
`
`In 2016 I was granted US Patent 9,328,898 which includes OLED and
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`LED technology and lighting systems. In 2019 RAF received a CalSEED
`
`grant from the California Energy Commission to develop ultra-efficient light-
`
`ing products and explore establishing a Central Valley manufacturing facility.
`
`14.
`
`In 1997, I took the position of President and COO at Alien Technology
`
`Corporation, where I was responsible for completing a Defense Advanced Re-
`
`search Projects Agency (DARPA) contract, and for implementing MEM flu-
`
`idic self-assembly (FSA) technology. I left that position in 1999.
`
`15.
`
`In 2002, I co-founded and served as COO of Diablo Optics, Inc., where
`
`I developed, produced, and commercialized key optical components for
`
`HDTV projectors, such as polarization optics, condenser lenses, projection
`
`lenses, and ultra-high performance optical interference filters using thin film
`
`stacks in conjunction with LED and thin film transistor arrays and devices. I
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`left Diablo in 2007.
`
`16.
`
`I am listed as an inventor on twenty-six patents issued in the United
`
`States and foreign countries, including one United States design patent. My
`
`inventions concern technologies including LED devices, semiconductor
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`materials, glass materials, non-volatile memory cells, thin film transistors, flat
`
`panel backplanes and displays, and wafer based active matrices, and various
`
`transistor array substrates.
`
`17.
`
`I have authored or co-authored twenty-five articles or conference
`
`presentations, including numerous papers and presentations concerning light-
`
`ing and display technologies. My curriculum vitae (Exhibit A) lists these ar-
`
`ticles, conference presentations, and patents.
`
`18.
`
`I am also a member of several professional organizations, including the
`
`OSA, SPIE, AES, SID, and the IEEE.
`
`19.
`
`In summary, I have almost 50 years of experience in the field of high
`
`tech product development including flat panel displays, transistor array sub-
`
`strates, touch panels, and OLED and LED devices.
`
`III. SUMMARY OF THE ’450 PATENT
`
`20. The ‘450 patent, titled “Display Apparatus,” was filed by Hiroyasu
`
`Yamada, et al. on Nov. 21, 1997 and was issued on June 6, 2000. It claims a
`
`priority date of Nov. 28, 1996.
`
`21. Casio, the original assignee of the ’450 patent was a pioneer in the de-
`
`velopment of practical and high performing displays utilizing organic light
`
`emitting diodes (OLEDs). The ’450 patent taught innovative designs for
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`“active matrix” OLED displays with a high ratio of the area of the light emit-
`
`ting elements to the overall display area. The invention allowed the develop-
`
`ment of displays with high brightness, long life, and without various forms of
`
`performance degradation that plagued prior art designs. (See, Ex. 1001 at
`
`2:66–3:7, 4:19–25, 9:9–19.)
`
`22. The ‘450 patent describes an active matrix type display apparatus to
`
`address the problems in the prior art. One such problem in the prior art was
`
`that larger numbers of anode lines and cathode lines in OLED displays made
`
`it “difficult to display a highly precise image.” (Ex. 1001 at 1:42-46.) Prior art
`
`displays included “passive matrix” OLEDs (which had no active elements at
`
`each pixel) and “active matrix” OLEDs (with active elements such as transis-
`
`tors at each pixel).
`
`23. Prior art displays often used a bottom emission design deposited di-
`
`rectly on the glass substrate. It is important to keep light away from thin film
`
`transistors, which if not prevented may cause the transistors to malfunction.
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`(see Paper 9, at 4) which also reduces the brightness and/or reduces the life-
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`time of the OLED layer. (See, Ex. 1001 at 1:58-2:32 and Fig. 22, 23.)
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`24. The ‘450 patent discloses an architecture to “provide a display appa-
`
`ratus which has a light emitting area enlarged to as to emit light at a satisfac-
`
`torily high luminescence even though a voltage applied to an EL layer is low,
`
`and which has a long luminance life.” Paper 9, at 5. According to an embodi-
`
`ment of the ’450 patent, the problems with prior art designs are addressed with
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`a top emission OLED design with an insulating layer and contact hole (“via”)
`
`to connect to the array substrate. This allows the useful area for OLED
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`material to be improved while the transistors are shielded light from the OLED
`
`layer.
`
`
`
`A. The Prosecution History of the ’450 patent
`
`
`
`25. The application that led to the ’450 patent, Application No. 08/976,217
`
`(“’217 application”) was filed on November 21, 1997. The ’217 application
`
`claimed priority to two Japanese patent applications, filed on November 26,
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`1996.
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`26. On August 31, 1999, the Patent Office mailed a non-final rejection of
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`certain claims of the ’217 application under 35 U.S.C. §§ 102 and 103. In
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`response, on November 30, 1999, the applicant provided an amendment to
`
`address the issues raised in the Patent Office action dated August 31, 1999.
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`27. The ’217 application was allowed on January 14, 2000, and issued as
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`the ’450 patent on June 6, 2000.
`
`IV. LEVEL OF ORDINARY SKILL IN THE ART
`
`28.
`
`I am familiar with the concept of the person of ordinary skill in the art
`
`(“POSITA”) and have reviewed Petitioner’s and Dr. Fontecchio’s views on
`
`the definition and qualifications of the POSITA for this IPR proceeding. I also
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`understand there are multiple factors relevant to determining the level of or-
`
`dinary skill in the pertinent art, including (1) the levels of education and ex-
`
`perience of persons working in the field at the time of the invention; (2) the
`
`sophistication of the technology; (3) the types of problems encountered in the
`
`field; and (4) the prior art solutions to those problems.
`
`29.
`
`I am at least a POSITA and that for 50 years I have worked with col-
`
`leagues who are POSITAs. Thus, I am well qualified to give technical opin-
`
`ions from the perspective of a POSITA. I am familiar with OLEDs and how
`
`they are manufactured. I am also aware of the state of the art at the time the
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`application resulting in the ’450 patent was filed. I have been informed by
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`Solas’s counsel that the earliest priority date for the ‘450 patent is November
`
`28, 1996.
`
`30. Based on the technologies disclosed in the ‘450 patent, I believe that a
`
`person of ordinary skill in the art would include someone who, at the time of
`
`the invention, had, (i) a Bachelor’s degree in Electrical Engineering, Physics,
`
`and/or Materials Science and Engineering, or equivalent training, and (ii) ap-
`
`proximately two years of experience working in design and development re-
`
`lated to active matrix-OLED displays. Lack of work experience could have
`
`been remedied by additional education, and vice versa. Such academic and
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`industry experience would be necessary to appreciate what was obvious
`
`and/or anticipated in the industry and what a POSITA would have thought and
`
`understood at the time.
`
`31.
`
`I understand that the Petitioner contends that a POSITA “would have
`
`had a relevant technical degree in Electrical Engineering, Computer Engineer-
`
`ing, Materials Science, Physics, or the like, and experience in active matrix
`
`display design and electroluminescence.” (Petition at 13.) I disagree with this
`
`definition of the level of ordinary skill to the extent that it suggests that any
`
`amount of experience is sufficient, no matter how brief. However, my
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`opinions in this declaration apply under petitioners’ definition of level of or-
`
`dinary skill as well.
`
`32. For purposes of this Declaration, in general, and unless otherwise noted,
`
`my statements and opinions, such as those regarding my experience and the
`
`understanding of a POSITA generally, reflect the knowledge that existed in
`
`the field as of November 28, 1996. Unless otherwise stated, when I provide
`
`my understanding and analysis below, it is consistent with the level of a
`
`POSITA prior to this priority date.
`
`V. UNDERSTANDING OF THE LAW
`
`33.
`
`I am not an attorney. I offer no opinions on the law. But counsel has
`
`informed me of the following legal standards relevant to my analysis here. I
`
`have applied these standards in arriving at my conclusions.
`
`A. Claim Construction
`
`34.
`
`I understand that the Board will apply the “plain and ordinary meaning”
`
`standard to claim construction in this proceeding. I understand that the plain
`
`and ordinary meaning of a claim term is the meaning that the term would have
`
`to a person of ordinary skill in the art in question at the time of the invention
`
`when read in view of the patent claims and the specification. In performing
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`my analyses set forth in this declaration, I have interpreted the claims of
`
`the ’450 Patent to have their plain and ordinary meaning.
`
`B. Anticipation
`
`35.
`
`I understand that for a prior art reference to serve as an anticipatory
`
`reference, it must disclose every limitation of the claimed invention, either
`
`explicitly or inherently. I further understand that unless a reference discloses
`
`within the four corners of the document not only all of the limitations claimed
`
`but also all of the limitations arranged or combined in the same way as recited
`
`in the claim, it cannot be said to prove prior invention of the thing claimed.
`
`further understand that to be anticipatory, the prior art reference must provide
`
`an enabling disclosure of the claimed invention. I further understand that prior
`
`art references that are ambiguous as to the presence or description of a partic-
`
`ular claim element cannot anticipate a claim. I further understand anticipation
`
`does not permit a validity challenger to “fill in” missing limitations not dis-
`
`closed in the reference, by arguing that one of skill in the art would at once
`
`envision using the missing limitation. I further understand that in an anticipa-
`
`tion analysis, the use of extrinsic evidence, such as expert testimony and pub-
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`lications, is necessarily of limited scope and probative value, for a finding of
`
`anticipation requires that all aspects of the claimed invention were already
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`described in a single reference: a finding that is not supportable if it is neces-
`
`sary to prove facts beyond those disclosed in the reference in order to meet
`
`the claim limitations. I further understand that the role of extrinsic evidence
`
`is to educate the fact finder regarding the technology, not to fill gaps in the
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`reference. I further understand that if it is necessary to reach beyond the
`
`boundaries of a single reference to provide missing disclosure of the claimed
`
`invention, the proper ground is not § 102 anticipation, but § 103 obviousness.
`
`C. Obviousness
`
`36.
`
`I understand that a claim of a patent may not be novel even though the
`
`invention is not identically disclosed or described in the prior art so long as
`
`the differences between the subject matter sought to be patented and the prior
`
`art are such that the subject matter as a whole would have been obvious to a
`
`person having ordinary skill in the art in the relevant subject matter at the time
`
`the invention was made.
`
`37.
`
`I understand that, to demonstrate obviousness, it is not sufficient for a
`
`petition to merely show that all of the elements of the claims at issue are found
`
`in separate prior art references or even scattered across different embodiments
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`and teachings of a single reference. The petition must thus go further, to ex-
`
`plain how a person of ordinary skill would combine specific prior art
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`references or teachings, which combinations of elements in specific refer-
`
`ences would yield a predictable result, and how any specific combination
`
`would operate or read on the claims. Similarly, it is not sufficient to allege
`
`that the prior art could be combined, but rather, the petition must show why
`
`and how a person of ordinary skill would have combined them.
`
`38.
`
`I understand that, to demonstrate obviousness, a petition must accu-
`
`rately identify and analyze the differences between the claimed invention and
`
`the prior art.
`
`39.
`
`I understand that obviousness cannot be shown by conclusory state-
`
`ments, and that the petition must provide articulated reasoning with some ra-
`
`tional underpinning to support its conclusion of obviousness.
`
`40.
`
`It is also my current understanding that in assessing the obviousness of
`
`claimed subject matter one should evaluate obviousness over the prior art
`
`from the perspective of one of ordinary skill in the art at the time the invention
`
`was made (and not from the perspective of either a layman or a genius in that
`
`art).
`
`41.
`
`I have been informed that the question of obviousness is to be deter-
`
`mined based on:
`
`a. The scope and content of the prior art;
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`b. The difference or differences between the subject matter of the claim
`
`and the prior art (whereby in assessing the possibility of obviousness
`
`one should consider the manner in which a patentee and/or a Court
`
`has construed the scope of a claim);
`
`c. The level of ordinary skill in the art at the time of the alleged inven-
`
`tion of the subject matter of the claim; and,
`
`d. Any relevant objective factors (the “secondary indicia”) indicating
`
`non-obviousness.
`
`42.
`
`It is also my understanding that in developing opinions as to whether or
`
`not certain claimed subject matter would have been obvious, each claim of a
`
`given patent should be considered in its entirety and separately from any other
`
`claims. In so doing, it is my further understanding that while I should consider
`
`any differences between the claimed invention and the prior art, I should also
`
`assess the obviousness or non-obviousness of the entirety of a claim covering
`
`an alleged invention, not merely some portion of it.
`
`VI. CLAIM CONSTRUCTION
`
`43.
`
`I understand that a proper invalidity analysis requires construing the
`
`relevant patent claims to determine their scope and meaning in view of the
`
`patent’s specification, file history, and the understanding of a POSITA.
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`44.
`
`I understand that the petitioners contend that no specialized construc-
`
`tions of any of the claim terms are necessary. (Petition at 13.) However, in
`
`proceedings before the district court where Solas has asserted the ’450 patent
`
`against Samsung, the parties have agreed on constructions for certain of the
`
`patent claim terms. (Ex. 1012.)
`
`Claim Terms
`“active elements”
`
`“wherein said at least one first
`electrode has a rough surface
`which is in contact with the said
`organic electroluminescent layer”
`
`
`
`Agreed Constructions
`“circuit elements that have gain or that direct current
`flow, e.g., transistors”
`“wherein said at least one first electrode is formed to
`have a substantially uneven surface in contact with
`the organic electroluminescent layer”
`
`45. On September 23, 2020, the district court hearing the litigation between
`
`Solas and Samsung issued a supplemental claim construction order, to resolve
`
`certain disputes between the parties that arose during summary judgment in
`
`that case. (Ex. 2006.) The district court adopted the following additional con-
`
`struction (Ex. 2006 at 14):
`
`Claim Terms
`
`Court’s Constructions
`“lie over the surface of”
`
`“cover”
`
`
`
`46.
`
`In addition, the parties had disputed whether the term “said active ele-
`
`ments” in the claims necessarily mapped onto all active elements in a device
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`or could be mapped onto a subset of two or more active elements. The court
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`held that the latter view is correct, stating: “the Court holds that Plaintiff may
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`map its infringement read of the claim to a subset of the active elements in the
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`accused devices.” (Ex. 2006 at 9.)
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`47. Unless otherwise noted, my opinions set forth in this declaration apply
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`both under these constructions and under the plain meaning of the terms, with-
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`out any explicit construction.
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`48. For terms where no construction has been agreed, my analysis as pre-
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`sented in this declaration has been based on the meaning of that term as pro-
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`vided in the applicable specification and file history. Where none of the
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`foregoing applies, I have considered the other terms of the asserted claims to
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`mean what I believe a POSITA would have considered each of those terms to
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`mean at the time the patent was filed.
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`VII. PATENTABILITY OVER UTSUGI AND OVER
`COMBINATIONS WITH UTSUGI
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`49. The Petition contends that Claims 1–2, 4–8, and 15–16 are anticipated
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`by, or alternatively obvious over, Utsugi. As explained below, the Petition
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`fails to establish that independent claims 1 and 15 are anticipated or obvious.
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`I also address limitations of dependent claims and 4 8 and show that the Peti-
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`tion fails to establish these limitations are disclosed in Utsugi. While I do not
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`separately discuss the limitations of dependent claims 2, 5–7, and 15–16, the
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`same failures to show invalidity in the independent claims apply to these de-
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`pendent claims.
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`50. For dependent claims 3, 9, 11–13, and 17–18, the Petition relies on
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`combinations of Utsugi with either Manabe or Eida. (Petition at 62–82.) How-
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`ever, in these combinations the Petition relies solely on Utsugi as allegedly
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`disclosing the limitations found in the independent claims. Thus, the Petition
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`fails to show obviousness of claims 3, 9, 11–13, and 17–18 for the same rea-
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`sons that I discuss below concerning the independent claims.
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`A. Limitation 1[c]: “an insulation film formed over said substrate
`so as to cover said active elements, said insulation having at
`least one contact hole”
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`51. The Petition and accompanying Fontecchio declaration do not establish
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`that Utsugi discloses limitation 1[c] or that it renders this limitation obvious.
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`Fontecchio Report ¶¶ 151–155, 223–225.
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`52. For the “active elements” in this limitation, Dr. Fontecchio identifies
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`the “current-controlling transistor QI” and “switching transistor QS” of Utsugi.
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`(Petition at 24; Ex. 1003 at 6:19–23.) For the “insulation film” in this limita-
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`tion, Petitioner identifies the upper layer of the two layers labelled “SiO2” in
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`Figure 5 of Utsugi:
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`(Petition at 25.)
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`53. Figure 5 of Utsugi shows only one of the “active elements,” “current-
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`controlling transistor QI.” As Dr. Fontecchio and Petitioners acknowledge,
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`Figure 5 does not show the “switching transistor QS.” (Ex. 1007 ¶ 168.) How-
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`ever, Petitioner does not explain or cite any evidence establishing that the
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`“SiO2” layer from Figure 5 is “formed over” or “cover[s]” this active element,
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`as required by the claim under Petitioner’s invalidity theories.
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`54. The SiO2 layer described in Utsugi does not necessarily cover the tran-
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`sistors (Qs). As an initial matter, as Petitioners acknowledge, the SiO2 layer
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`may not be deposited over QS in the first place because a mask is used to
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`prevent it from being deposited there. (Ex. 1007 ¶¶ 84, 147.) Petitioners
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`acknowledge that even if the SiO2 layer is deposited over QS, that layer may
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`be removed by etching, for example as part of the same etching step used to
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`form the “second contact hole 56B.” (Ex. 1007 ¶¶ 84, 147.) Nothing in Utsugi
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`indicates whether the SiO2 layer covers QS or not.
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`55. Dr. Fontecchio states “it would be important for the insulation layer to
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`cover the source and drain electrodes” of QS to prevent a short between those
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`electrodes and the “electron injection electrode” 55. (Ex. 1007 ¶ 84.) How-
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`ever, covering the source and drain electrodes with an insulating layer is not
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`the only, most effective, or most efficient way to avoid such a short. For in-
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`stance, a different insulating material could be deposited on the source and
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`drain electrodes, which could take the form of a different insulating layer pat-
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`terned so as to cover the QS source and drain electrodes. Alternatively, the
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`upper surfaces of the source and drain electrodes could be oxidized to form
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`an insulating film, using known techniques such as thermal oxidation or an-
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`odic oxidation. (Ex. 2003, Fundamentals of Microfabrication and Nanotech-
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`nology (3rd ed. 2012), at 242–244.) Indeed, Dr. Fontecchio has described in
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`a declaration filed in support of Samsung’s challenge to a different Solas pa-
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`tent how conductors can be oxidized to form insulating layers. (Ex. 2004 ¶¶
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`189–191.)
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`56. Petitioners argue that it would have been obvious to modify Utsugi to
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`satisfy this limitation based upon figure 23 of the ’450 patent. (Petition at 55–
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`56.) However, I am informed that Figure 23 may not be prior art to the ’450
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`patent. I am further informed that the figures and disclosures of a patent are
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`generally not prior art to that patent, as they are not “prior” to the patent. I
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`offer some further observations: while Figure 23 is mentioned in the “Descrip-
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`tion of the Related Art” section of the ’450 patent, ’450 patent at 1:58, it is
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`introduced as a design “[p]roposed as a display apparatus free from the above-
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`described problems” in the prior art. ’450 patent at 1:47–49. In my view, there
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`is no evidence that Figure 23 of the ’450 patent was actually known in the
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`prior art. I also note that insulation film 104 in Figure 23 does not have a
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`“contact hole,” as this limitation requires:
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`57. The Petition does not explain how a contact hole would be formed in
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`this insulation film, or how that contact hole could connect the “first elec-
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`trode” to the “active elements,” as required by the ’450 patent claims.
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`B.
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`Limitations 4[a] / 4[b]: “The display apparatus according to
`claim 1, wherein said active elements are a selection
`transistor . . . and a drive transistor”
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`58. The Petition and accompanying Fontecchio declaration do not establish
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`that Utsugi discloses these limitations of claim 4 or that it renders those limi-
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`tations obvious. This dependent claim makes explicit which active elements
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`are the “said active elements” that must be covered by the insulation film and
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`states that the active elements that must be covered includes a selection tran-
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`sistor. As I discuss above, petitioners have failed to establish that a selection
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`transistor in Utsugi is covered or that it would have been obvious to make it
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`covered by the insulation film.
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`C. Claim 8: “The display apparatus according to claim 1, wherein
`a constant voltage is applied to said second electrode”
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`59. The Petition and accompanying Fontecchio declaration do not establish
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`that Utsugi discloses the limitations of claim 8 or that it renders those limita-
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`tions obvious. In order to anticipate or render obvious claim 8, Utsugi would
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`need to disclose or render obvious claim 1. For the reasons explained above,
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`Utsugi does not do so, and so the Petitioners have not established that claim 8
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`is rendered obvious.
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`60. Further, Petitioners do not establish that Utsugi teaches “a constant
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`voltage is applied to said second electrode.” Petitioners argue that the voltage
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`VDD in Figure 3 of Utsugi is a constant voltage:
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`61.
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`I do not agree with Petitioners that the VDD of Utsugi discloses this lim-
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`itation. Utsugi does not teach or suggest that VDD is constant. To support Peti-
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`titioners’ argument, Dr. Fontecchio cites Amos, Principles of Transistor
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