United States Patent c191
`Siwiak et al.
`
`[54] DUAL MODE RECEIVER HAVING
`BA'ITERY SAVING CAPABILITY
`
`[75]
`
`Inventors: Kazimierz Shriak; Clifford D. Leitch,
`both of Coral Springs; Robert J,
`Schwendeman, Pompano Beach, all
`of Fla.
`
`(73] Assignee: Motorola, Inc., Schaumburg, m.
`
`(21] Appl. No.: 956,562
`
`(22] Filed:
`
`Oct. 5, 1992
`
`Related U.S. Application Data
`[63] Continuation of Ser. No. 633,585, Dec. 24, 1990, aban(cid:173)
`doned.
`
`Int. Cl.s ............................................... H04B 7/00
`[51]
`(52] U.S. Cl ............................. 340/825.44; 340/311.1;
`340/825.48
`(58] Field of Search ........... 340/311.1, 825.44, 825.47,
`340/825.48; 375/5; 455/38.1, 38.3, 142, 143,
`343, 33.4
`
`I IIIII IIIIIIII Ill lllll lllll lllll lllll lllll lllll lllll lllll 111111111111111111
`US005239306A
`5,239,306
`[111 Patent Number:
`[45] Date of Patent: Aug. 24, 1993
`
`[56]
`
`Refereaces Qted
`U.S. PATENT DOCUMENTS
`-
`4,918,437 4/1990 Jasinski et al ...................... 455/33.4
`5,054,052 10/1991 Nonami ............................... 455/343
`Primary Examiner-Donald J. Yusko
`Assistant Examiner-Dervis Magistre
`Attorney, Agent, or Firm-Philip P. Macnak; William E.
`Koch; Thomas G. Berry
`ABSTRACT
`(57]
`A dual mode communication receiver a receiver for
`receiving information transmitted in a first and second
`modulation format on a common channel, a first de(cid:173)
`modulator for detecting information transmitted in the
`first modulation format, and a second demodulator,
`responsive to the information detected in the first mod(cid:173)
`ulation format, for detecting information transmitted in
`the second modulation format. A power conservation
`circuit is also provided for selectively supplying power
`to the first and second demodulators for enabling the
`detecting of the information transmitted in the first
`modulation format and the second modulation format,
`respectively.
`
`35 Claims, 7 Drawing Sheets
`
`110
`
`CODE
`MEMORY
`
`111
`
`DISPLAY
`
`RECEIVER
`
`102
`
`FM
`DEMODULATOR
`
`108
`
`104
`
`LINEAR
`DEMODULATOR
`112
`
`114
`
`118
`
`MEMORY
`
`116
`
`DATA
`PRESENTATION
`MEANS
`
`Apple Exhibit 1008
`Apple Inc. v. Rembrandt Wireless
`IPR2020-00033
`Page 00001
`
`

`

`U.S. Patent
`
`Aug. 24, 1993
`
`Sheet 1 of 7
`
`5,239,306
`
`RECEIVER
`
`102
`
`FM
`DEMODULATOR
`108
`
`..._ _
`
`LINEAR
`DEMODULATOR
`112
`
`DECODER/
`CONTROLLER
`
`111
`
`DISPLAY
`
`....,.. _ _ _ _ _
`
`104
`___;;;;:::i BATTERY
`SAVER
`SWITCH
`114
`
`r11s
`DATA
`·
`PRESENTATION
`MEANS
`
`118
`
`MEMORY
`
`FIG.I
`
`IPR2020-00033 Page 00002
`
`

`

`Q
`~
`\C
`~
`~
`UI
`
`°'
`..
`..
`
`236)
`
`N
`
`.,,.
`
`,,
`,
`
`238\
`
`234\
`
`230\
`
`240\
`
`I .,,. I
`
`232\
`
`22a,
`
`FIG.2C
`I
`I
`
`\
`222'
`
`220·,
`
`224\
`
`222,
`
`DEMOD2
`PWRTO
`
`DEMOD 1
`PWRTOJ
`
`220,
`
`PWRTO J
`
`RCVR
`
`214',
`
`FIG.2A
`
`202,
`
`•
`'Cl:).
`~ •
`
`BATCH M I 'PREAMBLE I BATCH 1
`204,
`
`202 ")
`
`I PREAMBLE I BATCH 1
`_20_2_')..1,_ ___ 204_,-=---_________ 20_&_, ____ 209 \
`
`-
`
`-
`
`-
`
`-
`
`-
`
`216\ ~ >
`
`218'
`
`s MESSAGE2
`
`FIG.2B
`
`218
`
`-..I
`
`0
`~
`
`....
`~ ....
`
`~
`l:r'
`CJ'.l
`
`~ w
`....
`--~
`
`(!0
`C:
`
`E
`
`IPR2020-00033 Page 00003
`
`

`

`-..I
`
`0 ...,
`w
`n, ....
`t:r n,
`00
`
`~
`
`i w
`....
`--~
`> c::
`
`00 •
`~ •
`
`BATCH 1
`HS DATA
`2048"'
`
`BATCH 1
`PREAMBLE LS DATA
`
`204A,
`
`202,
`
`FIG.2D
`
`-----I H s DATA
`
`BATCH M
`
`_
`
`BATCH M
`LS DATA
`
`'
`
`206A
`
`-----
`
`I HSDATA
`'
`
`BATCH 1
`
`_
`
`BATCH 1
`LS DATA
`
`204A
`
`252
`
`PREAMBLE
`
`250
`
`202,
`
`IPR2020-00033 Page 00004
`
`

`

`OUTPUT
`LINEAR
`
`AGC
`
`•
`C/J.
`~ •
`
`-
`
`-DEMODULATOR
`
`FM
`
`-
`
`1oe,
`
`2ND
`314,
`
`-
`
`IF
`
`312'\
`
`-
`-
`
`324.J
`
`j
`
`I '-320
`
`~ ~D,E
`
`106
`
`104A,8,c
`~
`. SWITCH
`
`106D
`
`28
`
`340
`\.334 -
`
`CPU
`
`,
`
`BATTERY 104
`
`I IO
`
`336 J
`
`I OSC ~HTIMER t SAVER _)
`
`IRAM~HROM
`
`-
`
`~30, I
`
`DIGITAL
`
`AFC
`
`,6-
`
`~.
`
`-
`
`r3so
`
`3ml
`
`322A,
`
`OSCILLATOR
`
`LOCAL
`
`, r 352
`
`-o/
`
`AMPLIFIER -
`
`IF
`
`-
`
`360
`
`-
`
`OSCILLATOR
`
`1/Q
`
`r3s6
`
`358
`
`,
`
`FIG.3
`
`366"\ ~ 354,
`
`LOW PASS
`
`FILTER
`
`362......_
`
`LOWPASS~ _
`
`'-364
`FILTER
`
`-
`
`~
`370
`
`-
`
`CONVERTER
`
`AID
`
`'-372
`
`-
`
`COUNTER
`R A M .,_ ADDRESS
`PORT
`DUAL
`
`,
`
`~
`
`-
`
`-
`
`"'~708 370A~ 1
`j, 374
`,\..:
`
`l
`
`36
`
`\106A ~ I
`332.1
`0&9
`'1
`l\1nfic I/ 0 338
`106E
`I
`
`328
`
`J
`
`PROCESSOR~
`
`AUDIO
`
`106F
`~
`106G,
`
`DISPLAY 1 -
`
`111
`114-
`
`11~
`
`FILTER~ CONVERSION
`
`SYNTHESIZER
`3108
`310A
`
`-
`
`,
`
`08A 312,
`
`~306A
`
`308
`
`-
`
`306_,/ a
`-AMPLIFIER
`
`RF
`
`'
`
`102
`
`-
`
`30 U7
`
`310_,
`
`LI
`320A
`
`'-34~ _
`I ALERT GENERATOR
`
`I
`
`-106H
`
`316A
`
`I
`
`IPR2020-00033 Page 00005
`
`

`

`DECODER
`
`TOµC
`322A
`
`324
`
`OUTPUT
`LINEAR
`
`DEMODULATOR
`
`FM
`
`·----------______ j ________ ---
`
`322
`
`108 "\
`
`380
`
`c:: • rLJ. •
`
`AMPLIFIER
`
`IF
`
`FILTER
`
`IF
`
`'--320
`
`384
`
`306 ,-312
`
`GAIN CONTROL (AGC)
`
`AUTOMATIC
`
`AMPLIFIER
`
`RF
`
`102
`
`(302
`
`FIG.4
`
`TO QUADRATURE
`
`DETECTOR
`
`STORAGE
`TO DIGITAL
`
`~1048
`
`104C
`
`DECODER
`_______ BATTERYSAVER.,.__FROMµC
`
`100D
`
`104A,
`
`SWITCH
`
`DETECTOR
`
`TO QUADRATURE
`
`104E
`
`104
`
`DECODER
`FROMµC
`
`106H
`
`104D
`
`CONTROL ( AFC )
`
`FREQUENCY
`AUTOMATIC
`
`------tSYNTHESIZER
`
`316
`
`310
`
`IPR2020-00033 Page 00006
`
`

`

`U.S. Patent
`
`Aug. 24, 1993
`
`Sheet 6 of 7
`
`5,239,306
`
`POWER ON
`
`2
`
`-~=~~=~--, 504
`SUPPLY POWER
`TO RECEIVER
`
`SUPPLY POWER TO FM
`DEMODULATOR
`
`512
`
`SUSPEND SUPPLY
`OF POWER
`
`~ 510
`
`522
`
`FIG. SA
`
`IPR2020-00033 Page 00007
`
`

`

`U.S. Patent
`
`Aug. 24, 1993
`
`Sheet 7 of 7
`
`5,239,306
`
`526
`DECODE DATA _ /
`POINTER
`
`SUSPEND POWER TO
`FM DEMODULATOR
`
`528
`
`532
`
`SELECT
`CHANNELS
`
`SUPPLY POW R TO LINEAR
`DETECTOR AT ALLOCATED TIME
`
`534
`
`SUPPLY POWER TO __:536
`DIGIT AL STORAGE
`
`ENABLE DATA
`STORAGE
`
`538
`
`.-----'-----, 540
`STORE DATA
`
`N
`
`546
`SUSPEND POWER TO _,I
`LINEAR DETECTOR
`
`SUSPEND POWER TO
`DIGITAL STORAGE
`
`548
`
`FIG. SB
`
`552
`
`SELECT
`CHANNEL A
`
`IPR2020-00033 Page 00008
`
`

`

`1
`
`5,239,306
`
`DUAL MODE RECEIVER HAVING BATIERY
`SAVING CAPABILITY
`
`This is a continuation of application Ser. No. s
`07/633,585, filed Dec. 24, 1990 now abandoned.
`
`25
`
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`This invention relates to the field of communication 10
`receivers, and more particularly to a selective call com(cid:173)
`munication receiver providing high speed data and
`voice communication with battery saving capability.
`2. Description of the Prior Art
`There are many communication systems in operation 15
`today, including virtually all of today's paging systems,
`which utilize frequency (FM) modulation for address(cid:173)
`ing, and for data and voice transmission. The current
`communication receivers, including paging receivers,
`utilize sophisticated receiver architectures, and today's 20
`paging systems utilize well known and established sig(cid:173)
`naling formats. The current receiver architectures and
`signaling formats have been optimized to provide both
`high receiver sensitivities and excellent battery saving
`capabilities.
`In many metropolitan areas, many paging systems
`were being operated at, or near, the maximum system
`capacity, in both the number of subscribers that can be
`accommodated, and the message transmission time that
`was available. Such paging system operation has re- 30
`suited in reduced customer satisfaction due to extended
`holding, or "camp-on" times required to access the
`paging system, and also due to extended delays in mes(cid:173)
`sage delivery due to equally extended paging system
`message transmission queues. In an effort to improve 35
`the message throughput in such prior art systems, such
`services as voice paging, were eliminated on many sys(cid:173)
`tems, and were replaced by newer services, such as
`numeric and alphanumeric messaging. These newer
`services greatly increased the number of subscribers 40
`which could be accommodated on the paging system,
`by greatly reducing the air-time requirements for mes(cid:173)
`sage transmission. However, as the demand for even
`more improved paging services has increased, such as
`for improved methods for handling and processing 45
`large alphanumeric data messages, many paging sys(cid:173)
`tems are again nearing the maximum system capacity.
`In an effort to continue to improve the grade of service
`being provided in such paging systems, new signaling
`formats, such as the 1200 baud POCSAG signaling 50
`format, have been implemented to ease the burden on
`the paging system by providing ever increasing message
`throughput.
`When used in simulcast transmission systems, stan(cid:173)
`dard FM modulation is not suitable for data transmis- 55
`sion at high bit rates due to transmitter equalization
`problems. Because of the limitations of FM modulation
`for high speed message transmission, other forms of
`modulation, such as linear modulation techniques are
`required to provide for transmission at the higher data 60
`rates. While linear modulation techniques are available
`to provide the increased message transmission speeds,
`such modulation techniques generally are incompatible
`for use with existing receiver architectures, are incom(cid:173)
`patible with present day signaling protocols, and re- 65
`quire significantly more current drain for operation
`than required for circuits receiving and demodulating
`existing signaling protocols transmitted using standard
`
`2
`FM modulation techniques. There is a need to provide
`a receiver architecture which retains compatibility
`within existing FM modulated paging signaling proto(cid:173)
`cols, thereby taking advantage of the battery saving
`capabilities of these existing paging signaling protocols.
`Furthermore, there is a need to provide a receiver ar(cid:173)
`chitecture which includes linear demodulation for voice
`and high speed data capability, to provide the increased
`message throughput required for these ever expanding
`services, without compromising the battery saving per(cid:173)
`formance of the existing paging signaling protocols.
`
`SUMMARY OF THE INVENTION
`In a first embodiment of the present invention, a dual
`mode communication receiver comprises means for
`receiving information transmitted on a common chan(cid:173)
`nel in a first and second modulation format, a first means
`for detecting the information transmitted in the first
`modulation format on the common channel, and a sec(cid:173)
`ond means, responsive to the information detected in
`the first modulation format, for detecting the informa(cid:173)
`tion transmitted in the second modulation format.
`In a second embodiment of the present invention, a
`dual mode communication receiver comprises means
`for receiving information transmitted on a common
`channel in a first and second modulation format: first
`means for detecting the information transmitted in the
`first modulation format on the common channel and
`second means, responsive to the information detected in
`the first modulation format, for receiving the informa(cid:173)
`tion transmitted in the second modulation format. A
`third means supplies power to the receiving means for
`enabling the receiving of the information transmitted in
`the first and second modulation formats, supplies power
`to the first means for enabling the detecting of the infor(cid:173)
`mation transmitted in the first modulation format, and
`further in response to the information received and
`detected in the first modulation format, supplies power
`to the second means for enabling the detecting of the
`information transmitted in the second modulation for(cid:173)
`mat.
`In a third embodiment of the present invention, a dual
`mode communication receiver comprises a means for
`receiving information transmitted in a FM modulation
`format and a linear modulation format. A first means for
`detecting detects the information transmitted in the FM
`modulation format, and second means for detecting,
`responsive to the information detected in the FM modu(cid:173)
`lation format, detects the information transmitted in the
`linear modulation format.
`In a fourth embodiment of the present invention, a
`dual mode communication receiver comprises a means
`for receiving information transmitted in a FM modula(cid:173)
`tion format and a linear modulation format. A first
`means for detecting detects the information transmitted
`in the FM modulation format, and a second means for
`detecting, responsive to the information detected in the
`FM modulation format, detects the information trans(cid:173)
`mitted in the linear modulation format. A third means
`supplies power to the receiving means for enabling the
`receiving of the information transmitted in the FM and
`linear modulation formats. The third means further
`supplies power to the first means for enabling the de(cid:173)
`tecting of the information transmitted in the FM modu(cid:173)
`lation format, and the third means further in response to
`the information detected in the FM modulation format,
`supplies power to the second means for enabling the
`
`IPR2020-00033 Page 00009
`
`

`

`3
`detecting of the information transmitted in the linear
`modulation format.
`
`5,239,306
`
`4
`information is encoded in both the amplitude and the
`instantaneous phase angle of the carrier. Examples of
`linear modulation formats include, but are not limited
`BRIEF DESCRIPTION OF THE DRAWINGS
`to, quadrature amplitude modulation (QAM modula-
`The features of the invention which are believed to be 5 tion), and spectrally efficient data modulation (SEDM
`modulation), such as described in U.S. Pat. No.
`novel are set forth with particularity in the appended
`claims. The invention itself, together with its further
`4,737,969 to Steel et al., entitled "Spectrally Efficient
`objects and advantages thereof, may be best understood
`Digital Modulation Method and Apparatus" which is
`by reference to the following description when taken in
`assigned to the assignee of the present invention and
`conjunction with the accompanying drawings, in the 10 which is hereby incorporated by reference herein.
`Other forms of linear modulation include those modula-
`several figures of which like reference numerals identify
`identical elements, in which, and wherein:
`tion formats which simultaneously modulate both the
`FIG. 1 is an electrical block diagram of the dual mode
`amplitude and the phase of the transmitted signal to
`communication receiver of the present invention.
`encode the message information, and also shape the
`FIGS. 2A and 2B are timing diagrams describing the 15 transmitted spectrum to provide adjacent channel pro-
`preferred signaling format for the dual mode communi-
`tection. An example of such modulation format is the
`cation receiver of the present invention.
`QPSK signaling format. While such linear modulation
`FIG. 2C is a timing diagram showing the battery
`formats are available for the transmission of message
`saving operation of the dual mode receiver of the pres-
`information at very high data rates, well in excess of
`ent invention.
`20 that which can be provided by convention frequency
`FIG. 2D is a timing diagram describing an alternate
`modulation formats, such linear modulation formats are
`signaling format for the dual mode receiver of the pres-
`generally incompatible for use with the established pag-
`ent invention.
`ing signaling protocols which have been developed to
`FIG. 3 is an expanded electrical block diagram of the
`provide both excellent receiver sensitivities and battery
`dual mode communication receiver of the present in- 25 saving performance. This incompatibility is due largely
`to the requirement of providing linear receivers which
`vention.
`FIG. 4 is an electrical block diagram showing details
`require significantly more power to operate than that
`of the battery saving features of the dual mode commu-
`required for selective call receivers operating in paging
`nication receiver of the present invention.
`systems which employ such well known signaling for-
`FIGS. SA and SB are flow charts describing the oper- 30 mats as the POCSAG, or Golay Sequential Code signal-
`ing protocols.
`ation of the dual mode communication receiver of the
`FIG. 1 is an electrical block diagram of a dual mode
`present invention.
`communication receiver of the present invention which
`overcomes the problems described, and which is com-
`35 patible for use on existing paging systems, using existing
`paging signaling protocols. The dual mode communica(cid:173)
`tion receiver of the present invention, enables the trans(cid:173)
`mission of data at very high data bit rates, such as eight
`kilobits per second and higher. The dual mode commu(cid:173)
`nication receiver of the present invention is compatible
`with the existing paging signaling protocols to provide
`excellent battery saving performance characteristics,
`and to maintain the receiver sensitivity characteristics
`of the prior art communication receivers using the con(cid:173)
`ventional paging signaling protocols. The dual mode
`communication receiver of the present invention is
`capable of the operation described above by providing
`a first receiving means for receiving and detecting infor(cid:173)
`mation transmitted in a first modulation format, such as
`in the conventional FM modulated format, and by pro(cid:173)
`viding a second receiving means which is responsive to
`the information detected by the first receiving means in
`the first modulation format for receiving and detecting
`information transmitted in a second modulation format,
`such as in one of the linear modulation formats which
`enables the high speed transmission of message informa-
`tion. The transmission format is described in FIGS.
`2A-2C, and will be described in detail below. The trans(cid:173)
`mission protocol of FIGS. 2A-2C enables the transmis(cid:173)
`sion of information which is modulated in a conven(cid:173)
`tional FM modulation format, and further enables the
`transmission of message information which is modu(cid:173)
`lated in a linear modulation format to enable high speed
`data transmission. Referring to FIG. 1, the information
`modulated in either the FM modulation format, or the
`linear modulation format, is received by receiver 102. A
`battery saving switch 104, under the control of a de(cid:173)
`coder/ controller 106, supplies power to the receiver
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`As has been described above, prior art communica(cid:173)
`tion systems, such as paging systems, have provided
`address and message transmission in a predetermined
`signaling protocol using a single modulation format.
`Analog signaling protocols, such as two tone and five 40
`tone signaling protocols, and analog voice messages
`were modulated using either phase or angle modulation
`formats, or a direct frequency modulation format in FM
`modulated carrier systems which are prevalent in the
`industry today. Other signaling protocols, such as digi- 45
`tal signaling protocols, have typically utilized a fre(cid:173)
`quency shift keying (FSK) modulation format for both
`the address and message transmissions. The existing
`signaling protocols, such as the POCSAG signaling
`protocol at 512 and 1200 bits per second, or the Golay 50
`Sequential Code protocol at 600 bits per second, were
`developed to provide superior performance in wide
`area communication systems, such as those systems
`providing simulcast message transmission. However, as
`previously described, there is a limit at which transmis- 55
`sion of information at high data bit rates using an FM
`modulation format becomes impractical, due largely to
`problems encountered in equalizing simulcast transmis(cid:173)
`sion systems for such transmissions, and due to the fre(cid:173)
`quency spectrum required to utilize conventional fre- 60
`quency modulation formats to provide such higher
`speed data communications.
`Alternate modulation formats are available to pro(cid:173)
`vide improved throughput of message information.
`These alternate modulation formats include those mod- 65
`ulation formats which are often termed linear modula(cid:173)
`tion formats. Such linear modulation formats enable the
`modulation of the carrier signal whereby the message
`
`IPR2020-00033 Page 00010
`
`

`

`5,239,306
`
`5
`6
`detail below, one or more batches of information are
`102 to enable the reception of the transmitted informa-
`modulated in the FM modulation format and can be
`tion. The battery saving switch 104 also couples to an
`interleaved with one or more batches of information
`FM demodulator 108 to enable FM modulated informa-
`which are modulated in a linear modulation format.
`tion received by receiver 102 to be demodulated. The
`demodulated information is provided to the decoder/- 5 Depending upon the channel loading, a break 208 in the
`controller 106. A code memory 110 is provided which
`transmission can occur, after which the preamble 202 is
`couples to the decoder/controller 106, and which stores
`again transmitted to enable the receivers to re-synchro-
`nize with the batch transmission.
`address information assigned to the dual mode commu-
`nication receiver. When an address is detected in the
`FIG. 2B shows in further detail the interleaving of
`demodulated information which corresponds to the 10 batches modulated in the FM modulation format with
`predetermined address information assigned to the com-
`batches modulated in the linear modulation format. In
`munication receiver, one of two operations will occur,
`the preferred embodiment of the present invention, the
`preamble 202 is a sequence of alternating one and zero
`which will be described in greater detail below. In the
`first instance, the battery saving switch 104, under the
`bits which are modulated using the FM modulation
`control of the decoder/controller 106 will maintain the 15 format. The preamble 202 enables the receiver to awake
`supply of power to the FM demodulator 108 to enable
`from a battery saving time interval, recognize that a
`further demodulation of message information received
`transmission on the channel has been initiated, and ena-
`in the FM modulation format. The received message
`bles the receiver to obtain bit synchronization with the
`transmitted signal. Following the preamble 202 trans-
`information is temporarily stored in a memory, such as
`a random access memory, which is generally located 20 mission, each batch comprises a synchronization code
`within the decoder/controller 106. The stored message
`word 214, followed by address 210 and message 212
`information is recalled by the user for display on display
`information, or by high speed data 216. The synchroni-
`111. The receiving operating and the decoding of the
`zation code word 214 is modulated in the modulation
`address information is well known to one of ordinary
`format appropriate for the type of data being transmit-
`skill in the art.
`25 ted in the batch, and enables synchronization with the
`transmitted information. In the example shown in FIG.
`However, unlike the prior art receivers, power to the
`FM demodulator 108 is suspended by battery saver
`2B, the synchronization code word 214 is modulated in
`switch 104, under the control of the decoder/controller
`the FM modulation format, followed by addresses 210
`106, and power is then supplied to the linear demodula-
`and messages 212 which are also modulated in the FM
`tor 112, to enable the demodulation of information re- 30 modulation format. Each transmission batch is coded
`using a coded synchronization code word and allows
`ceived in the second modulation format. The informa-
`tion received in the second modulation format is re-
`for the transmission of a predetermined number of ad-
`ceived by receiver 102, which then couples the received
`dress and/or message information code words, which,
`information to the linear demodulator 112. The demod-
`as for example, is sixteen. As shown, the address 210 of
`ulated message information is coupled from the output 35 a first receiver and the associated message 212 are trans-
`of the linear demodulator 112, to the input of a data·
`mitted, followed by the address 210' of a second re-
`processing unit 114. When the linear demodulator 112 is
`ceiver and the associated message 212', and so forth.
`enabled, battery saving switch 104 also supplies power Message 212' for the second receiver is not a normal
`message information code word, but is a predetermined
`to the data processing unit 114, and to the data presenta-
`tion means 116. The decoder/controller 106 is coupled 40 "batch" pointer, directing the receiver to the transmis-
`sion batch in which the high speed message information
`to the data processing circuit 114, enabling the data
`processing circuit 114 to process the message informa-
`directed to the receiver is to be transmitted, which as
`tion received in the second modulation format. The
`shown is in the next transmission batch 218'. As shown,
`processed message information is temporarily stored in
`batch 218' contains the high speed message information
`memory 118, and can be recalled by the user and dis- 45 216 which is modulated in a linear modulation format.
`played on the presentation means 116.
`Batch 218' begins with the synchronization code word
`FIGS. 2A and 2B are timing diagrams describing the
`214' which is used to signal the start of the message
`signaling format for the dual mode communication
`information, as will be described below. Following the
`receiver of the present invention. As shown in FIG. 2A,
`transmission of batch 218', additional high speed mes-
`when a message transmission is initiated on the channel, SO sage information can be transmitted in additional
`batches, other conventionally modulated address and
`a preamble 202, modulated in the FM modulation for-
`mat, is transmitted on the channel, followed by a plural-
`message information can be transmitted in additional
`ity of message batches 204-206. Each of the message
`batches, or as shown, the batch transmission can be
`batches 204-206 has a predetermined transmission time
`terminated until a later time when additional address
`interval, and enables the transmission of address and 55 and message information is available for transmission.
`FIG. 2C is a timing diagram describing the battery
`message information which is modulated in the FM
`modulation format, or for high speed data, which is
`saver operation for the dual mode communication re-
`modulated in a linear modulation format. The modula-
`ceiver of the present invention. Power is initially sup-
`tion of address and message information in the FM
`plied to the receiver section, during time interval 220,
`modulation format is well known in the art. The modu- 60 and to the FM demodulator, during time interval 222, to
`enable receiving the preamble and synchronization
`lation of data in a linear modulation format, such as the
`SEDM modulation format, is described in U.S. Pat. No.
`code word information modulated in the FM modula-
`4,737,969 to Steel et al, entitled "Spectrally Efficient
`tion format. The supply of power to the linear demodu-
`lator is inhibited during time interval 224, thereby con-
`Digital Modulation Method and Apparatus" which is
`assigned to the assignee of the present invention, and 65 serving power within the receiver. After having de-
`tected the preamble and synchronization code word,
`which is incorporated by reference herein. All informa-
`tion transmitted in a given batch is modulated in a com-
`the supply of power to the receiver is maintained during
`time interval 220', and to the FM demodulator during
`mon modulation format. As will be described in further
`
`IPR2020-00033 Page 00011
`
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`

`5,239,306
`
`7
`time interval 222', in order to receive any additional
`address and message information transmitted in the first
`transmission batch. The supply of power to the receiver
`section is maintained during time interval 230 since the
`next transmission batch includes the high speed data
`directed to the receiver. However, the supply of power
`to the FM demodulator is suspended during time inter(cid:173)
`val 228, and power is supplied to the linear demodula(cid:173)
`tor, during time interval 232. After receiving the high
`speed data information during time interval 232, the
`supply of power is suspended during time interval 234
`to the receiver section, and during time interval 236 to
`the linear demodulator. Power is again supplied to the
`receiver section during time interval 238, and to the FM
`demodulator, during time interval 240, to again enable
`reception of the message information in the next se(cid:173)
`quence of message batch transmissions.
`In summary, power is regularly supplied to the re(cid:173)
`ceiver and to the FM demodulator to enable reception
`of an address and message information using a signaling 20
`protocol which provides battery saving capability to
`the receiver. When the message information indicates a
`high speed data transmission is forthcoming, the supply
`of power to the FM demodulator is suspended, and
`power is supplied to the linear demodulator to enable 25
`the reception of the high speed data. By supplying
`power to the linear demodulator and high speed data
`storage sections only during the transmission of high
`speed data, the receiver battery life can be greatly ex(cid:173)
`tended as compared to receiving all information in the 30
`linear modulation format.
`An alternate embodiment of the signaling format for
`the dual mode receiver of the present invention is
`shown in FIG. 2D. In this embodiment, information is
`transmitted on two channels, a first channel 250 which
`is utilized for the transmission of low speed message
`information modulated in an FM modulation format,
`and a second channel 252 which is utilized for the trans(cid:173)
`mission of high speed message information modulated
`in a linear modulation format. The batches oflow speed 40
`data 204A-206A overlay in time the batches of high
`speed data 204B-206B. The dual mode receiver of the
`present invention operates on the first channel receiving
`message information, which can include conventional
`numeric or alphanumeric messages intended for the 45
`dual mode receiver. When Jong alphanumeric messages
`or voice messages are to be transmitted, the message
`pointer information is transmitted on the first channel
`directing the dual mode receiver to a predetermined
`message batch to be transmitted on the second channel.
`After having received the pointer information, the dual
`mode receiver selects the second channel for receiving
`the high speed message information during the prede(cid:173)
`termined batch identified by the pointer. After having
`received the high speed message, the receiver again 55
`selects the first channel. The alternate embodiment of
`the present invention shown in FIG. 2D allows a very
`efficient method of mixing conventional paging receiv(cid:173)
`ers which receive information modulated in an FM
`modulation format, with the dual mode receivers of the 60
`present invention by maintaining all low speed message
`transmission on the first channel, and all high speed
`message transmission on the second channel. This ena(cid:173)
`bles the use of conventional signaling formats to be
`utilized for the transmission of information in the 65
`batches 204A-206A on the first channel, enabling both
`conventional receivers and dual mode receivers to be
`readily intermixed.
`
`8
`FIG. 3 is an expanded electrical block diagram which
`will be used to describe the receiver operation of the
`dual mode communication receiver of the present in(cid:173)
`vention. The transmitted information signal, modulated
`5 in the FM modulation format, or in a linear modulation
`format, is intercepted by the antenna 302 which couples
`the information signal to the receiver section 102, and in
`particular to the input of the radio frequency (RF) am(cid:173)
`plifier 306. The message information is transmitted on
`10 any suitable RF channel, such as those in the high band,
`UHF band, and 900 MHz band, The RF amplifier 306
`amplifies the received information signal, such as that of
`a signal received on a 930 MHz paging channel fre(cid:173)
`quency, coupling the amplified information signal 306A
`15 to the input of the first mixer 308. A first oscillator
`signal 310A, which is generated in the preferred em(cid:173)
`bodiment of the present invention by a frequency syn(cid:173)
`thesizer 310, also couples to the first mixer 308. The first
`mixer 308 mixes the amplified information signal 306A
`and the first oscillator signal 310A, to provide a first
`intermediate frequency, or IF, signal 308A, such as a 45
`MHz IF signal, which is coupled to the input of the first
`IF filter 312. It will be appreciated that other IF fre(cid:173)
`quencies can be utilized as well, especially when other
`paging channel frequencies are utilized. The output of
`the IF filter 312 which is the on-channel information
`signal 312A, is coupled to the input of the