` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_______________________________________________________
` )
`ADVANCED MICRO DEVICES, )
` )
`INC., )
` ) Case
`Petitioner, ) IPR2019-1525
` )
`v. ) Patent 6,239,614
` )
`AQUILA INNOVATIONS, INC., )
` )
`Patent Owner. )
` )
`_______________________________________________________
` Oral Deposition of STEVEN A. PRZYBYLSKI, PhD
` Conducted Remotely
` Friday, August 28, 2020
` 10:04 a.m. EDT
`
`Job No.: 316439
`Pages: 1 - 116
`Reported By: Lisa A. Knight, CRR, CLR, RSA
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`AMD EX1047
`AMD v. Aquila
`IPR2019-01525
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`2
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` Oral Deposition of Steven A. Przybylski,
`PhD, conducted remotely:
`
` Pursuant to Notice, before Lisa A.
`Knight, Realtime Diplomate Reporter, Certified
`Realtime Reporter, and Realtime Systems
`Administrator.
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`3
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` A P P E A R A N C E S
` (All appearing remotely)
`ON BEHALF OF THE PETITIONER:
` CHRISTOPHER R. O'BRIEN, ESQUIRE
` MICHAEL D. SPECHT, ESQUIRE
` STERNE KESSLER GOLDSTEIN & FOX, P.L.L.C.
` 1100 New York Avenue, NW
` Suite 600
` Washington, DC 20005
` 202.772.8735
`ON BEHALF OF THE PATENT OWNER:
` GENE CHERNG, ESQUIRE
` FREITAS & WEINBERG LLP
` 350 Marine Parkway
` Suite 200
` Redwood Shores, California 94065
` 650.593.6300
`ALSO PRESENT:
` DANNY TERRY, Deposition Technician
` IAN ROWE, Deposition Technician
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`4
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` C O N T E N T S
`
`EXAMINATION OF STEVEN A. PRZYBYLSKI, PhD: PAGE
` By Mr. O'Brien 6
`
` E X H I B I T S
` (Attached to transcript.)
` PAGE
` Exhibit 1001 U.S. Patent 6,239,614 41
` (Morikawa)
` Exhibit 1008 Japanese Unexamined Patent 71
` Application Publication
` H10-125878
` Exhibit 1013 Unexamined Patent 94
` Applications H08-018021A
` (Mutoh)
` Exhibit 2002 Declaration of Dr. Steven 12
` A. Przybylski
` Exhibit 2004 Excerpt of VLSI Design by 78
` M. Michael Vai
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`5
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`Exhibit 2005 Excerpt of Digital 52
` Integrated Circuits, A
` Design Perspective, Second
` Edition, by Rabaey and
` others
`Exhibit 2006 Excerpt of Microchip 52
` Fabrication, A Practical
` Guide to Semiconductor
` Processing, Sixth Edition,
` by Peter Van Zant
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`6
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` P R O C E E D I N G S
` (August 28, 2020, at 10:04 a.m.)
` THE STENOGRAPHER: Will counsel please
`stipulate that in lieu of formally swearing in the
`witness, the reporter will instead ask the witness
`to acknowledge that his testimony will be true
`under the penalties of perjury, that counsel will
`not object to the admissibility of the transcript
`based on proceeding in this fashion, and that the
`witness has verified that he is, in fact, Steven A.
`Przybylski?
` MR. O'BRIEN: Yes. Okay by
`petitioner.
` MR. CHERNG: Yes for patent owner.
` STEVEN A. PRZYBYLSKI, PhD,
`having agreed to tell the truth under penalty of
`perjury, testified as follows:
` EXAMINATION
`BY MR. O'BRIEN:
` Q. Good morning. Could you please state
`your full name for the record.
` A. Steven Przybylski.
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` Q. And do you understand you're under
`oath today?
` A. Effectively, yes.
` Q. And what do you mean by "effectively"?
` A. We just went through a long rigamarole
`that I am -- acknowledged that my testimony is
`under the penalties of perjury but not actually
`sworn in per normal procedure if we were not
`virtual. So yes.
` Q. Thank you.
` Is there any reason you cannot give
`your truthful and complete testimony today?
` A. There is no reason.
` Q. I understand you've been deposed
`before. Is that right?
` A. Yes.
` Q. And how many times have you been
`deposed?
` A. I don't remember the exact number.
`It's somewhere around 15.
` Q. And just generally, what was the
`subject matter of those depositions?
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` A. They have all been in the context of
`either litigation support or in proceedings before
`the ITC or before the Patent Board.
` Q. And I know you've been through a
`deposition multiple times, but just to go over some
`ground rules so that we can try to get a clean
`record.
` Please provide verbal answers, and
`let's try to not speak over each other. Of course,
`if you have a question or my question is unclear,
`please let me know, and I'll try to clarify.
` I'll try to break about every hour,
`but, of course, if there is a question pending,
`you'll need to answer that before we go into a
`break.
` Does that sound okay?
` A. Yeah. I do have a question -- a
`technical question: You phoned in, and so your
`voice is not linked to your video, and so I only
`see you in the little box up above.
` THE DEPONENT: Is there a way for the
`tech people to associate his phone in with his
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`video?
` MR. O'BRIEN: Danny, would that be
`possible?
` TECHNICIAN TERRY: We can,
`Mr. O'Brien. We'll just have to disconnect your
`phone audio, and then we can reconnect that.
` But would you like to go off the
`record for that?
` MR. O'BRIEN: Sure. I'll redial back
`in.
` (Recess: 10:08 a.m. to 10:09 a.m.)
`BY MR. O'BRIEN:
` Q. Are you represented by counsel today?
` A. Am I personally represented? No.
` Q. And who are you appearing on behalf of
`today?
` A. I am appearing on behalf of
`Mr. Cherng's law firm and their client.
` Q. And just for the record, you're in
`your personal residence; correct?
` A. Correct.
` Q. And could you please describe your
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`environment?
` A. This is my home -- one of my home
`offices.
` Q. And do you have any materials with
`you?
` A. Not in this room, no.
` Q. You understand you're here today to
`testify in an inter partes review proceeding
`related to U.S. Patent No. 6,239,614?
` A. Yes.
` Q. And you are testifying as a technical
`expert today; right?
` A. Yes.
` Q. How did you become involved in this
`proceeding?
` A. I was reached out to by either
`Mr. Cherng or one of his associates with regard to
`my availability to participate in this set of IPRs.
` Q. And do you recall when they contacted
`you?
` A. It was towards the middle of last year
`sometime. I don't know exactly when.
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`11
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` Q. And how did you prepare for the
`deposition today?
` A. For this deposition, I prepared by
`reviewing my declaration; the principal references
`cited therein, including the patent at issue; and
`also Dr. Holberg's declaration.
` Q. Did you review the Board's institution
`decision?
` A. No, I did not.
` Q. Did you review or have you read AMD's
`surreply?
` A. I may have read it at some point in
`the past. I have not read it in -- as part of my
`review process.
` MR. CHERNG: I'm sorry, Counsel. Did
`you say "surreply"?
` MR. O'BRIEN: I didn't hear that.
` MR. CHERNG: Did you say "surreply"?
`I don't think I heard that.
` MR. O'BRIEN: Yeah. Surreply.
` MR. CHERNG: Okay. Thanks.
`///
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`12
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`BY MR. O'BRIEN:
` Q. So I'd like to go ahead and introduce
`Exhibit 2002.
` TECHNICIAN TERRY: Stand by, please.
`2002.
` (Previously marked Deposition Exhibit
`2002 tendered to the deponent.)
`BY MR. O'BRIEN:
` Q. Doctor, could you please go ahead and
`download Exhibit 2002.
` A. I am doing so.
` Download and open, I presume; right?
` Q. Yes, please.
` (Pause.)
` A. I have done so.
` Q. Do you recognize this document?
` A. Yes. It is my declaration in this
`matter.
` Q. And could you please turn to page 67?
` A. I am there.
` Q. And your signature is on page 67?
` A. Yes, it is.
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`13
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` Q. Are there any corrections or errors in
`your declaration that you'd like to make today?
` A. I did not see any substantial errors
`when I was reviewing it. There's a couple of
`typographical things, but nothing worth noting at
`this point.
` Q. So your declaration is complete and
`accurate?
` A. I believe so.
` Q. And how many hours did it take you to
`prepare your declaration?
` A. I don't have a firm recollection.
`That was quite a while ago that we prepared -- that
`I prepared my declaration. It was over a
`several-week period, so tens -- tens of hours.
` Q. And Exhibit 2002 contains all of your
`opinions with respect to the '614 patent?
` A. Yes, all of my formal opinions with
`respect to this patent.
` Q. Have you submitted declarations in
`other proceedings on behalf of the same law firm?
` A. Yes.
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` Q. And do you recall how many proceedings
`or how many declarations?
` A. Three, with regard to this set. And
`that's the only collection that I can recall with
`this firm.
` Q. Please turn to page 2 of your
`declaration.
` A. Yes.
` Q. In paragraph 6, you state that you've
`"considered" the '614 patent, its prosecution
`history, AMD's IPR petition, the declaration of
`Dr. Holberg, the prior art references identified in
`the petition and Dr. Holberg's declaration, my
`experience and expertise in the art, and additional
`materials cited herein." [as read]
` The list that you provide in
`paragraph 6, that is the extent of the material you
`considered in forming your opinions?
` A. That is the list of materials that I
`relied on, yes.
` Q. You didn't rely on any other material
`that you did not cite in your declaration?
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`15
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` A. I may have reviewed other materials;
`these are the materials I relied on.
` Q. In paragraph 8 of your declaration,
`you state that, in your opinion, "one of ordinary
`skill in the art would not have been motivated to
`combine the Urano and Mutoh '021 references because
`no improvement would result from such a
`combination"; right?
` A. That is the text of paragraph 8, yes.
` Q. In your opinion, without an
`improvement, would no person with skill in the art
`combine two prior art references?
` MR. CHERNG: Object to form.
` A. An improvement from the combination is
`a central idea that we look at to understand a
`motivation to combine.
`BY MR. O'BRIEN:
` Q. So in your opinion, if there was an
`improvement resulting from the combination, it
`would have been obvious to a person of skill in the
`art to combine the teachings of two references?
` A. No. It is a -- not a sufficient
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`16
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`condition; it is a necessary condition, if you
`will. Or at least it's one of several factors that
`goes into a motivation-to-combine analysis.
` Q. What do you mean by "a necessary
`condition"?
` A. If a combination that results from --
`or an embodiment that results from a combination of
`two references does not have -- does not
`demonstrate an improvement, that's difficult to say
`that there is a motivation to combine them, that a
`person of ordinary skill looking at those two
`reasons would find a reason to construct that
`hypothetical embodiment.
` So that's the basis for my previous
`statement.
` Q. Okay. So absent an improvement, there
`would be no motivation to combine two references.
` A. There may be some circumstances where
`there may be a motivation based on other
`characteristics, but certainly in this matter, with
`the absence of an improvement from that
`combination, that it severely detracts from the
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`17
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`presumed motivation combine that Dr. Holberg relies
`on.
` Q. So in some situations, even if there
`is not an improvement from the combination of two
`references, there could still be a motivation to
`combine?
` A. Not in my experience, but I'm leaving
`that possibility open. I'm not -- there may be
`issues of law that I'm not familiar with.
` Certainly in my analysis from a
`technical perspective, there needs to be an
`improvement in order to have a motivation for a
`person of ordinary skill to combine the two
`references. That's a central aspect of the
`technical basis for a motivation to combine.
` Q. In paragraph 19 of your declaration,
`in the Legal Standards section, you provide a
`couple of paragraphs with respect to obviousness;
`right?
` A. Yes.
` Q. And that's from paragraphs 19 through
`26; correct?
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` A. (Document(s) reviewed.)
` Correct.
` Q. And the standard for your
`understanding you articulate in these paragraphs
`from 19 to 26, is that your understanding of
`obviousness you applied when reaching your
`conclusions reflected in your declaration?
` A. (Document(s) reviewed.)
` Yes.
` Q. Are you aware of any rationale that
`can support a conclusion of obviousness aside from
`what you describe in paragraphs 19 through 26 of
`your declaration?
` THE STENOGRAPHER: Mr. Cherng, I can
`barely hear you. I think you objected to form,
`but...
` MR. CHERNG: Object to form.
` (Discussion off the record.)
` THE DEPONENT: Yeah, I didn't hear
`that objection at all, so just -- if you want me to
`be aware of them, then you need to speak up as
`well.
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` A. I'm sorry. Would you repeat the
`question, please?
`BY MR. O'BRIEN:
` Q. Sure.
` Are you aware of any rationale that
`can support a conclusion of obviousness aside from
`what you describe in paragraphs 19 through 26 of
`your declaration?
` A. Not off the top of my head right now,
`no.
` Q. So you don't know if combining prior
`art elements according to known methods to yield
`predictable results could support a conclusion of
`obviousness?
` A. Yes, I am aware of that as being one
`of the rationales that goes into a
`motivation-to-combine analysis.
` TECHNICIAN ROWE: Counsel, I very much
`apologize. Mr. Cherng, I think you probably
`objected. Can you please just speak for us so we
`can see if your mic is working?
` THE DEPONENT: He currently is muted.
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` (A discussion was had off the record.)
`BY MR. O'BRIEN:
` Q. You did not list that potential
`rationale in your understanding of obviousness in
`paragraphs 19 through 26; correct?
` A. Let me review those paragraphs in more
`detail.
` (Document(s) reviewed.)
` No, I don't list that particular
`aspect of the analysis and motivation to combine in
`those paragraphs.
` Q. Are you aware of the term "enablement"
`in the patent context?
` A. As a legal term? Yes, I am aware of
`it. Yes.
` Q. Do you have any understanding of what
`that term means in the patent context?
` A. Generally speaking, yes.
` Q. And what is that understanding?
` A. That a patent enables a teaching or a
`claimed invention if there is sufficient disclosure
`in its specification or -- and/or initial claim set
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`to allow a person of ordinary skill to replicate or
`use the invention without any undue
`experimentation.
` Q. In your opinion, is the '614 patent
`enabled?
` MR. CHERNG: Objection. Outside the
`scope.
` A. I don't have a formal opinion on the
`enablement of the '614.
`BY MR. O'BRIEN:
` Q. So you have not considered whether the
`'614 patent is enabled?
` A. Again, that's not part of what I've
`opined on in my declaration.
` Q. Do you have any reason to believe that
`the '614 patent is not enabled?
` MR. CHERNG: Objection. Outside the
`scope.
` A. Without proper consideration of the
`issue, I have neither reason to suspect it is
`enabled or that it is not enabled. I just stayed
`away from that issue entirely and focused on
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`critiquing Dr. Holberg's analysis.
`BY MR. O'BRIEN:
` Q. In paragraph 27, you state that you
`have not considered objective evidence of
`nonobviousness in this case; right?
` A. Yes, that is paragraph 27.
` Q. Are you aware of any objective
`evidence of nonobviousness?
` A. I'm aware that there may be some, but
`I don't know what it is.
` Q. And when you mean [sic] that there may
`be some, what do you mean by that?
` A. There may be a section to that effect
`in the patent owner reply, but I did not rely on
`that document. I have not reviewed it in a long
`time, so that my familiarity with any objective
`evidence of nonobviousness that may or may not be
`there is limited to none.
` Q. So did you review the patent owner
`reply?
` A. Not in preparation for this
`deposition, no.
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`23
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` Q. Have you reviewed it outside of the
`preparation of this deposition?
` A. I likely read it back when my
`declaration was being prepared, or perhaps a draft
`of it, but that was quite a while ago.
` Q. What is your understanding of "claim
`construction" in the patent context?
` MR. CHERNG: Objection. Outside the
`scope.
` A. Claim construction at large, is that
`what you're asking?
`BY MR. O'BRIEN:
` Q. In the patent context, generally.
` MR. CHERNG: Same objection.
` A. Claim construction is a portion of the
`entire process by which a fact finder makes a
`determination on, and elaboration on, particular
`terms that may be found in claims in order to help
`clarify the scope of the claims.
`BY MR. O'BRIEN:
` Q. You did not offer any opinions in your
`declaration regarding claim construction; right?
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`24
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` A. That is correct, yes.
` Q. Please turn to page -- I'm sorry --
`paragraph 34 of your declaration.
` A. Okay.
` Q. About the middle of the paragraph, you
`refer to the idea behind MTCMOS (multi-threshold
`CMOS). Right?
` A. Yes, I do.
` Q. And what is MTCMOS?
` A. The term is used slightly differently
`in different contexts. In some contexts, it refers
`to a semiconductor process that includes at least
`two flavors of transistors with different threshold
`voltages. In other contexts, it also refers to
`circuit technologies or circuit configurations that
`make use of that processing technology.
` Q. And when you said "two flavors of
`transistors with different threshold voltages,"
`what did you mean by that?
` A. An intrinsic characteristic of a MOS
`transistor is its threshold voltage. And so MTCMOS
`processes have low threshold voltage transistors
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`25
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`and high threshold voltage transistors.
` Q. The inventor listed on the '614 patent
`did not invent MTCMOS; right?
` MR. CHERNG: Form and outside the
`scope.
` A. I am not aware whether he invented
`MTCMOS. It's clear that that term is used in the
`prior art. He may, in fact, have been the first to
`coin the term in a previous reference. I'm not
`aware.
`BY MR. O'BRIEN:
` Q. Did he invent MOS transistors with low
`threshold voltages?
` MR. CHERNG: Objection. Outside the
`scope.
` A. No. Threshold voltages of MOS
`transistors have -- vary from process to process,
`depending on the design requirements. Some
`processes have higher threshold voltages; some have
`lower threshold voltages. Particularly, there is a
`migration towards lower threshold voltages over
`time.
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`26
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`BY MR. O'BRIEN:
` Q. But the idea behind using two
`variations of transistors, one set with a high
`threshold voltage and another set with a lower
`threshold voltage, together in an integrated
`circuit, the inventor of the '614 patent did not
`invent that idea; right?
` MR. CHERNG: Object to form. Outside
`the scope. Asked and answered.
` A. I don't know who first came up with
`that idea, whether it was him or not. But it's
`clearly in the -- that idea is in the prior art
`of -- as of the filing date of the '614.
`BY MR. O'BRIEN:
` Q. In paragraph 36 of your declaration,
`you refer to a standard cell and a gate array; is
`that correct?
` A. I do.
` Q. And what is a standard cell?
` A. I describe in that paragraph several
`design styles, ways of implementing integrated
`circuits given a specific process.
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`27
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` In a standard cell design style, the
`logic of the final integrated circuit is expressed
`in terms of a collection of standard building
`blocks, each one of which is implemented in the
`silicon as a rectangular collection of transistors
`and wires that is replicated exactly wherever that
`building block exists within the logic design of
`the integrated circuit.
` In a standard cell design style, all
`of those physical implementations of the different
`building blocks have a consistent height and
`consistent interface between them on the left and
`right edges but variable width.
` Q. The standard cell design style existed
`before the '614 patent; right?
` A. Oh, yes.
` Q. In paragraph 36, you also refer to the
`gate array circuit design style; right?
` A. Yes.
` Q. And what is the difference between the
`standard cell design style and the gate array
`design style?
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`28
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` A. As I described what a standard cell is
`just a moment ago, in contrast, in a gate array
`design style, the logic design is fractured into
`smaller components, typically a single gate.
` And that those gates are implemented
`in the final integrated circuit by customizing a
`standard unit cell, to use the terminology of the
`'614, that -- and so all of the building blocks at
`the smallest level are implemented on the same
`types -- small number of types of unit cells. And
`they are individually customized with metal to form
`particular gate types and gate strengths.
` Q. The gate array design style was also
`known before the '614 patent --
` A. Yes.
` Q. -- correct?
` If you could go back to paragraph 34.
`The last sentence, you refer to power switches;
`correct?
` A. I do.
` Q. And the power switches you describe,
`those were also known before the '614 patent;
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`29
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`right?
` A. In general, yes.
` Q. Your description in the last sentence
`of paragraph 34, that's describing power switches
`that were known before the '614 patent?
` A. Yes.
` Q. In paragraph 35 of your declaration,
`you refer to two different phases of circuit
`design. Could you explain what you mean there?
` A. The -- an integrated circuit can be
`viewed at different levels of conceptualization; a
`digital integrated circuit, in particular.
` There is the logic gates, represented
`in terms of gates and their interconnection. And
`there's also the physical implementation of those
`gates: the transistors, the wires, and other
`components that are -- implement those gates and
`are actually implemented on a piece of silicon or
`other semiconductor to effect the integrated
`circuit.
` Q. In paragraph 36, you refer to the
`standard cell and the gate array design styles, and
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`Conducted on August 28, 2020
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`30
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`the development of the logic and the mapping of
`that logic design onto the library are performed by
`two separate groups of engineers with different
`skills and concerns, often working in different
`companies.
` What specific groups of engineers are
`you referring to here?
` A. Well, let's consider gate arrays, in
`particular. A gate array integrated circuit, as,
`for example, disclosed in the '614, it consists of
`a predefined configuration of unconfigured unit
`cells and a peripheral set of circuitry, including
`pads and, in that case, also power switches. Other
`support circuitry would exist outside of the unit
`cell array as well.
` So all -- the design of that base
`unconfigured gate array is done by one group of
`engineers that are experts in the -- in circuit
`design, in power distribution, in -- all of the
`design tradeoffs that go into turning a raw process
`into a platform on which logic design can be
`implemented.
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
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`31
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` So that's typically in a gate array
`semiconductor company that sell gate arrays.
` Separately, operating in a different
`company, at a different time even, there are a
`group of engineers that are tasked with
`implementing a particular integrated circuit. So a
`base gate array can implement any number -- large
`number of different integrated circuits because
`it's unconfigured. It's inherently very flexible
`in terms of what logic it can implement, given
`customization in the metal layers.
` In the other company operating at
`another time, the logic designers and system
`architects design a particular integrated circuit
`by specifying its architecture, its logic, its
`interface to the outside world. And then there are
`a set of tools that help them map that logic design
`onto a particular gate array from a particular
`other company that is selling it -- manufacturing
`it and selling it to a systems company.
` Q. So the first company you referred to
`that was designing the base unconfigured gate
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`Transcript of Steven A. Przybylski, Ph.D.
`Conducted on August 28, 2020
`
`32
`
`array, are they developing the -- what you referred
`to as a library?
` A. Yes.
` Q. And the second company that you were
`referring to, they would use that library to design
`a particular integrated circuit?
` A. Yes. Basically, that's correct.
` Q. And focusing on the second company and
`how they would design a particular integrated
`circuit, could you describe the process that they
`would go through.
` A. These design flows are laid out in
`some of the references that I include as exhibits
`to my declaration. But in brief, a -- if there's a
`need for an integrated circuit, for example, to
`control an elevator, then an architect would
`conceptualize what that integrated circuit needs to
`do in terms of the functionality of the logic that
`it would perform.
` That architect would work with logic
`designers to specify that integrated circuit in
`terms of its logic, typically working at an
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