Trials@uspto.gov
`571-272-7822
`
`Paper 38
`Entered: January 4, 2021
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`
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`ADVANCED MICRO DEVICES, INC.,
`Petitioner,
`
`v.
`
`AQUILA INNOVATIONS, INC.,
`Patent Owner.
`____________
`
`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`____________
`
`Record of Oral Hearing
`Held: December 11, 2020
`____________
`
`Before SALLY C. MEDLEY, DENISE M. POTHIER, and
`AMBER L. HAGY, Administrative Patent Judges.
`
`
`
`571-272-7822
`
`Paper 38
`Entered: January 4, 2021
`
`
`
`
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`ADVANCED MICRO DEVICES, INC.,
`Petitioner,
`
`v.
`
`AQUILA INNOVATIONS, INC.,
`Patent Owner.
`____________
`
`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`____________
`
`Record of Oral Hearing
`Held: December 11, 2020
`____________
`
`Before SALLY C. MEDLEY, DENISE M. POTHIER, and
`AMBER L. HAGY, Administrative Patent Judges.
`
`
`
`
`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`
`APPEARANCES:
`
`ON BEHALF OF PETITIONER:
`
`
`
`MICHAEL D. SPECHT, ESQUIRE
`DAN BLOCK, ESQUIRE
`CHRISTOPHER R. O’BRIEN, ESQUIRE
`LAUREN C. SCHLEH, ESQUIRE
`Sterne, Kessler, Goldstein & Fox P.L.L.C.
`1100 New York Avenue NW Suite 600
`Washington, D.C. 20005
`
`
`
`
`
`
`ON BEHALF OF PATENT OWNER:
`
`
`
`
`
`
`
`JING H. CHERNG
`Freitas & Weinberg, LLP
`350 Marine Parkway Suite 200
`Redwood City, CA 94065
`(650) 593-6300
`
`
`
`
`
`The above-entitled matter came on for hearing on Friday, December
`
`11, 2020, commencing at 10:00 a.m. EDT, via Video/Teleconference.
`
`
`
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`2
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`
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`
`
`P R O C E E D I N G S
`- - - - -
`JUDGE HAGY: This is our combined hearing for IPR2019-1525
`
`and IPR2019-1526 between Petitioner Advanced Micro Devices, Inc. and
`Patent Owner Aquila Innovations, Inc. The challenged patents are
`6,239,614B1 and 6,895,519B2, respectively. I’m Judge Hagy. With me
`today on the panel are Judges Medley and Pothier.
`
`So let’s go ahead and start with counsel introductions. Petitioner,
`please identify yourself, who will present arguments.
`
`MR. SPECHT: Good morning, Your Honor. This is Michael Specht
`on behalf of Petitioner. I will be arguing for the 1525 IPR for the 614
`patent. And my colleague Dan Block will be arguing for the 1526 IPR.
`
`JUDGE HAGY: Thank you. And for Patent Owner.
`
`MR. CHERNG: Good morning. My name is Jing Cherng on behalf
`of Patent Owner Aquila Innovations, Inc. and I will be arguing both patents.
`
`JUDGE HAGY: Okay, great. Welcome everyone, it’s great to have
`you here. And we appreciate that you’re doing this by video. So if at any
`time during the proceeding you encounter any kind of technical difficulties, I
`think you’ve been in communication with our IT team so please reach out to
`them for any information on reconnecting and please just let us know. We
`want to make sure that everyone can be heard, present their arguments.
`
`So we set forth the procedure for the hearing in the Order. We’re
`going to hear both of the cases at the same time, but our plan is to hear the
`complete arguments on 1525 and then we can turn to the complete
`arguments on 1526. I think that especially makes sense given that Petitioner
`is going to have different counsel argue for each of the cases. So are there
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`IPR2019-01526 (Patent 6,895,519 B2)
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`any questions or concerns about that before we keep going? That’s good?
`Okay.
`
`As we said in the Order, each of the parties has 60 minutes to present
`its arguments, which they may divide up as they see fit between the two
`cases. So you know there’s no need that you have to spend an exact amount
`at the same time, 30 and 30 on each case, you can divide it as you would
`like.
`We do have the whole record in front of us, including the slides that
`
`were submitted on Tuesday. And we also have received Petitioner’s
`objections to some of Patent Owner’s slides. At this point we’re not going
`to make a ruling on those objections. Patent Owner may present those slides
`and Petitioner may point out as part of its argument issues it has with the
`slides and we will take those under advisement.
`
`So we have a clear record, because we have your slides, we will
`follow along on our screen, it’s especially important to let us know which
`slide number that you’re on, any exhibits or anything that you’re
`referencing, and maybe give us a second to make sure that we can find it if
`you’re jumping around. Also please mute the line when you’re not
`speaking, and if it has been a little while since you have spoken, please
`identify yourself for the court reporter.
`
`After our time is up we’re going to pause and just check in with the
`court reporter, see if there are any spellings or any concerns to address. But
`our court reporter does have a lot of the materials so the spellings should be
`clear from the record.
`
`So as you’ll know, the Petitioner does bear the burden of persuasion
`here and will proceed first, followed by Patent Owner. Petitioner may
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`reserve time for rebuttal. Patent Owner may reserve time for sur-rebuttal.
`Again, as I previously mentioned, we’re going to go case by case. So at this
`point please let us know how you would like to divide up your time.
`Petitioner?
`
`MR. SPECHT: Thank you. Yes, Your Honor. We intend to use 30
`minutes for the 1525 matter and I would like to reserve 10 minutes for
`rebuttal in that matter.
`
`JUDGE HAGY: Okay. And so do you want to do this, are you going
`to do the same in both cases, 30 with 10 rebuttal?
`
`MR. BLOCK: Yes, Your Honor. This is Daniel Block on behalf of
`AMD. We’re 30 on the second one.
`
`JUDGE HAGY: Okay. And Patent Owner?
`
`MR. CHERNG: Same for me as well, Your Honor, thank you.
`
`JUDGE HAGY: Okay. So obviously, you know, we’re all at home or
`in our office, we don’t have the traffic light system to let us know, so I
`assume that you guys will keep time. But would you like us also to, I’ve got
`a little stopwatch here, I can let you know how much time that I have
`according to me, how much time you have left. Do you want any sort of a
`warning when you’re nearing the end of say 20 minutes and running into
`your rebuttal time?
`
`MR. SPECHT: Your Honor, yes, this is Mike Specht. That would be
`helpful, thank you.
`
`JUDGE HAGY: Okay.
`
`MR. CHERNG: Your Honor, this is Jing Cherng. That would be
`very helpful for me too. Thank you.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`JUDGE HAGY: Okay, great. All right. So, again, we want to keep
`
`the arguments focused on the merits of the case so I assume you guys are
`experienced at this. We don’t interrupt the other side to make objections,
`you know, this is not district court. You can raise and discuss any objections
`you have to the other side’s evidence arguments during your own time for
`response, rebuttal, sur-rebuttal, et cetera.
`
`So with all of that I just want to make sure the court reporter is on and
`ready and everyone can be clearly heard and seen. All good?
`
`COURT REPORTER: Yes, Your Honor.
`
`JUDGE HAGY: All right. So with that we’re going to go ahead and
`begin with Petitioner’s arguments on 1525.
`
`MR. SPECHT: Thank you, Your Honor, and good morning to all of
`the judges again. Just for the record my name’s Michael Specht, here on
`behalf of Petitioner AMD. With me on this particular case is also Chris
`O’Brien, one of the counsels as well. He is also at the firm of Sterne,
`Kessler.
`
`I would like to begin by directing your attention to our Slide 2. This
`is a quick summary of the case. As you know, there are three grounds.
`Grounds 1 and 2 address Claims 1 and 3, and Ground 3 addresses Claims 4
`and 5. There are two independent claims, Claim 1 and Claim 4. I will direct
`most of my time today to Ground 1. The arguments that we make for
`Ground 1 are very similar to those for Ground 2. I’ll certainly be happy to
`answer any questions you may have but given the time limits I’ll focus on
`Ground 1, and will briefly touch on Ground 3 with respect to Claims 4 and
`5.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`
`At the onset I would observe that with respect to Ground 3, Patent
`
`Owner’s arguments are mere attorney arguments. They provide no expert
`declaration in support of their positions with respect to Ground 3.
`
`Now turning to our Slide 3. A quick overview. First of all it’s our
`view that the Petition could have demonstrated that all claims, Claims 1
`through 5 were challenged, are unpatentable. It is also undisputed in the
`record that the prior art discloses each and every claim element. The only
`dispute to this point, we are looking here first with respect to Ground 1 and
`2, whether a person of ordinary skill in the art would be motivated to
`combine the references that were used. And similarly with respect to
`Ground 3, a motivation to combine argument. I will obviously focus my
`attention on the motivation to combine argument.
`If we now turn to Demonstrative Slide 4, Petitioner’s Slide 4 where
`we have laid out the claim here with Independent Claim 1. And what you
`see highlighted in yellow is in fact the only claim term that is in dispute with
`respect to the motivation to combine. The argument being that we have not
`demonstrated a motivation to combine the references in Ground 1 or Ground
`2 to disclose this element of a power switch.
`To give ourselves some context in the patent, I’d like to now turn to
`Demonstrative Slide 5. Demonstrative Slide 5 is just to give us bearings for
`the claim. What you see highlighted in red are the unit cells with a low
`threshold MOSFETS. What you see in the blue, the high threshold
`MOSFETS, these are the initial elements of the claim. And what’s critical
`for discussion today is what’s highlighted in green are the power switches
`disclosed around the gate array. And I’ll focus my comments on that as
`mentioned.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
`
`
`Now turning to Slide 8, Petitioner Demonstrative Slide 8. We focus
`in on our combination with respect to that element, the power switch
`element. In Ground 1 we rely on two references, Urano reference and
`Mutoh021. It’s our view that Urano discloses all elements to meet the claim.
`It discloses the power switch but it doesn’t explicitly talk about disposed
`around that element of the power switch claim, or claim element. And that’s
`what we bring Mutoh021 in for, to disclose the power switch disclosed or
`disposed around the gate array.
`Turning to Demonstrative Slide 9, Demonstrative Slide 9 is
`highlighting very briefly the Urano reference showing the power switch,
`highlighted in green. In Urano there’s no dispute that it teaches the gate
`array. And you see here highlighted that it has the power switch cells on the
`vertical, on the right and left on the vertical. And as I mentioned earlier
`there, it does not explicitly disclose that the power switches are comprised
`around the gate array, which is what we use Mutoh021 for which is
`presented on our next slide, Demonstrative Slide 10.
`Demonstrative Slide 10 we’re showing two figures from Mutoh021.
`These figures highlight they have power switches either on the vertical or
`the horizontal ends of the gate array. But what’s critical about this slide and
`critical about the disclosure of Mutoh021 is what’s highlighted at the bottom
`of this slide in yellow. Where it clearly indicates that the power switches are
`disclosed or disposed at all ends vertically and horizontally, thus meeting the
`disposed around limitation.
`So there really is no dispute that Urano teaches the elements of the
`claim that lead to Mutoh021 teaches disclosed round. The dispute is that a
`person of ordinary skill in the art would not be motivated to combine these
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`two references. And we think there’s no basis in that. Patent Owner’s
`arguments, they’re basically alleging that our expert’s testimony is
`conclusory, our positions are based on hindsight, et cetera. We don’t believe
`that to be the case.
`And if we now turn to Petitioner’s Demonstrative Slide 11, we talk
`about this issue. So here what we’re highlighting is the support that we
`provided to show the motivation to combine. And we’ve highlighted a
`couple points on this slide. First of all, Dr. Holberg, an industry expert with
`40 years of experience in this art, identified the motivations to combine,
`design efficiencies of reduced noise and voltage drops due to parasitic
`resistance but would be achieved if you add the power switches on all four
`sides of the cell or all four sides and then within the cell array.
`And that’s corroborated here, it’s not just his opinion, but it’s what
`was known at the time by a person of ordinary skill in the art. And we make
`reference here to Exhibit 1025. Exhibit 1025 is the CMOS textbook, which
`as you can see from the text here, is highlighting this issue. Many of the
`problems encountered with designing a chip can be related to the distribution
`of power and ground. So it’s highlighting the issue, but more critically is the
`next corroborating reference, Exhibit 1017. This is a 1984 IEEE article.
`And you see the quote that we have highlighted here, the power supply
`terminals are located on all four sides of the chip. And the chip in that
`reference is also a gate array, to reduce the voltage drops in power busses
`caused by the maximum power supply current.
`So not only do we have an expert with 40 years of experience talking
`about why one would be motivated to place power switches around the gate
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`array, but we also have a reference from 1984 highlighting and supporting
`that position.
`Now additionally beyond this --
`JUDGE HAGY: Counsel, I have a quick question on this. Does it
`need to be the case that having it on all four sides is the best arrangement?
`MR. SPECHT: It does not. Case law is clear we just have to show an
`advantage, we don’t have to distinguish between multiple different design
`choices essentially. This clearly has an advantage of having it dispersed
`around all four, or around the gate array. And we addressed that question
`even more specifically, Your Honor, in our Petitioner Reply, which again
`was supported by Dr. Holberg’s Declaration. And I would reference his
`Declaration at Paragraphs 22 of Dr. Holberg’s Declaration where he talked
`about the specific advantages of having the power switches disposed
`completely around. And he focused on how that improves power
`performance to cells that are in the gate array, that are in the middle of the
`gate array. It reduces glitches, power glitches, and has improved
`performance by using this particular arrangement. But even to the extent
`that we don’t need to show it, we did show it. All right. But there’s this
`specific advantage associated with power cells surrounding the chip.
`That’s further not just his opinion again, we corroborated that with an
`additional IEEE article that was entitled “20,000 Gate, CMOS Gate Array”
`where they discuss the specific advantages of the power switch reducing
`power supply glitches, pursuant to what Dr. Holberg was saying. And that
`reference is from 1983. This is a problem that industry knew about that
`persons of ordinary skill were well aware of and it was well aware to
`implement power switches around the exterior encircling the gate array.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`
`Now I may move on to Petitioner’s Slide 12. This again just further
`elaborates the point. It expands on some of the other benefits associated
`with having the power switches around the periphery of the chip. And you
`see highlighted in green there circuit design efficiencies, reducing wearing
`complexity, reducing resistance, decreasing response times, et cetera. All in
`an effort to achieve the low voltage high speed operations of Urano and gate
`array chips in general.
`JUDGE HAGY: Counsel, why is it that you suppose that if having it
`all the way around is especially advantageous, why is it that neither Urano
`nor Mutoh021 actually depicts that? I mean I know that Mutoh021, as you
`know, does describe it in one sentence, but it doesn’t actually show it in a
`figure. What can we take away from that?
`MR. SPECHT: What I take away from that is these were design
`choices that were widely known already, and in Mutoh021 was enumerating
`that the various choices, and one being surrounding the chip entirely with
`power switches. And as Dr. Holberg testified and these other references
`highlighted, there are specific advantages of that solution, particularly with
`cells that are in the middle of the gate array, improving their performance.
`Frankly I think all of this was very well known years, if not decades, before
`this alleged invention of the 614. And that’s supported by the record. It
`doesn’t really matter what I think, but that’s what the record shows.
`And moving on to Demonstratives Slide 13, Demonstrative Slide 13
`simply highlighting that this would be an easy solution. There would be no
`issues with combining these references in terms of the design consideration
`Dr. Holberg talks about. Now this was widely known to use power switches
`surrounding the gate array up to the computer-aided design tools that would
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`easily make this change. So there’s no issue about how you would combine
`these references as well.
`Now if we turn to Petitioner’s Demonstrative Slide 15. I’ll just very
`quickly sum up Patent Owner’s arguments. Here one of their arguments was
`because Urano does not disclose the problem, a POSA in the art would have
`no reason to look to Mutoh021. But we know that’s not the law. The
`decisions are long based as a legal matter and also the factual matter. This is
`one where it’s won on the law. You don’t have to have that rationale
`specifically in the reference, and that’s well documented. We just provided
`a cite here to the MPEP, and as we’ve shown, a person of ordinary skill in
`the art would have recognized or had the motivation to define these
`references by recognizing the issues with distribution of power.
`If I now turn to Demonstrative Slide 16. And this, Your Honor, I
`believe goes to you’re talking about, you know, the Patent Owner’s
`response, Mutoh does not disclose any advantage associated at all ends
`vertically and horizontally. And there’s two elements to that. One, and this
`one is incorrect, there’s two aspects. One, in the absolute are there any
`advantages discussed? And then relative to all the other potential
`arrangements for power switches, are there advantages discussed? And as I
`discussed earlier, there are. I mean Mutoh021 specifically talked about
`advantages in terms of improving performance both for low voltage high
`speed chips.
`And then if we turn to our Demonstrative Slide 18. This is really a
`summary of the points that we made, where Dr. Holberg’s supported by a
`plethora of supporting corroborating references identified, reducing wiring
`complexities, the parasitics, better response time, increased pattern layouts.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`And it’s further expanded in Dr. Holberg’s revised Declaration again, that’s
`Exhibit 1048. Whereas I mentioned earlier, Paragraph 27, he goes into
`details of how having the power cells at the top and the bottom around the
`chip reduces resistance, improves performance where cells that were in the
`central part of the gate array.
`Lastly with respect to this issue, and importantly, on Demonstrative
`Slide 19, Dr. Przybylski, and we can spell that later for the court reporter.
`Dr. Przybylski admitted that there are advantages to having the power switch
`surround the gate array. And so the question at that, what are the benefits of
`placing the power switch cells around either side of the unit cell array. And
`his answer “Yes, the more efficient design overall. There are benefits that
`are not specifically articulated within the 614 patent but are completely
`understood by a person of ordinary skill in the art.” And, one, he’s
`confirming it, and two, this just highlights the notion that this was really a
`well-known kind of invention by a person of ordinary skill in the art, so
`much so they didn’t have to mention it in the 614 patent. And Dr.
`Przybylski concurred that, yeah, a person of ordinary skill in the art at the
`time would have known this.
`So all of that, in sum, we think there is a strong motivation to combine
`these two references, the Urano and Mutoh021. And very similar arguments
`apply in Ground 2 which I’ll refer you to the papers on those. I see I’m
`fairly close to my time here. And the arguments are very similar. So I refer
`to in the Brief, as are their arguments in opposition to that.
`Now if I could take just a moment to move on to Petitioner’s
`Demonstrative Slide 31. I’ll give you a second since we’re skipping all this
`here. And what I’d like to do is simply move on to our Ground 3, briefly
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`touch on that argument with respect to in this case a person of ordinary skill
`of the art. Their argument is would not combine the prior art to disclose the
`capacitor limitations, specifically that they’re constructed by connecting M-
`MOS transistors placed within the unit cell. And again, we believe that’s
`wrong.
`If I turn to Petitioner’s Slide 32, this is Claim 4. There’s no dispute
`again, where these elements are taught, it’s just a motivation to combine
`argument. And specifically it’s that last element that’s highlighted in yellow
`wherein latch circuits, said logic circuits, said first and second capacitors,
`which are a reference in the prior two elements, are constructed by
`connecting MOS transistors. So when we look at that issue, if we turn to
`Petitioner’s Slide 33. Here we’re combining the Douseki with Ramos. The
`second discloses every element of those claims. What it doesn’t specifically
`disclose type of capacitor? You can see it in the diagram here on the left in
`Figure 4. There’s a first and second capacitor, those are the decoupling
`capacitors. The use of decoupling capacitors (audio skip). For the purpose
`of regulating voltages is probably as old as time, or at least as old as a
`capacitor, is well known in the art.
`If we then turn to Petitioner’s Slide 34, the next slide. This is where
`we talk about Ramus. Ramus discloses the capacitor being used for a
`decoupled capacitor. What’s important is they specifically identify that
`they’re MOS transistors. And so, you know, this is a pretty basic motivation
`to combine situation.
`If we turn to Demonstrative Slide 35. So what we have is on one hand
`Douseki discloses this integrated circuit using these decoupling capacitors,
`but doesn’t tell you specifically how they’re made. The motivation would
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`then be to find out, with two other arguments, put this together and so it’s
`highlighted here in Demonstrative Slide 35. Again, this is an excerpt from
`Dr. Holberg’s Declaration were highlighted in green. I’ll just read this for
`the record. “The capacitors formed by the MOS transistors in the standard
`cells can be distributed over the entire integrated circuit in small portions,
`which can then effectively reduce circuit noise and increase voltage
`stability.” There’s your motivation of what the stability would be reducing
`circuit noise, which is, quite frankly, well known.
`Lastly, on just more of the same on Petitioner’s Demonstrative Slide
`36 further support from Dr. Holberg explains why one would be motivated
`to combine these references. And there really would be no issue, it was
`widely known to use MOS capacitors for those purposes, which is what he
`highlights in his declaration. And again, I’ll reiterate the comment I made at
`the beginning of my comments here. There is no expert testimony provided
`by Patent Owner here to dispute, it’s purely attorney argument. And as we
`all know, attorney argument, for better or for worse, gets minimum weight.
`We need to rely on the expert opinions, and there are none here.
`JUDGE HAGY: Counsel, you are now going a little bit into your
`rebuttal, or were you wrapping up? Okay. Just letting you know.
`MR. SPECHT: I’m going to wrap up. I will complete my comments
`unless you have any further questions on these issues. But bottom line we
`think this is a pretty straightforward case. (Audio skip) here, the five
`challenged claims, the institution decision was like that. I know that’s
`preliminary, but no reason to deviate from your findings in the institution
`decision.
`Thank you. Unless you have any other questions I’ll pause now.
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`JUDGE HAGY: I just wanted to ask the court reporter. I’m getting a
`little bit of choppiness at the end of your speaking. I just want to ask if the
`court reporter is able to hear everything okay.
`COURT REPORTER: Yes, Your Honor. I am also hearing that, but
`I think when we put the words together we’ll be able to make out everything
`that’s being said.
`JUDGE HAGY: Okay.
`COURT REPORTER: But you’re right, there is a little choppiness
`there. The only thing that I would ask is that counsel comes back to the first
`one, if you could try to move a little bit closer to your phone or the speaker it
`might help.
`MR. SPECHT: I just got a message from Pete, an IT person, to just
`dial in so I’ll deal in and, you know, connect via phone. You’ll still have my
`video.
`JUDGE HAGY: Okay, that sounds good. I was able to follow your
`argument but I just want to make sure that we do have a complete record.
`MR. SPECHT: Yes, thank you, Your Honor.
`COURT REPORTER: Thank you.
`MR. SPECHT: Thank you.
`JUDGE HAGY: Okay. Is Patent Owner ready to go?
`MR. CHERNG: Yes, Your Honor, thank you.
`JUDGE HAGY: Okay. Go ahead.
`MR. CHERNG: Okay. The Petitioner in this case has not shown that
`a person of ordinary skill in the art would have been motivated to combine
`Urano or Mutoh with Mutoh021 to realize any of the circuit efficiencies that
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`the claim would have actual predicates upon which their theories are based
`have been shown, is not true.
`And I would direct the Board’s attention to Slide 14 of Patent
`Owner’s Demonstratives. As Mr. Specht has indicated, Mutoh021, the
`secondary reference in this case, it contains the key limitation that Petitioner
`contends, of a person of ordinary skill in the art would have been motivated
`to use to modify the two primary references.
`JUDGE HAGY: Counsel, I hate to interrupt. Just a quick question up
`front. Patent Owner had raised some potential claim construction disputes.
`Are those anything that you want to argue during this hearing? Anything
`you’d like to --
`MR. CHERNG: No, Your Honor. We don’t think that the dispute
`turns on any of the constructions. But we do disagree with the constructions,
`as we argued in the preliminary Response. But in our view because
`Petitioner hasn’t shown a motivation to combine any of the references, that
`the Board need not reach the issue of the construction of the terms.
`JUDGE HAGY: Right. It also struck me at least that Patent Owner
`was arguing for broader constructions than what Petitioner seemed to be
`arguing for in general. And so I think at least as we found in the DI that it
`wasn’t really material to our decision. So I just wanted to, you know, give
`you a chance to say anything that you felt like you needed to say on that.
`Okay. Go ahead.
`MR. CHERNG: All right. Thank you, Your Honor. So as the Board
`can see from Slide 13, the Petition cites to Paragraph 35 of Mutoh021,
`Paragraph entitled “Effects of the Invention” to justify the supported
`advantages to the on all sides of arrangement. But as you can see from
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`Paragraph 35, the cite of the bolded portion is the portion that Petitioner
`cited to. But the full quote shows that Mutoh021 didn’t disclose or didn’t
`disclose any advantages to any particular arrangement. What it says there is
`“A cell array composed of second basic cells have a high threshold voltage
`field effect transistors is arranged adjacent to a cell array composed of first
`basic cells having low voltage field effect transmission.” And “as a result, a
`MT-CMOS circuit using high threshold transition voltage transistors and
`low threshold voltage transistors can be realized on a single LSI chip
`without reducing cell utilization rate.”
`You see there the reported advantage which stems only from the
`second basic cells being arranged adjacent to the unit cell and not in
`particular because of any arrangement disclosed in Mutoh021.
`So not having any basis in Mutoh021 to contend that the proposed
`combination has any advantages, Petitioner relies on the testimony of Dr.
`Holberg to supply the purported motivation to combine.
`If you turn your attention, please, to Slide 18. Slide 18 duplicates the
`portion of Dr. Holberg’s conclusory testimony regarding the purported
`motivation to combine. In particular Dr. Holberg asserts that a person of
`ordinary skill in the art would have wanted to have make this asserted
`combination to realize certain circuit design efficiencies, reducing wiring
`complexity, reducing resistance between components, decreasing response
`times between certain components, and increased layout pattern density.
`But Dr. Holberg doesn’t explain why any of these circuit design efficiencies
`are achieved through the asserted claim combination.
`Turning to Demonstrative Slide 25, Dr. Holberg testifies that making
`the asserted combination would reduce wiring complexity but he doesn’t
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`IPR2019-01525 (Patent 6,239,614 B1)
`IPR2019-01526 (Patent 6,895,519 B2)
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`explain why. But in fact, running, adding power switch cells to the top and
`bottom of Urano’s unit cell array would require new wiring running in a new
`direction. And this new wiring running in a new direction would increase
`rather than decrease wiring complexity. So it is not true that a person skilled
`in the art would have been motivated by the desire to reduce wiring
`complexity to make this combination.
`The next asserted motivation is the purported layout pattern density.
`Dr. Holberg doesn’t explain why these asserted combinations would
`increase layout pattern density. Matter of fact it would be decreased because
`adding power cells in the place of logic cells would decrease layout pattern
`density, and wouldn’t increase it.
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