`Filed on behalf of Intel Corporation
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`IPR2019-01199
`Petitioner’s Reply
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________________________
`
`
`Intel Corporation
`Petitioner
`
`v.
`
`VLSI Technology LLC
`Patent Owner
`
`Case IPR2019-01199
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`
`PETITIONER’S REPLY
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`U.S. PATENT NO. 7,247,552
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`TABLE OF CONTENTS
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`IPR2019-01199
`Petitioner’s Reply
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`I.
`II.
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`Introduction ...................................................................................................... 1
`Argument ......................................................................................................... 3
`A.
`The Plain Meaning of “Being Used for Electrical Interconnection”
`Does Not Require Connection to Active Circuitry. .............................. 3
`1.
`PO Belatedly Seeks a Narrow Construction. .............................. 3
`2.
`The Intrinsic Evidence Does Not Support a Claim Construction
`That “Used For Electrical Interconnection” Requires
`Connection to Active Circuitry. .................................................. 5
`The Extrinsic Evidence Does Not Support a Claim Construction
`That “Used For Electrical Interconnection” Requires
`Connection to Active Circuitry. ................................................ 12
`Because Kanaoka’s M1 is Used to Provide Structural Support for
`Electrical Interconnections to M2 (and Vice-Versa), M1 and M2 Are
`Used For Electrical Interconnection to Each Other. ........................... 16
`III. Conclusion ..................................................................................................... 20
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`3.
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`B.
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`
`
`i
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`
`
`INTRODUCTION
`The Petition provides a straightforward case for obviousness of challenged
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`I.
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`claim 20 of the ’552 patent in view of Kanaoka in combination with Weling, and
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`Reddy or Vuong. The Patent Owner’s Response (“POR”) does not challenge any
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`aspect of the allegations in the Petition vis-à-vis Weling, Reddy, or Vuong. Nor
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`does Patent Owner (“PO”) challenge the arguments in the Petition for combining
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`Kanaoka with Weling, and Reddy or Vuong.
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`Indeed, the only argument made by PO in the POR is that Kanaoka allegedly
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`does not teach the claim limitation “being used for electrical interconnection.” But
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`Kanaoka explicitly teaches what is required by this limitation when it explains that
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`“[t]he second-layer M2 and the first-layer wiring M1, which are, respectively, an
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`underlying layer of the dummy pad P[D]16, are electrically connected to each
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`other through a plurality of through-holes TH1.” Ex. 1103, 14:6-10; id., 13:16-19;
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`Ex. 1102, ¶ 89.1 These metal layers M1 and M2, and especially the metal vias
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`(“through-holes TH1”) electrically interconnecting those two layers, are used to
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`provide structural support underneath the dummy bond pad PD16 (as shown in
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`Figure 45), allowing the “dummy pad P[D]16 to have a height further close to the
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`height at the upper surfaces of other pads PD.” Ex. 1103, 14:13-22. M1 and M2
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`1 All emphases are added unless otherwise indicated.
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`
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`1
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`
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`are thus both “being used for electrical interconnection” between them. See
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`Petition, 44-48, 70, Ex. 1102, ¶¶87-91, 136.
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`The POR does not elucidate any new facts or factual assertions about
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`Kanaoka’s M1 and M2, or about how they are electrically connected, that are
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`different from or in addition to Patent Owner’s Preliminary Response (“POPR”).
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`Instead, the POR makes a new and erroneous claim construction argument – i.e.,
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`that claim 20 requires that the portion of the metal-containing layer must be
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`“connect[ed] to active devices” (POR, 3, 5, 6, 12, 15-17, 35, 44), carry active
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`“electrical signal” (id., 13), and “provide interconnection to the rest of the
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`integrated circuit” (id., 15). Indeed, the entire POR now relies on the claim
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`construction argument that claim 20 requires electrical interconnection to active
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`circuitry.
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`However, claim 20 merely requires that the portion of the metal layer in
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`question be “used for electrical interconnection.” It nowhere specifies that such
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`electrical interconnection must be to active circuitry. Further, the POR completely
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`ignores that claim 1 of the ’552 patent, not claim 20, explicitly requires connection
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`to “active circuitry.” ’552 patent, claim 1. The ’552 applicants knew how to claim
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`connection to “active circuitry”– but they did not include such a requirement,
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`either explicitly or implicitly, in claim 20.
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`2
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`Thus, it is not relevant whether M1 and M2 in Kanaoka are interconnected
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`with other active circuitry because M1 and M2 are clearly being used for their
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`electrical interconnection with each other. For these reasons, and as discussed
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`further below, PO has failed to rebut the clear evidence of unpatentability in the
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`Petition. Petitioner thus respectfully requests that the Board cancel claim 20 of the
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`’552 patent.
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`II. ARGUMENT
`A. The Plain Meaning of “Being Used for Electrical Interconnection”
`Does Not Require Connection to Active Circuitry.
`1. PO Belatedly Seeks a Narrow Construction.
`Neither party to this IPR sought an express construction for the term “being
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`used for electrical interconnection” in the parallel district court litigation, in the
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`Petition, or in Patent Owner’s Preliminary Response. See Petition, 30, 44-48, 70;
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`POPR, 44-62. Indeed, the Board found that a construction was not required for the
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`purposes of its Institution Decision. See Institution Decision, 13-16 (construing the
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`term “modifying the layout by adding dummy metal lines to the plurality of metal-
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`containing interconnect layers,” and further finding that “[n]o further construction
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`of claim 20 is required for purposes of this Decision”). Nonetheless, PO has now
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`asserted a very specific claim construction for “used for electrical interconnection,”
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`i.e., that there must be connection to “active” circuitry:
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`3
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` “The language ‘used for electrical interconnection’…, applying
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`principles of claim construction, requires actual use for electrical
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`interconnection, that is connection to active devices.” POR, 12; see
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`also id., 5, 15, 16, 17, 44.
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`PO’s reason for belatedly requesting an extremely narrow construction is
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`evident: it is a last-chance effort to avoid the prior art. PO does not explain why
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`the Board supposedly erred (in PO’s view) when it held in the Institution Decision
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`that no claim construction for the term “being used for electrical interconnection”
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`was necessary. PO also does not explain why it never sought a construction for the
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`term in its POPR, or in the parallel district court litigation. PO never explains why
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`its own expert failed to proffer a construction for the term, who admitted during
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`cross-examination that he performed no claim construction analysis for any term
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`of claim 20 of the ’552 patent. Ex. 1129 [Neikirk Dep.], 10:20-11:1 (“Q. … Are
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`you saying that you did not provide any claim constructions in your declaration?
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`A. No, I did not.”); 152:1-2 (“A. So, to be clear, I’ve not formed any such opinion.
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`4
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`I haven’t done any claim construction….”); 167:8-9 (“A. I’ve not been asked to do
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`any claim construction….”).2
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`2. The Intrinsic Evidence Does Not Support a Claim
`Construction That “Used For Electrical Interconnection”
`Requires Connection to Active Circuitry.
`PO argues that the language of claim 20 itself supports a claim construction
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`for “used for electrical interconnection” requiring connection to active circuitry.
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`POR, 12-15. But claim 20 does not reference or require “active circuitry,” much
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`less connection to “active circuitry.” PO is erroneously seeking to import that
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`limitation into claim 20.
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`Clams 1 and 6 of the ’552 patent further demonstrate why it would be
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`erroneous to import that limitation into claim 20. See Phillips v. AWH Corp., 415
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`F.3d 1303, 1314 (Fed. Cir. 2005) (en banc) (“Other claims of the patent in
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`question, both asserted and unasserted, can also be valuable sources of
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`enlightenment as to the meaning of a claim term.”). Claim 1 of the ’552 patent,
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`2 Dr. Neikirk acknowledges in his declaration that “claim terms are given their plan
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`[sic] and ordinary meaning as understood by a person of ordinary skill in light of
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`the claim language and the patent specification,” (Ex. 2024, ¶20), and discussed
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`the explicit construction of the term “force region” from the district court litigation,
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`even though he did not provide his own claim construction analysis. See id., ¶22.
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`5
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`unlike claim 20, does use the phrase “used for wiring or interconnect to the active
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`circuitry.” Claim 6 also uses the phrase “active circuitry” but does not explicitly
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`require connection to that active circuitry. In contrast, claim 20 does not use the
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`phrase “active circuitry” at all, and does not require connection to any active
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`circuitry. The differences in language between these claims illustrate the fallacy of
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`PO’s argument that claim 20 requires connection to active circuitry:
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`’552 Patent, Claim 1
`“a substrate having active
`circuitry”
`…
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`
`
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`“a functional metal line
`underlying the bond pad
`that… is used for wiring
`or interconnect to the
`active circuitry.”
`
`’552 Patent, Claim 6
`“a substrate having
`active circuitry”
`“a stack of interconnect
`layers for
`interconnecting the
`active circuitry”
`…
`“at least one underlying
`interconnect layer …
`being used for wiring
`or interconnect”
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`’552 Patent, Claim 20
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`
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`“a portion of the plurality
`of metal-containing
`interconnect layers
`underlying the first bond
`pad…used for electrical
`interconnection”
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`
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`The underlined limitations in claims 1, 6, and 20 shown in the chart above were all
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`added on the same day during prosecution, after the Examiner had rejected the
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`claims over U.S. Patent Publication 2005/0082577. Ex. 1113 [4/5/2007 Response
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`to Office Action], 3-7; Petition, 11-12. It is clear that the applicant purposely
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`chose to add different claim limitations in these claims to overcome the art.
`6
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`Specifically, claim 1 originally required “a substrate having active circuitry”
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`and “functional metal lines.” In response to the Examiner’s rejection, the patentee
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`amended claim 1 to further require that the “functional metal line” “underl[ies] the
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`bond pad” and that the “functional metal line … is used for wiring or interconnect
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`to the active circuitry,” (Ex. 1113, 3-7), expressly claiming that this portion of the
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`interconnect layer is itself connected to functional, active circuitry. As PO’s expert
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`Dr. Neikirk admitted, claim 1 thus “defines itself” with respect to what “used for
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`wiring or interconnect” means:
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`Q. Do you have an understanding of what “used for wiring
`or interconnect” means [in claim 1]?
`A. Well, to connect to active circuitry. I think it defines
`itself right there. “Wiring,” or “interconnect,” those are two
`somewhat interchangeable words, largely interchangeable,
`so I think they used both words. And they – “functional
`metal line” is what is being, I think, clarified here, that
`functional metal line is one that is used to connect to active
`circuitry.
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`Ex. 1129 [Neikirk Dep.], 146:11-20.
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`Similarly, claim 6 originally required “a substrate having active circuitry”
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`and “a stack of interconnect layers for interconnecting the active circuitry.” In
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`response to the Examiner’s rejection, the patentee amended claim 6 to require that
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`“at least one underlying interconnect layer … [is] used for … interconnect other
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`7
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`than directly to the bond pad,” without requiring that the interconnect layer be
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`connected to the active circuitry. Ex. 1113, 3-7.
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`In contrast, claim 20 was amended to include different language than in
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`either of claims 1 or 6, with a scope that is broader in three important ways. First,
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`claim 20 was not amended to require a “functional” metal line, but instead the
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`broader “portion of the plurality of metal containing interconnect layers.” This
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`“portion” is not required to be “functional” in claim 20. Second, claim 1 explicitly
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`requires that the “functional metal line” be used for interconnection to “active
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`circuitry,” whereas claim 20 merely requires that the “portion” be used for
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`“electrical interconnection.” Third, claim 6 requires “a stack of interconnect layers
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`for interconnecting the active circuitry,” without requiring the particular
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`“underlying interconnect layer” be connected to active circuitry. Claim 20 on the
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`other hand does not require “active circuitry” at all, and thus does not “define
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`itself” to require connection to active circuitry like claim 1 does. Claim 20 is
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`fundamentally different than claims 1 and 6, and under the doctrine of claim
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`differentiation, and because different limitations were added during prosecution, it
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`should not be construed to require connection to active circuitry. See Karlin Tech.
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`Inc. v. Surgical Dynamics, Inc., 177 F.3d 968, 971–72 (Fed. Cir. 1999) (the
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`doctrine of claim differentiation is “based on the common sense notion that
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`8
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`different words or phrases used in separate claims are presumed to indicate that the
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`claims have different meanings and scope.”).
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`PO also argues without any evidentiary support that the inclusion of the verb
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`“used for” in the claim element “used for electrical interconnection” must mean
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`that the “electrical connection” has to be to active circuitry. POR, 12-13, 15. But
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`this is simply a deliberately narrow reading of a broader claim term. Metal in
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`metal interconnect layers, and the electrical connections between those metal
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`layers, can be “used” for multiple purposes, including for connecting to active
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`circuitry or for other purposes. See, e.g., Ex. 1129 [Neikirk Dep.], 64:17-22 (“So I
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`think one of ordinary skill would know that you can use layers in a stack for a
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`variety of purposes.”). The language of claim 20, unlike claims 1 and 6, is broad
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`enough to cover these multiple types of uses.
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`PO is further incorrect that the specification supports its assertion that claim
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`20 requires connection to active circuitry. First, PO contends that claim 20
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`specifically requires that the “portion” of the metal-containing interconnect layer
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`be connected to active circuitry because claim 20 supposedly reflects a solution
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`that “allow[s] each of the interconnect layers underlying a bump to be ‘functionally
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`independent,’” addressing a problem experienced by a scaffold-like prior art
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`structure described in the ’552 specification’s Related Art section. POR, 6-9. But
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`that description of the “Related Art” expressly states that the problem was not with
`9
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`the interconnection of the layers vis-à-vis each other, but instead with the
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`interconnection of the layers vis-à-vis the bond pad: “a majority portions of the
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`underlying metal layers and the bonding pad are all electrically connected to
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`each other and thus are not functionally independent of each other.” Ex. 1101
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`[’552 patent], 1:53-58. Accordingly, claim 20 was amended to explicitly require
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`that the “portion” of the metal-containing interconnect layers beneath the bond pad
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`be “used for electrical interconnection not directly to the bond pad.” In other
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`words, the applicant was addressing what the “portion” could not be attached to
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`(i.e., the bond pad), rather than limiting what the “portion” must be connected to.
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`Second, PO argues that Figures 1, 2, and 3 of the ’552 patent support its
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`proposed construction for “used for electrical interconnection” requiring
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`connection to active circuitry. POR, 25-29. Specifically, PO argues that these
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`three figures show “metal lines…which extend beyond the figures, allowing them
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`to provide electrical connection to active elements.” Id., 28-29. But PO fails to
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`note that the ’552 patent nowhere describes any of these lines – including any of
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`lines 48, 50, 58, 66, 68, 70, 72, 74, or 76 (i.e., all of the lines under bond pad 32) –
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`as being electrically connected to any active circuitry; they are simply described as
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`metal lines on one of the interconnect layers 22 and 26. Ex. 1101, 3:31-42, 3:60-
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`63, 4:26-36; see also Ex. 1129 [Neikirk Dep.], 86:16-22 (“Q. Would a person of
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`skill in the art reading this patent understand 66, 68 and 70 to be active metal lines?
`10
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`A. Again, you know, I haven’t gone through to try and parse that particular thing
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`out. I’m not saying they’re not. I just haven’t found the wording that explicitly
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`describes them that way.”).
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`As the Petition showed, the only example of electrically interconnected lines
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`described in the specification are lines connected to each other. Specifically, the
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`Petition identified line 50 in layer 22 and line 58 in layer 26 from Figure 1 of the
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`’552 patent as two exemplary lines and layers that are “electrically interconnected”
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`to each other. Petition, 47-48.
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`
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`Ex. 1101, Fig. 1. This is the only example from the figures of the ’552 patent that
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`show circuit elements in the metal-containing interconnect layers “being used for
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`electrical interconnection.” The Petition further identifies the following passage
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`11
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`
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`from the ’552 specification describing these two metal lines within the layers, and
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`the “via 59” which acts as the electrical interconnection between them:
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`The metal line 50 of the second-from-last interconnect layer 22
`is electrically connected to the metal line 58 of the third from-
`last interconnect layer 26 by a via 59 that intersects dielectric
`24. Thus, electrical connection exists between a portion of the
`second-from-last interconnect layer 22 and the third-from-last
`interconnect layer 26.
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`Ex 1101, 3:38-44; Petition, 48. The ’552 patent does not describe lines 50 or 58 as
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`being connected to active circuitry, but it does describe them as being
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`“electrical[ly] connect[ed]” “portions” of interconnect layers. See Ex. 1101, 2:63-
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`3:54. For this reason, lines 50 and 58, and via 59 electrically interconnecting them,
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`are exemplary embodiments of claim 20 (for this portion of the limitation), but
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`they do not support the importation of an “active circuit” requirement into the term
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`“used for electrical interconnection.”3
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`3. The Extrinsic Evidence Does Not Support a Claim
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`3 Even if VLSI had demonstrated that ’552 patent’s lines 50 and 58 were connected
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`to active circuitry, it would not be sufficient to import such a limitation into claim
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`20. See Phillips, 415 F.3d at 1323 (Federal Circuit has “expressly rejected the
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`contention that if a patent describes only a single embodiment, the claims of the
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`patent must be construed as being limited to that embodiment.”).
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`12
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`
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`Construction That “Used For Electrical Interconnection”
`Requires Connection to Active Circuitry.
`The only extrinsic evidence that PO cites to support its assertion that “used
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`for electrical interconnection” requires a connection to active circuitry is the Expert
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`Declaration of its expert, Dr. Neikirk. POR, 15-17. But Dr. Neikirk repeatedly
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`acknowledged at his deposition that he had not performed any claim construction
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`analysis of any of the terms in claim 20, and that he had not been asked to perform
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`any such analysis. Ex. 1129 [Neikirk Dep.], 10:20-11:1 (“Q. Are you saying that
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`you did not provide any claim constructions in your declaration? A. No, I did
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`not.”); 152:1-2 (“A. So, to be clear, I’ve not formed any such opinion. I haven’t
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`done any claim construction….”); 167:8-9 (“A. I’ve not been asked to do any
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`claim construction….”). Because Dr. Neikirk did not perform any claim
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`construction analysis entailing review of the intrinsic and extrinsic evidence, his
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`Declaration should be given no weight with respect to the meaning of the term
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`“used for electrical interconnection.” See, e.g., Sonix Tech. Co. v. Publications
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`Int’l, Ltd., 844 F.3d 1370, 1375, 1380 (Fed. Cir. 2017) (rejecting expert opinion
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`where the expert “did not analyze the intrinsic evidence”).
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`Further, to the extent that Dr. Neikirk did provide any opinions on “active
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`circuitry,” it appears that his understanding was based on his analysis of claim 1,
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`and not claim 20. Specifically, at his deposition, Dr. Neikirk testified as follows:
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`13
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`Q. If you didn’t perform a claim construction inquiry with
`respect to the term “interconnect,” how did you determine that
`interconnects need to be connecting to active circuitry?
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`A. Because in Claim 1, that’s required.
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`Ex. 1129 [Neikirk Dep.], 171:2-6. This may be the right conclusion to draw for
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`claim 1, but it is precisely the wrong conclusion to draw with respect to the term
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`“interconnect” in the other claims, including claim 20. The fact that claim 1
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`expressly requires the “interconnect” to be connected to “active circuitry” does not
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`define “interconnect” for other terms. Instead, the inclusion of an express
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`requirement in claim 1, and failure to include such an express requirement in claim
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`14
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`20, is strong evidence that it is not required in claim 20. See Karlin Tech, 177 F.3d
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`at 971–72.4
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`Further, claim 20 merely requires use for “electrical interconnection,” and
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`dictionary definitions for “interconnect” simply define it synonymously with “to
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`connect” or as “to be connected with each other.” See Ex. 1127 [American
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`Heritage Dictionary], 437 (“Interconnect: … to connect or be connected with each
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`other.”); Ex. 1128 [Concise Oxford Dictionary], 737 (“Interconnect: … connect
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`with each other.”). The use of “interconnect” in claim 20 of the ’552 patent is in
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`line with these definitions – the claimed “portion” of the interconnect layers must
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`be connected to another device (not the bond pad) with an electrical connection,
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`4 In contrast to Dr. Neikirk’s inconsistent declaration and deposition testimony,
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`Petitioner’s expert Dr. Bravman has been entirely consistent. First, he provided a
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`Declaration explaining that Kanaoka discloses the limitation “used for electrical
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`interconnection” under the plain meaning and without need for a special
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`construction. Ex. 1102, ¶¶ 62, 89-91. Dr. Bravman was then asked minimal
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`questions about claim 20 at his deposition, and certainly did not retract or
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`contradict anything from his declaration. In its POR, PO cites no admissions or
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`contrary testimony from Dr. Bravman’s deposition regarding the meaning of the
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`term “used for electrical interconnection.”
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`15
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`and in so doing forms an “electrical interconnection.” That is all that claim 20
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`requires.
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`B.
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`Because Kanaoka’s M1 is Used to Provide Structural Support for
`Electrical Interconnections to M2 (and Vice-Versa), M1 and M2
`Are Used For Electrical Interconnection to Each Other.
`PO and PO’s expert Dr. Neikirk concede that Kanaoka teaches that M1 and
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`M2 are made from electrically conductive materials, and that they are “electrically
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`connected” to each other by several electrically conductive vias TH1. POR, 5
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`(“[T]here can be no question that M1 and M2 under PD16-each alleged to be a
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`portion of the plurality of metal interconnect layers underlying the first bond pad-
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`are, at best ‘electrically connected to each other’ by virtue of being metal structures
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`attached by metal vias.”); Ex. 1129 [Neikirk Dep.], 154:20-155:3 (“Q. You agree
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`that M1 and M2 are electrically connected to each other, correct? A. Yes, it –
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`explicitly shows vias connecting M1 and M2.”); id., 157:3-6 (“Q. You agree that
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`M1 and M2 are connected by an electrically conducting material, correct? A. I
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`would agree with that, yeah. The vias are electrically conducted.”); see also
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`Petition, 46-48; Ex. 1102 [Bravman Dec.], ¶ 89. Thus, there cannot be any dispute
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`that M1 and M2 are electrically interconnected to each other through the
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`electrically conductive vias TH1, as illustrated below:
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`16
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`Ex. 1103, Fig. 45; see also id., 13:16-19, 14:6-10; Petition, 46-48; Ex. 1102
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`[Bravman Dec.], ¶ 89.
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`In addition, there can be no dispute that M1 and M2 are “used for electrical
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`interconnection.” PO and Dr. Neikirk admit that M1 and M2, and the through-
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`holes between them, are used to provide structural support between the two metal
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`layers. Ex. 1103 [Kanaoka], 14:12-23; POR, 5 (“In use, M1 and M2 under PD16
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`are part of a scaffold-like element….”); id., 30-31; Ex. 1129 [Neikirk Dep.],
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`160:13-17 (“This is done to provide geometrical uniformity, as much as possible,
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`so that during the rest of the deposition steps and fabrications, the final surfaces are
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`close to the heights – all of them are close to the same height.”); id., 161:9-16 (“Q.
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`17
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`The through holes in Figure 45 serve a purpose, correct? A. A purpose to promote
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`planarity. It stated right there in line 16 through 19 – through 18 [of Kanaoka
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`column 4].”). This structural support, in turn, is precisely what provides the
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`electrical interconnection between M1 and M2. Petition, 46-48; Ex. 1102
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`[Bravman Dec.], ¶ 89.
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`Kanaoka explains how M1 and M2 are used to create an electrical
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`interconnection between them. Specifically, “first-layer wiring M1” acts as a
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`structural base for the electrically conductive vias (“through-holes TH1”) that are
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`placed above M1 and below M2. M1 and M2, and more critically the vias between
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`them, in turn provide structural support and enable dummy pad PD16 to have a
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`height close to the height of other dummy pads:
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`Especially, with the first-layer wiring M1, a plurality of
`through-holes TH1 are provided in the underlying layer of
`the pad PD16 so as to provide the same structure as with the
`underlying layers of other pads PD. This enables the upper
`surface of the dummy pad P[D]16 to have a height further
`close to the height at the upper surfaces of other pads PD.
`More particularly, the height at the top of the bump 11
`bonded to the dummy pad PD16 can be made more closely
`to the height at the tops of the bumps 11 bonded to other pads
`PD.
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`18
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`Ex. 1103 [Kanaoka], 14:13-27. As described in this passage, the metal in M1 is
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`IPR2019-01199
`Petitioner’s Reply
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`“especially” included below pad PD16 to support the electrical interconnections in
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`the form of through-holes TH1. Thus, M1 is “used for electrical interconnection”
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`to M2 via through-holes filled with metal, and likewise, M2 is “used for electrical
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`interconnection” to M1.
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`Further, as admitted in the “Related Art” section of the ’552 patent, such
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`structures were well-known for their use to provide support. See Ex. 1101, 1:53-64
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`(“A known method to address the stresses present underlying a bond pad is to use a
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`dedicated support structure. A common structure is the use of at least two metal
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`layers under the bonding pad that are connected together and to the bonding pad by
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`large arrays of vias distributed across a majority of the bond pad area.”). Claim 20
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`avoids reading directly onto this “common structure” by specifying that, although
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`the metal layers are “used for electrical interconnection,” they are “not directly
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`connected to the bond pad.”5 And as described above, Kanaoka’s M1 and M2
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`clearly show such an electrical interconnection structure.
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`Accordingly, M1 and M2 are both “used for electrical interconnection” to
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`each other, and neither are directly connected to the bond pad above them, and thus
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`5 Hence, in order to further provide structural reinforcement, claim 20 further
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`requires “modifying the layout by adding dummy metal lines.”
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`19
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`both are covered by claim 20. For these reasons, the Petition demonstrates that
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`IPR2019-01199
`Petitioner’s Reply
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`Kanaoka teaches “a portion of the metal containing interconnect layers…used for
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`electrical interconnection.”
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`III. CONCLUSION
`Based on the foregoing, PO fails to rebut Intel’s showing that claim 20 of the
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`’552 patent is unpatentable.
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`Respectfully Submitted,
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`/Taeg Sang Cho/
`Taeg Sang Cho
`Registration No. 69,618
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`PETITIONER’S UPDATED EXHIBIT LIST
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`IPR2019-01199
`Petitioner’s Reply
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`Exhibit
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`Exhibit Name
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`1101
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`1102
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`1103
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`1104
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`1105
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`1106
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`U.S. Patent No. 7,247,552
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`Declaration of Dr. John C. Bravman
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`U.S. Patent No. 7,102,223 to Kanaoka et al. (“Kanaoka”)
`“Digital Design Flow Options,” Sagar V. Reddy, M.S. Thesis, 2001
`(“Reddy”)
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`U.S. Patent No. 5,639,697 to Weling et al. (“Weling”)
`Patent Application Publication No. US 2004/0098674 to Vuong et
`al. (“Vuong”)
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`1107 May 25, 2007 Notice of Allowability
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`1108
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`1109
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`1110
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`1111
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`1112
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`1113
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`1114
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`1115
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`1116
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`1117
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`1118
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`1119
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`Declaration of Dr. Gretchen L. Hoffman
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`U.S. Patent No. 5,586,046
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`U.S. Patent No. 4,635,208
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`U.S. Patent No. 4,922,432
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`Jan. 24, 2007 Non-Final Rejection
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`Apr. 5, 2007 Response to Office Action
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`Complete File History of U.S. Patent No. 7,247,552
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`Carver & Mead, Introduction to VLSI Systems (1980)
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`Transcript of Hearing Held on November 21, 2019
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`Identification of Prior Art Combinations
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`Stipulation Regarding Fact Discovery dated November 19, 2019
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`PO’s Identification of Asserted Claims
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`IPR2019-01199
`Petitioner’s Reply
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`Exhibit
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`Exhibit Name
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`1120
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`1121
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`1122
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`1123
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`1124
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`1125
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`1126
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`1127
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`1128
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`1129
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`PO’s Motion to Reintroduce Certain Asserted Patent Claims
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`Claim Construction Order
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`PO’s Identification of 18 Asserted Claim
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`Petitioner’s Identification of 30 Prior Art Combinations
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`Stipulation Regarding Case Schedule and Discovery Disputes
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`District Court’s Order dated January 13, 2020
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`Declaration of S. Calvin Walden In Support of Motion For
`Admission Pro Hac Vice
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`American Heritage Dictionary
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`Concise Oxford Dictionary
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`Transcript of Deposition of Dr. Neikirk
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`CERTIFICATE OF COMPLIANCE REGARDING WORD COUNT
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`IPR2019-01199
`Petitioner’s Reply
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`I hereby certify that the foregoing, Petitioner’s Reply to Patent Owner’s
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`Response contains 4030 words as measured by the word processing software used
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`to prepare the document, in compliance with 37 C.F.R. § 42.24 (d).
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`/Taeg Sang Cho/
`Taeg Sang Cho
`Registration No. 69,618
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`CERTIFICATE OF SERVICE
`I hereby certify that on August 14, 2020, I caused a true and correct copy of
`the foregoing materials:
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`IPR2019-01199
`Petitioner’s Reply
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`• Petitioner’s Reply to Patent Owner’s Response
`• Exhibits 1127-1129
`• Petitioner’s Updated Exhibit List (Ex. 1101-1129)
`• Certificate of Compliance Regarding Word Count
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`to be served upon the following by ELECTRONIC MAIL:
`
` Bridget Smith; smith@lowensteinweatherwax.com
` Kenneth J. Weatherwax; weatherwax@lowensteinweatherwax.com
` Nathan Lowenstein; lowenstein@lowensteinweatherwax.com
` Flavio Rose; rose@lowensteinweatherwax.com
` Edward Hsieh; hsieh@lowensteinweatherwax.com
` Parham Hendifar; hendifar@lowensteinweatherwax.com
` Patrick Maloney; maloney@lowensteinweatherwax.com
` Jason C. Linger; linger@lowensteinweatherwax.com
` VLSI_IPRs@lowensteinweatherwax.com
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`/Taeg Sang Cho/
`Taeg Sang Cho
`Registration No. 69,618
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`Date: August 14, 2020
`Wilmer Cutler Pickering Hale and Dorr LLP
`7 World Trade Center
`250 Greenwich Street
`New York, NY 10007
`212-295-6490
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