United States Patent
`Sanner et al.
`
`1541 TERMINAL MESSAGE MONITOR
`Inventors: Gary L. Sanner, Detroit; Charles B.
`[72]
`Hebeler, Farmington, both of Mich.
`[ 7 3 ) Assignee: Burroughs Corporation, Detroit,
`Mich.
`Oct. 9, 1970
`[22) Filed:
`(21) Appl. No.: 79,563
`
`(52) U.S. Cl ................................................ 340/172.5
`Int. CI ............................... G06f 3/00, G06f 9/18
`(51)
`[58) Field of Search .................................... 340/l 72.5
`
`(56)
`
`References Cited
`
`3,336,582
`3,454,936
`3,456,242
`3,469,243
`3,539,998
`3,564,509
`
`UNITED ST ATES PATENTS
`Beausoleil et al... .... 340/172.5
`8/1967
`1 I 1969 Bridge et al. ........... 340/ 172.5
`Lubkin et al. .......... 340/172.5
`7 /1969
`9/1969 Willcox et al... ........ 340/172.5
`11/1970 Belcher et al... ........ 340/172.5
`Perkins et al... ........ 340/172.5
`2/1971
`
`3,701,971
`(15)
`C45J Oct. 31, 1972
`
`Primary Examiner-Paul J. Henon
`Assistant Examiner-Sydney R. Chirlin
`Attorney-Kenneth L. Miller and Charles S. Hall
`
`[57]
`ABSTRACT
`A monitoring system to permit a first terminal com(cid:173)
`puter on line with a central processor to monitor
`message traffic from the central processor to other
`terminals concatenated or in a multidrop mode with
`the first. When messages are sent through a modem to
`a plurality of terminal computers in a concatenated
`configuration a verification of message traffic is pro(cid:173)
`vided. Logic circuitry is provided for monitoring both
`transmitted and received information and providing a
`printout of the communication line information. The
`monitoring terminal, regardless of the address of the
`message, will store the communication line informa(cid:173)
`tion in its memory and print out the stored informa(cid:173)
`tion to provide a positive communication system
`check.
`
`6 Claims, 5 Drawing Figures
`
`CENTRAL
`PROCESS I NG
`UN IT
`
`MODEM
`
`13
`
`CENTRAL
`OFFICE
`BRIDGE
`
`II
`
`15
`
`17
`
`21
`
`19
`
`Page 1 of 12
`
`

`

`PATENTED OCT 31 1972
`
`3,701,971
`
`SHEET 1 OF 4
`
`CENTRAL
`PROCESS I NG
`UN IT
`
`MODEM
`
`13
`
`CENTRAL
`OF Fl CE
`BRIDGE
`
`II
`
`15
`
`19
`
`Fl G. I.
`
`17
`
`21
`
`37 -7 ,,,21
`
`35
`,
`......---'--- V
`MAIN
`
`FIG.2.
`
`MAIN
`
`PROCESSOR
`
`MEMO RY
`
`TERMINAL
`
`TERMINAL
`A DOR ESS
`LI NE
`CONTROL
`DISCIPLINE
`.......,. __ ~
`PROCESSOR
`
`~-~
`
`MESSAGE
`
`MEMORY
`
`22
`I\ I
`i y
`
`I
`
`,____ ___ 4_1_--,1....._....---B-U_F4-F7 .... E_R __ .,.__4_3_-+-1,:M-O_D___.l:~M- ~~f y
`
`~ - - - - -
`
`STORAGE
`
`INVENTORS
`GARY L. SANNER 6
`CHARLES B. HEBELER
`
`-0-~/~
`
`BY
`
`Page 2 of 12
`
`

`

`......
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`DATA
`
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`
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`MEMORY
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`91
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`
`61
`
`DECO DER
`
`~--------<--4 INSTRUCTION
`
`51
`
`I ARITHMETIC to0I◄----. 53
`
`UN IT
`
`I
`
`I
`
`PRINTER
`
`DECODE
`
`79
`
`REG.
`FLAG
`
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`
`65
`
`RESET
`
`TO--------Tn
`
`-,
`
`TL
`
`LOAD
`
`39
`
`37
`
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`
`T1
`
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`
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`
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`
`35
`CHANNEL
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`
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`
`I
`
`Page 3 of 12
`
`

`

`PATENTED OCT 31 1972
`
`3,701,971
`
`SHEET 3 OF 4
`
`F/G.4.
`
`CLEAR
`MEMORY BUFFERS
`
`I
`
`REDESIGNATE MESSAGE
`MEMORY AREA
`
`I
`ACTIVATE MONITOR
`FUNCTION
`
`I
`
`SUPPRESS
`
`COM PA RISON
`
`I
`
`STORE RECEIVED DATA
`MESSAGE MEMORY
`I I
`
`MESSAGE MEMORY
`FULL
`
`I I
`
`IN
`
`OPERATOR
`I NT ERRUPT
`I
`
`AT LEAST ONE CHARACTER I
`
`HAS BEEN STORED
`
`INTERRUPT DATA
`STORAGE
`I
`TRANSFER DATA FROM
`MESSAGE MEMORY TO
`MAIN ME MORY
`I
`PRINT LINE
`DATA
`
`I
`
`INVENTORS
`GARY L. SANNER S
`CHARLES B. HEBELER
`
`Page 4 of 12
`
`

`

`PATENT£0 OCT 31 1972
`
`3,701.971
`
`RECEIVE DATA
`
`( THROUGH MODEM
`FROM C. P. U.)
`
`REQSNDI
`(FROM DOWN(cid:173)
`STREAM TERMINAL)
`
`SHEET -. OF 4
`
`FIG.5.
`
`141
`
`138
`
`1_I3
`
`RC DATO
`
`(TO DOWNSTREAM
`TERMINAL)
`
`REQSNDO
`( TO MODEM}
`
`135
`
`E4
`
`131
`
`--7
`I
`I
`I
`I
`I
`L-,--J
`I
`"-143
`
`DCAR DETO
`lTO DOWNSTREAM
`TERMINAL)
`
`INVENTOR
`GARY L. SANNER a
`CMARLES B.HEBELER
`
`TRANSMITTED
`DATA
`
`T
`(FROM DOWN STREAM
`TE RM INAL)
`
`DA TA CARR I ER OET ECTOR
`
`DCARDETI
`l FROM MODEM)
`
`Page 5 of 12
`
`

`

`1
`TERMINAL MESSAGE MONITOR
`
`3,701,971
`
`2
`Another approach was to provide a permanent moni(cid:173)
`toring and checking apparatus as a part of an installa(cid:173)
`BACKGROUND OF THE INVENTION
`tion. This was effective in tracing errors and signalling
`an operator, but required expensive permanent equip-
`This invention relates generally to a data processing
`system wherein a series of terminal computers is on- S ment and, obviously, increased the cost of the user.
`line, through a modem, with a central processor and More recently field "monitoring kits" have been pro-
`more particularly to a method and apparatus for moni-
`vide wherein known specifications are used as a stan-
`toring message traffic between the central processor
`dard, with lights or counters indicating variations from
`and the terminals by utilizing an intermediate terminal
`the norm. These devices are portable, but must be con-
`in a monitor mode.
`10 nected between the modem and a terminal and left
`In interfacing terminal computers with a central
`"on" for a period of time so that intermittent errors can
`processor it is essential to determine if each unit is
`be recorded. The most recent development is a channel
`receiving the correct information in order to eliminate
`monitor which is externally connected anterior to a ter-
`transmission inaccuracies as a source of error. This is
`minal unit. This monitor synchronizes, controls, and
`especially troublesome when new systems are set up IS decodes monitored information for printing, in code,
`format characters. Again, this is an external system
`and when various types of terminals are added to an ex-
`isling system. In data processing systems information is
`costing several thousands of dollars and requiring com-
`usually in the form of time-spaced electrical pulses ar-
`plex interconnections.
`ranged in a pre-determined code representing numerals
`It has been found that transmission errors occur
`and characters. It is always possible that, due to 20 mainly during start-up operations and when interfacing
`foreign systems. Also, terminal units have been most
`transient voltages, line malfunctions, a failure of the
`equipment, or other means this data will be transferred
`economically set up in series, or concatenated, configu-
`in error. Thus it is desirable to have checking or moni-
`ration utilizing a single modem.
`toring apparatus available to trace malfunctions.
`It is, therefore, the primary object of this invention to
`A typical on-line commercial computer application 25 provide for an improved monitoring system for verify-
`requires continued access to a centrally located data
`ing message traffic.
`file. Teleprinters on line, at various locations, were
`It is another object of this invention to utilize a con-
`previously used to display information received and to
`catenated terminal computer as a monitor for sampling
`provide a source of input, including answers to inquires
`both.transmitted B;nd received_ inform~tion.
`from a central processor. This process helped to identi- 30
`It 1s another obJect to provide a printout of message
`fy any transmission of errors to the central processor.
`traffic _without affecting terminal or central processor
`Central processors could work independently of these
`operation.
`teletypewriter terminals but the flow of received and
`It is still another object of this invention to selectively
`use a t~rminal computer as a monitor by simple and in-
`transmitted information was significantly impeded by
`the much slower printing operation. Since the teletype 35 expensive means, so that once an error is found and
`printers had no memory they significantly hampered
`corrected the monitor can quickly be converted back
`time-sharing efforts.
`to a terminal unit.
`An example of a system of this type would be a bank
`BRIEF STATEMENT OF THE INVENTION
`operation where it is necessary to obtain or update cer(cid:173)
`tain account balances kept in a file of bank accounts. 40
`To accomplish the above objects, logic means is
`Similarly insurance companies find it is necessary to
`selectively employed to utilize the memory and compu-
`periodically update information in various files such as
`tational ability of a terminal computer in a monitor
`the amount of insurance, the premium data and the ex-
`mode. Gating circuitry is also provided to place both
`tent of insurance coverage for each insured person.
`transmitted and and received information on the same
`High speed electronic data processing systems are com- 45 line when in the monitoring mode. A terminal com-
`puter in the concatenated mode is utilized as a monitor
`monly used for storing files of information for banks,
`insurance companies and the like. Further in such busi-
`by non-destructively storing communication line infor-
`nesses, it is often desirable to have a centrally located
`mation from or to any other terminal, by use of logic
`circuitry and the memory of the terminal, and then
`data processing system including high speed electronic
`central processor and peripheral equipment and to em-
`printing out this information for visual review by a field
`ploy remote terminal devices for entering and receiving
`engineer for aberrations in the flow of signals. External
`information at any of a number of remote points. Such
`connections or systems are not required and an inex-
`remote terminals may be located, for example, at
`pensive modification is used to utilize the existing inter-
`branch offices of the banks or insurance companies.
`nal micro-logic of the terminal computer.
`When installing these systems and adding new ter(cid:173)
`minals to existing systems accurate checking and moni(cid:173)
`toring apparatus is necessary for field engineering peo(cid:173)
`ple to solve complex interface requirements. A number
`of prior art techniques have proved to be expensive and 60
`excessively time consuming when applied to the new
`sophisticated terminals. A known method of verifying
`message traffic was to insert test messages into the line
`and read these messages at a distant point to determine
`accuracy of transmission. This system required external 65
`connections and interrupted data flow considerably.
`Also, the tests conducted were not under actual condi(cid:173)
`tions, since chosen test messages were inserted.
`
`DESCRIPTION OF THE DRAWINGS
`In the drawings:
`FIG. 1 is a block diagram of a data processing system
`of the type in which the invention may be utilized;
`FIG. 2 is a symbolic block diagram of a remote ter(cid:173)
`minal computer utilizable in accordance with the prin(cid:173)
`ciples of the invention;
`FIG. 3 is a simplified functional block diagram of the
`remote computer terminal of FIG. 2;
`FIG. 4 is a flow diagram illustrating the steps per(cid:173)
`formed in order to monitor data on a terminal com(cid:173)
`puter; and
`
`50
`
`55
`
`Page 6 of 12
`
`

`

`3
`FIG. 5 shows logic circuitry for handling received
`and transmitted information through a monitoring ter(cid:173)
`minal computer.
`
`3,701,971
`
`4
`numerals being used to designate the respective sec(cid:173)
`tions of the terminal 21.
`Now referring to FIGS. 1 and 2 in conjunction with
`Table I below. the format and function of the various
`S portions of inquiry and response messages transmitted
`between the central processor and the remote ter(cid:173)
`minals may be understood.
`
`TABLE l
`
`~i~::to~ATA
`
`POLL
`EAAPE
`ODDON
`T I 2 L Q MESSAGE
`
`ACK.
`A
`C
`K
`
`SAAXS
`ODDMTTEXT
`HJ 2
`X
`
`EB
`TC
`XC
`
`E
`0
`T
`
`30
`
`LINE DISCIPLINE
`PROCESSOR
`
`SIGNOFF
`
`E AAPE
`0 ODON
`T I 2LQ
`
`E
`0
`T
`
`C.
`35 SELECTION, ACCEPTANCE, MESSAGE RECEIPT
`AND ACKNOWLEDGEMENT
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`Referring to FIG. 1, there is illustrated a data
`processing system capable of utilizing the present in(cid:173)
`vention. A system of this type may be found in a bank-
`ing industry wherein a central processing unit (CPU) 1 O
`11 is located at a central or main bank headquarters. - - - - - - - - - - - - - - - - - - - -
`Operatively connected to the CPU 11 is an on-site
`A.
`modem 13. This modem is connected via a communi-
`POLL, TRANSMISSION, ACKNOWLEDGEMENT
`cations channel and customarily over a telephone com-
`AND SIGNOFF
`munications system to a central office bridge 15. The 15
`central office bridge 15 functions to connect the CPU
`modem 13 to one of a plurality of receiver moderns 17
`and 19 located at receiver sites. A receiver site may be
`for example, an individual branch bank. The receiver 20 LINE DISCIPLINE
`modems 17 and 19 are connected to the central office
`PROCESSOR
`bridge 15 by a four or two wire communication chan-
`nel. Operatively and electrically connected to the
`receiver site modems 17 and 19, is a plurality ofter-
`B.
`minal computers (TC). The first terminal in the line, 21 25 POLL WITH NO MESSAGE
`or 27, is followed by a plurality of succeeding terminals
`CENTRAL DAT A
`POLL
`23, 25 and 29, respectively, which are electrically con(cid:173)
`PROCESSOR
`nected in concatenation. In an actual operation there
`may be a large number of receiver site modems, each
`with many terminal computers.
`In the banking industry, for example, each terminal
`computer may represent a teller's window at a branch
`bank. Thus, from the modem 17, for example, the
`branch bank associcated therewith has three terminal
`computers on the modem line, i.e., 21, 23, and 25.
`Similarly, a branch bank having the modem 19 has ter(cid:173)
`minal computers in line therewith, but as is illustrated,
`this comprises only two terminal computers, i.e., 27
`and 29. As may be seen, a number of terminal compu(cid:173)
`ters may be connected in concatenation with a modem 40
`at a branch office. In operation, any instruction or
`request from the CPU 11 will contain an address
`representing one of the terminal computers at a par(cid:173)
`ticular branch bank. Actually, a two character address
`is provided which indicates which terminal computer in 45 D.
`the system is being addressed. When a particular ter-
`SELECTION WITH NO ACCEPTANCE
`minal computer at a teller window is addressed, it then
`has the responsibility to reply to the CPU.
`Referring now to FIG. 2, there is shown a simplified
`block diagram of a remote terminal in which the princi- 50
`pies of the present invention may be incorporated. A
`typical remote terminal such as 21 may be described as
`comprising three major sections: a main processor 33,
`utilizing a main memory 35 and an input/output
`keyboard 37; a line discipline processor 41, with its 55
`message memory 43 and terminal address control logic
`45; and a terminal buffer storage 47. The output of the
`buffer storage 47 is coupled by modem 17 to the input
`of a communication line 22. The discussion of the
`preferred embodiment will deal only with those ter- 60
`minals in line with the modem 17. However, it is ap-
`parent that the explanation is applicable to the modem
`19, as well, or to any group of terminal computers in
`concatenation with an on-line modem. The structure 65
`and operational interrelationship of the sections of the
`terminal 21 is discussed in detail hereinafter in con(cid:173)
`junction with FIGS. 3, 4 and 5 with similar reference
`
`Entries A through D of Table I illustrate typical ex(cid:173)
`amples of messages exchanged between the remote ter(cid:173)
`minal such as 21 or 23 and the central processor 11. A
`remote terminal is capable of operating in either an off-
`
`CENTRAL DAT A SELECT
`PROCESSOR
`S
`EAASE
`ODDEN ACK 0
`Tl 2 LO
`H
`
`LINE DISCIPLINE
`PROCESSOR
`
`A
`C
`
`MESSAGE
`
`AAXSEB
`D D M TT EXT TC ACK
`J 2 X XC
`
`A
`C
`
`K
`
`K
`
`CENTRAL DATA SELECT
`PROCESSOR
`
`E AASE
`ODDEN
`Tl 2LO
`
`LINE DISCIPLINE
`PROCESSOR
`
`NEG.
`
`ACK.
`N
`A
`
`K
`LEGEND
`
`FUNCTION
`
`MESSAGE
`FORMAT
`J 2 3
`
`Page 7 of 12
`
`

`

`5
`the off-line mode,
`line or an on-line mode. In
`processing tasks are accomplished by the main proces(cid:173)
`sor 33 in accordance with program and object data
`stored in its memory 35. In the on-line mode, the main
`processor 33 preferably operating in a poll or select 5
`mode, relies upon communications with the central
`processor 11 over the communication line for at least a
`portion of its operation.
`A poll inquiry message is defined as a message by
`which the central data processor 11 interrogates one of
`a plurality of the addressed remote terminals and
`inquires whether the addressed remote terminal has a
`message ready for transmission to the central proces(cid:173)
`sor. A select inquiry message is defined as a message by 15
`which the central data processor interrogates one of a
`plurality of the addressed remote terminals in the com(cid:173)
`munication net informing the addressed remote ter(cid:173)
`minal that the central processor has a message ready
`for transmission to the addressed remote terminal.
`In either the poll or select inquiry mode, if an ad(cid:173)
`dressed remote terminal is not ready to receive a
`message, i.e., it is either being operated off-line or it is
`otherwise not ready to receive or transmit a message in
`response to the received inquiry message addressed to 25
`line discipline processor 41 automatically
`it, the
`responds with an appropriate "not ready" message to
`the central processor 11. As shown in entries B and D
`of Table I, the line discipline processor 41 responds to a 30
`poll with an EOT ( End of Transmission) and to a select
`with a NAK to indicate that it is not ready to transmit
`or receive a message, respectively, Upon receiving a
`negative acknowledgement from the addressed remote
`processor, the central processor either retransmits its
`message, which may have been garbled in the transmis(cid:173)
`sion channel, or it may continue on its poll or select
`sequence to the next remote terminal in the normal ad(cid:173)
`dressing sequence.
`Referring to entries A through D of Table I, the func- 40
`tion or explanation of the message is written above the
`signal indicating waveform-type line and the message
`format is indicated below the line. The message format
`includes, reading left to right, characters 1, 2, 3 ... N.
`The respective characters indicated are those of the 45
`United States of America Standard Code for Informa(cid:173)
`tion Interchange (USASCII).
`Entry A of Table I illustrates a message exchange for
`a typical poll operation. The first character in the
`message transmitted by the central data processor 11
`comprises an end of transmission character EOT. All
`transmissions may begin with this EOT character or
`another suitable character. Following
`the EOT
`character are two address characters ADI and AD2. In 55
`a typical multi-terminal line environment each remote
`terminal, be it 21, 23, or 25, would have assigned to it a
`plurality of addresses indicating characters which are,
`for example, stored in an expected message portion of
`the memory of the line discipline processor 41. Follow- 60
`ing the address characters are the POL (poll) and ENO
`(inquiry) characters. Entries C and D of Table I show a
`similar message from the central data processor 11 as
`the selection-type
`assembled and
`transmitted for
`inquiry message with
`the SEL (select) character
`replacing the POL character of the poll message format
`illustrated in entries A and B.
`
`6
`Referring again to FIGS. 1 and 2 it may be seen that
`each terminal 21, 23 or 25 through its line discipline
`processor 41 responds only to the messages specifically
`addressed to that terminal even though the communi(cid:173)
`cation network is in a multi-drop mode. In the multi(cid:173)
`drop mode each terminal 21, 23, or 25 receives all
`messages transmitted by the central processor. Each
`terminal is in effect a slave to the central processor
`which establishes the poll and select routing and the
`10 frequency with which each respective terminal 21, 23,
`or 25 in the net will receive a poll or select message ad(cid:173)
`dressed to it.
`The terminal address control logic 45, which may
`comprise a shift register or other memory store and
`logic gating for storing an address generated either by
`the arithmetic unit of the main processor 33 or of line
`discipline processor 41, expands the capabilities of the
`remote terminal by permitting either the terminal
`2o operator or the central processor to determine in ad(cid:173)
`vance the address of the terminal. This in tum deter(cid:173)
`mines which subsequently received messages the
`remote terminal will respond to by determining when
`the present, i.e., altered, address of the remote terminal
`corresponds with the message address characters of the
`inquiry mes.sage transmitted from the central proces-
`sor. As hereinafter is more fully explained in conjunc(cid:173)
`tion with FIGS. 3, 4, and 5, by selectively changing a
`remote terminal, such as terminal 21, into a message
`monitor, any comparison with an expected message
`store is bypassed so that all data coming through the
`modem 17 will appear to be addressed to the terminal
`21 but also be acted on by the addressed terminal.
`Referring now to FIG. 3, there is illustrated a logic
`35 block diagram of the remote computer terminal 21
`capable of modification to a monitor. As hereinabove
`described the remote terminal 21 comprises three
`major sections: a main processor 33, a line discipline
`processor 41 and a terminal buffer storage 47.
`The main processor 33 preferably comprises a stored
`program machine in which object data is manipulated
`in an arithmetic unit 51 in accordance with a sequence
`of micro-logic instructions stored in and withdrawn
`the main memory 35
`in a predetermined
`from
`sequence. The input channel 36 and the keyboard 37
`are arranged to selectively enter programs and object
`data into the processor 33 via an input buffer register
`39. The main memory 35 may comprise, for example, a
`so rotatable magnetic disk having a plurality of read/write
`heads for accessing an unrestricted general memory
`section and a plurality of read only heads for accessing
`a restricted stored program portion of the memory. The
`information and object data stored in the main memory
`is processed in the arithmetic unit 51 which may in(cid:173)
`clude, for example, a full adder and appropriate input
`gating selection networks, not shown. A memory ad(cid:173)
`dress register (MAR) 53 is operatively associated with
`the memory select matrix 35 via gates 55 and 57 to ac(cid:173)
`cess an appropriate portion of the memory data in
`resporise to an address loaded in the MAR by an in-
`struction decoder 59.
`In operation of the main processor in accomplishing
`its tasks as designated by a given program being run,
`the memory address register 53 periodically addresses
`and interrogates the main memory 35 and withdraws
`therefrom an appropriate program
`instruction in-
`
`3,701,971
`
`65
`
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`3,701,971
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`7
`8
`store a series of micro-logic instructions for controlling
`dicated by the address located by the instruction
`decoder 59 into the memory address register 53. The
`the operation of a data comm processor 75 of the line
`discipline processor 41. The mes.sage memory 43 may,
`micro-logic instructions withdrawn from the read only
`portion of memory 35 are sequentially loaded into the
`for example, comprise a rotatable memory having a
`instruction decoder 59. The output of the instruction 5 read-write portion for storing messages and a read-only
`decoder 59 enables appropriate control logic for con-
`memory for storing micro-logic instructions. A head
`trolling various gating functions in the main processor
`selection matrix, not shown, which is responsive to the
`in accordance with the contents of the instruction
`contents of a memory address register 77 is used to
`control the accessing of the message memory 43 for
`decoder 59. The instruction decoder, in response to
`instructions, controls a state IO withdrawing micro-logic instructions and messages
`withdrawn program
`machine 61 via a gate 63. The state machine 61, which
`stored therein. The memory address register 77 of the
`line discipline processor 41 controls the access to, and
`may comprise a counter, generates a sequence of timed
`machine state levels or timing pulses for controlling the
`reading of the micro-logic
`instructions from
`the
`various logic functions of the main processor including, 15 message memory 43 to a decode register 79. The
`for example, the operation of an adder or the exchange
`micro-logic instructions withdrawn from the message
`memory 43 are decoded in the decode register 79 with
`of information between the memory, the main proces-
`the output of the decode register 79 controlling a state
`sor, the instruction decoder or a printer 65. As shown,
`either the arithmetic unit 51 or the memory 35 of the
`machine 81 in accordance with the contents of the
`terminal processor in conjunction with the instruction 20 decoded program step. In this manner the decode re-
`gister 79 controls the generation of appropriate logic
`decoder 59 may directly actuate the printer 65 via
`gates 67 and 69, respectively, thus providing a hard
`gating signals for controlling the operation of the data
`copy of the results of the arithmetic units computation.
`comm processor 75, which may comprise a full adder
`As in a normal stored program machine, after each
`and appropriate gating for manipulating data in ac-
`instruction is decoded by the instruction decoder 59 25 cordance with decoded micro-logic instructions.
`and executed by the memory 35 and state machine 61,
`As is known in the art, the state machine 81
`the processor, for example through its adder logic,
`generates appropriate timing signals to control the
`operation of logic gates for example 85, 87 and 89
`generates an advance signal to increment, for example,
`a counter associated with the instruction decoder
`which control the exchange of information between the
`thereby advancing the instruction counter to the next 30 decode register 79 and the data comm processor 75.
`The operation of the state machine 81, which may
`count in its orderly count sequence. In response to the
`new contents of the instruction counter, the next in a
`comprise a counter, may be further controlled by ap-
`series of micro-logic instructions would be withdrawn
`propriate control signals designated T.r and R.r which
`from the main memory 35 and serially fed to the in-
`designate a function of the transmit or receive state of
`struction decoder 59. In this manner, the respective 35 the line discipline processor 41 and buffer 47.
`When the main processor 33 has a message to be
`sequential syllables of a memory word of a program in-
`struction would be transferred to the instruction
`transmitted to the central processor, the message to be
`transmitted is originally assembled by the main proces-
`decoder to properly energize the control matrix for
`withdrawing the appropriate program steps and/or data 40 sor 33 in a specific area of the memory 35. After moni-
`toring and determining the condition of transmit and
`from the memory. Thereafter the instruction decoder
`receive flag registers 91 and 93 respectively, the main
`in response to the decoded program instruction would
`the state machine 61
`appropriately energize
`to
`processor selects an appropriate time and transfers the
`message from memory 35 of the main processor 33 to
`generate appropriate logic timing signals to enable the
`main processor to accomplish the task indicated by 45 the message memory 43 of the line discipline processor
`41 for example via the arithmetic unit 51 and the
`each decoded program instruction. As the various steps
`decoder 59. Thereafter the main processor is free to
`of the serial program are sequentially executed an ap-
`propriate output is generated on the printer 65.
`return to its off-line task, and the line discipline proces-
`sor 41 awaits the receipt of a poll from the central
`In addition to being able to operate off-line, the
`remote terminal 21 is capable of operating on-line and 50 processor to initiate the transmission of the message
`communicating with the central processor 11 as shown
`stored in the message memory 43. The sequence and
`in FIG. 1. This communication with the central proces-
`format of inquiry and response messages transmitted
`sor is controlled by the line-discipline processor 41.
`between the line discipline processor 41 and the central
`The line discipline processor 41 is preferably a stored
`data processor 11 have been discussed hereinabove in
`program machine and may be similar in structure and 55 detail in conjunction with Table I and FIGS. 1, 2 and 3.
`operation to the main processor 33. The function of the
`When the line discipline processor 41 receives an
`inquiry message from the central processor 11, the ap-
`line discipline processor is to establish line discipline in
`accordance with stored micro-logic for controlling the
`propriate R.r signal, i.e., a signal for example, signifying
`communication line carrier detect, actuates a gate 95
`assembly, editing, formatting and parity generation-
`check of messages to be transitted to, and as received 60 thereby initiating the operation of the state machine 81
`from, the central processor 11 for the main processor
`in the receive mode. The received inquiry message is
`33.
`transferred bit serially from the modem 17 to the buffer
`line discipline processor 41
`storage 47 as it is received serially from the line. The in-
`The
`is
`(FIG. 3)
`preferably similar in structure and operation to the 65 formation stored in the buffer 47 is then compared in a
`main processor 33. An auxiliary or message memory 43
`comparator 101 with an expected message format
`previously stored, for example, in a message store 103,
`is arranged to store messages to be sent to, and
`received from the central data processor 11 and to
`which may comprise any memory, for example, an
`
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`their address. In the following discussion, the terminal
`array of flip flops arranged to store encoded informa-
`21 is modified as a monitor, and the terminal 23 which
`tion in the form of the expected message format as
`is downstream from the terminal 21, will operate in the
`hereinabove described in conjunction with Table I.
`As shown, a pair of logic gates 105 and 107 in con-
`normal manner as a transmitter and receiver of
`junction with suitable timing signals, for example t 0 5 messages.
`Referring to the flow diagram of FIG. 4, all memory
`through t~, may be employed to transfer or couple the
`buffers of the terminal 21 will be cleared starting with
`contents of the respective stages of the buffer storage
`the main memory buffer (not shown) and proceeding
`47 and the expected message store 103 to the compara-
`to the buffer storage 47. A portion of the message
`tor 101. In this manner the respective binary bits of the
`appropriate portions of the received message and the 10 memory 43 is used for micro-logic instructions utilized
`in normal machine operation and for example, a
`expected message store may be compared bit by bit to
`message memory of at least 256 words may normally
`check and determine the equivalence therebetween.
`Also, the respective bits of the received message com-
`have only 64 words available for line traffic storage.
`prising the parity bit and the address bits may be com- 15 However, in a monitor situation, 192 words are pro-
`pared to determine whether parity of the received
`vided for use by the terminal computer for line traffic
`storage. This operation is referred to as redesignation,
`message checks and whether the message as received is
`addressed to the receiving terminal.
`in the flow diagram.
`In the monitor mode, the gate 109, in FIG. 3, will
`In the event the parity and address portions of the
`received message compare with that information or 20 signal the data comm processor 75 that a message has
`data stored in the expected message store, the output of
`been received and the comparison with the expected
`the comparator 101 would be logically true and a gate
`message store is positive. This is accomplished, even
`109 would appropriately signal the data comm proces-
`though the message is not addressed to the monitor ter-
`sor 75 of the line discipline processor 41. In response to
`minal 21, by suppressing the comparison in comparator
`this indication of compa