`U8005596604A
`
`United States Patent
`
`[19]
`
`[11] Patent Number:
`
`5,596,604
`
`Ciofli et al.
`
`
`
` [45] Date of Patent: Jan. 21, 1997
`
`[54]
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`[75]
`
`[73]
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`[21]
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`[22]
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`[51]
`[52]
`158]
`
`[561
`
`MULTICARRIER MODULATION
`TRANSMISSION SYSTEM WITH VARIABLE
`DELAY
`
`Inventors: John M. Ciofii, Cupertino; Po Tong,
`Fremont; James T. Aslanis, Mountain
`View; Antoinette H. Gooch, Palo Alto,
`all of Calif.
`
`Assignee: Amati Communications Corporation,
`San Jose, Calif.
`
`Appl. No.: 107,200
`
`Filed:
`
`Aug. 17, 1993
`
`Int. Cl.6 ....................................................... H04K 1/10
`
`US. Cl. ...............
`. 345/260; 371/43; 371/35
`Field of Search ....................... 375/38, 39; 371/38.1,
`371/39.l, 43, 35
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`4,394,642
`4,677,625
`4,747,104
`4,852,102
`4,980,897
`5,105,442
`5,107,504
`5,243,629
`5,251,236
`5,282,019
`1287374
`5,305,352
`5,321,725
`5,392,300
`
`7/1983 Currie et a1.
`..................... 340/347 DD
`6/1987 Betts et al. ................ 371/43
`
`5/1988 Piret .......
`371/39
`
`"u
`.u 371/40
`7/1989 Skunaguc
`
`12/1990 Decker et al.
`.
`375/38
`
`4/1992 Wei ........................... 375/39
`
`371/37.1
`4/1992 Nakamura et al.
`
`...................
`9/1993 Wei
`371/43
`
`10/1993 Brehmer et al.
`375/59
`
`. 348/473
`1/1994 Basile et al.
`
`2fl994 PmI ...................
`.".371M3
`
`4/1994 Calderbank et al.
`375/39
`
`
`..........
`6/1994 Paik et al.
`375/39
`............................... 371/43
`2/1995 Borth et al.
`
`OTHER PUBLICATIONS
`
`Bingham, “Multicarrier Modulation for Data Transmission:
`An Idea Whose Time Has Come”, IEEE Communications
`Magazine, pp. 5—(May 1990).
`Chow et al., “A Discrete Multitone Transceiver System for
`HDSL Applications”, IEEE Journal on Selected Area in
`Communications, vol. 9, No. 6, pp. 895—908 (Aug. 1991).
`Chow et al., “Performance Evaluation of a Multichannel
`Transceiver System for ADSL and VHDSL Services”, IEEE
`Journal on Selected Areas in Communications, v01. 9, N0. 6,
`pp. 909—919 (Aug. 1991).
`Fleming et al., “ADSL: The On—Ramp to the Information
`Highway”, Telephony, pp. 20, 24—26 (Jul. 1993).
`Clark et al., “Interleaver Structures for Coded Systems”,
`Error—Correction Coding for Digital Communications, Sec-
`tion 8.3, pp. 347—349.
`
`Primary Examiner—Stephen Chin
`Assistant Examiner—T. Ghebretinsae
`Attorney, Agent, or Finn—Hickman Beyer & Weaver, LLP
`[57]
`ABSTRACT
`
`A transmission system using multicanier modulation applies
`FECC (forward error correcting code) coding and codeword
`interleaving differently to input signals from a plurality of
`diiferent data channels to produce encoded data signals
`having different reliabilities and different coding delays. Bits
`of encoded data signals having relatively less delay are
`allocated to carriers that are subject to relatively more
`attenuation and/or channel noise, and hence that are allo-
`cated fewer bits for transmission in each symbol period, to
`reduce the effects of impulse noise. The data channels can
`comprise video, data, and control channels transmitted on an
`ADSL (asymmetric digital subscriber line) two-wire tele-
`phone line.
`
`22 Claims, 3 Drawing Sheets
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`30
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`32
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`34
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`36
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`42
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`INPUT
`DATA
`CHANNELS
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`SWITCH
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`ADD PREFIX
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`INTERFACE,
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`OUTPUT
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`DATA
`CHANNELS
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`BIT
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`SORTEH
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`DECODER
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`52
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`54
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`INTERFACE
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`1
`MULTICARRIER MODULATION
`TRANSMISSION SYSTEM WITH VARIABLE
`DELAY
`
`This invention relates to transmission systems using
`multicarrier modulation, also known as discrete multitone
`(DMT) modulation where, as is desirable, the modulation is
`effected using a discrete Fourier Transform.
`
`BACKGROUND OF THE INVENTION
`
`The principles of multicarrier modulation are described
`for example in “Multicarrier Modulation For Data Trans-
`mission: An Idea Whose Time Has Come” by John A. C.
`Bingham, IEEE Communications Magazine, Vol. 28, No. 5,
`pages 5—14, May 1990. As is known, in a transmission
`system using multicarrier modulation, FDM (frequency
`division multiplex) carriers spaced within a usable fre-
`quency band of a transmission channel, forming a set of
`subchannels, are modulated at a block or symbol transmis—
`sion rate of the system. The bits of input data for transmis-
`sion within each block or symbol period are allocated to the
`carriers or subchannels so that the bit error rates of the
`subchannels as monitored at the receiver, are substantially
`equal. As a result, the diiferent subchannels carry difierent
`numbers of bits in each symbol period. With an appropriate
`allocation of bits and transmit powers to the carriers or
`subchannels, such a system provides a desirable perfor-
`mance.
`
`The characteristics and performance of one such system,
`for communicating data at a rate of 1.6 Mb/s over a twisted
`pair channel using 256 subchannels,
`is described in “A
`Discrete Multitone Transceiver System For HDSL Applica-
`tions” by J. S. Chow et al., IEEE Journal On Selected Areas
`In Communications, Vol. 9, No. 6, pages 895—908, August
`1991. A companion paper by P. S. Chow et al. entitled
`“Performance Evaluation Of A Multichannel Transceiver
`System For ADSL and VHDSL Services”, at pages 909—919
`of the same publication, addresses a similar system applied
`to an asymmetric digital subscriber line (ADSL).
`An article by S. Fleming et al. entitled “ADSL: The
`on-ramp to the information highway”, Telephony, Jul. 12,
`1993, pages 20—26 describes one example of an ADSL
`arrangement applied to a two-wire telephone subscriber line,
`in which four asymmetric 1.5 Mb/s channels are provided
`for transmission in a downstream direction from a telephone
`CO (central office) to a subscriber, in addition to various data
`channels and POTS (plain old telephone service) carried
`symmetrically (i.e. bidirectionally) on the line. The data
`channels for example comprise an ISDN (integrated services
`digital network) H0 channel at 384 kb/s or an ISDN basic
`access channel at 144 kb/s, and a control channel for
`example at a bit rate of 16 kb/s. The four asymmetric
`channels provide a total bandwidth of 6 Mb/s that can be
`used for digital video signals.
`A well known problem in the art of transmission systems
`is that of impulse noise, which can produce bursts of errors
`on transmission channels. In order to address this problem,
`it is known to apply forward error correction coding (FECC)
`and interleaving techniques in which a block of input data to
`be transmitted is augmented with parity data that enables
`one or more errors in the block to be detected and corrected,
`the input data and parity data constituting a codeword, and
`over time parts of diiferent codewords are interleaved for
`transmission to reduce the effect of error bursts on individual
`codewords. For example, Currie et al. US. Pat. No. 4,394,
`
`10
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`2
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`642 issued Jul. 19, 1983 and entitled “Apparatus For Inter-
`leaving and De-Interleaving Data” describes one such
`arrangement. The interleaving can instead be convolutional
`interleaving, for example as described in Section 8.3.1.2 of
`“Error-Correction Coding for Digital Communications” by
`George C. Clark, Jr. and J. Bibb Cain, Plenum Press, pages
`347—349.
`
`The use of FECC increases the bit rate required of the
`actual transmission system in dependence upon the parity
`overhead, i.e.
`the size of the parity data relative to the
`codeword size, and increases complexity. The interleaving
`process increases immunity to error bursts due to impulse
`noise, but adds transmission delay. Longer periods over
`which the interleaving is effected result in greater inununity
`to impulse noise, but greater transmission delays. Thus there
`is a trade-off between high reliability (requiring eifective
`error correction and immunity to impulse noise) and short
`transmission delay.
`Different types of signals, which may be required to be
`transmitted via a single transmission system, may have
`diiferent requirements for reliability and transmission delay.
`For example, digital video signals that are highly com-
`pressed require a high reliability for their transmission, and
`ISDN voice signals must meet strict transmission delay
`requirements. In known transmission systems, it has been
`necessary to provide a compromise between high reliability
`and transmission delay for different types of signals.
`It is also known to apply trellis code modulation (TCM)
`techniques to a system using multicarrier modulation in
`order to improve the performance of the system through the
`coding gain provided by the trellis coding. For example,
`Decker et al. US Pat. No. 4,980,897 issued Dec. 25, 1990
`and entitled “Multi—Channel Trellis Encoder/Decoder” dis—
`closes such a system in which the encoding and decoding
`processes operate on all of the subchannels sequentially in
`order to reduce delay. As is well known, TCM results in
`sequences of transmitted signal constellation points that
`have a greatly increased separation, hence the improved
`performance, and necessitates more complex decoding
`involving maximum likelihood sequence estimation, usually
`implemented using the Viterbi algorithm.
`The performance improvements that are provided by
`TCM and by FECC as described above are largely indepen-
`dent of one another, so that TCM and FECC can be used
`together in a transmission system.
`In Betts et al. US. Pat. No. 4,677,625 issued Jun. 30, 1987
`and entitled “Distributed Trellis Encoder” there is described
`an FECC arrangement in which interleaving is effected by
`switching among a plurality of trellis coders with delay
`units, with corresponding switching among a plurality of
`trellis decoders at a receiver. The use of a plurality of
`encoders and decoders in such a manner undesirably adds to
`the costs and complexity of the arrangement. The Betts et al.
`patent relates to a transmission system using QAM (quadra-
`ture amplitude modulation) of a single carrier, and not to a
`transmission system using multicarrier modulation.
`An object of this invention is to provide an improved
`transmission system using multicarrier modulation.
`
`SUMMARY OF THE INVENTION
`
`According to one aspect of this invention there is pro—
`vided a data transmission system using multicarrier modu-
`lation, comprising: FECC (forward error correction code)
`coding and codeword interleaving apparatus arranged for
`diiferently encoding a plurality of data signals to provide a
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`plurality of encoded data signals with different delays
`through the coding and interleaving apparatus; and a modu—
`lator arranged to modulate bits of the encoded data signals
`onto multiple carriers of the transmission system, different
`numbers of bits in each transmission symbol period being
`allocated to different carriers.
`
`The different delays through the coding and interleaving
`apparatus correspond to diiferent levels of coding and/or
`interleaving and hence to different degrees of reliability of
`the transmitted signals, especially with respect
`to their
`immunity to impulse noise, the least delayed signals being
`the most vulnerable to impulse noise. Thus each signal to be
`transmitted can be communicated with an individually
`selected compromise between high reliability and short
`transmission delay.
`In order to compensate for the greater vulnerability of the
`least delayed (i.e. least interleaved) signals to impulse noise,
`preferably the modulator is arranged to allocate bits of
`encoded data signals having relatively less interleaving to
`caniers carrying relatively fewer bits in each symbol period.
`The greater transmission attenuation of such carriers, which
`for signal transmission are compensated for by the allocation
`of fewer bits in each symbol period, acts to advantage in also
`attenuating the impulse noise.
`The coding and interleaving apparatus can comprise a
`plurality of data paths providing the encoded data signals
`with different delays, and a switch for switching different
`data signals to different data paths.
`In an embodiment of the system described below, the
`coding and interleaving apparatus comprises a first store for
`storing the plurality of data signals, a second store, an FECC
`coder coupled between an output of the first store and an
`input of the second store, and a control unit for controlling
`the supply of data signals from the first store to the coder and
`for controlling storage of FECC codewords from the coder
`into the second store to provide codeword interleaving. The
`coder can be a programmable FECC coder arranged to be
`programmed by the control unit to provide different coding
`for different data signals, and the control unit can provide
`different depths of interleaving for the FECC codewords of
`different data signals.
`In this case the modulator preferably comprises a table for
`providing indices of the carriers in order of the number of
`bits in each transmission symbol period allocated to the
`carriers, means for reading the respective number of bits for
`each carrier from the second store in order of the different
`
`delays through the coding and interleaving apparatus, and
`sorting means for supplying the respective bits for modula-
`tion onto the respective carriers.
`The multicarrier modulation is preferably implemented
`using a discrete Fourier Transform and preferably incorpo-
`rates trellis coding. Accordingly the modulator preferably
`comprises a trellis coder, apparatus for providing an Inverse
`Fast Fourier Transform (IFFT), a table for providing indices
`of the carriers in order of the number of bits in each
`
`transmission symbol period allocated to the carriers, means
`for reading the respective number of bits for each carrier
`from the second store to the trellis coder in order of the
`different delays through the coding and interleaving appa-
`ratus, and a sorter for supplying signal amplitudes supplied
`by the trellis coder to storage locations of the IFFT apparatus
`identified by the respective carrier indices.
`According to another aspect, the invention provides a data
`transmission system using multicarrier modulation, com-
`prising: apparatus for applying FECC (forward error cor-
`rection code) coding and codeword interleaving differently
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`to different data signals to produce encoded data signals with
`different delays; and means for allocating the encoded data
`signals to the multiple carriers in dependence upon said
`delays and in accordance with a predetermined criterion.
`Preferably the predetermined criterion comprises trans—
`mission attenuation of and/or noise on the carriers, bits of
`the encoded data signals having relatively less delay being
`allocated to carriers that are subject
`to relatively more
`attenuation and/or noise. Alteratively,
`the predetermined
`criterion may comprise the signal-to-noise ratios of the
`carriers, or another characteristic of the carriers or the
`transmitted signals that can be monitored by the transmis-
`sion system, and may take into account a desired distribution
`of error rates among the carriers.
`The invention also provides a method of modulating
`multiple carriers with signals of a plurality of data channels,
`comprising the steps of: applying FECC (forward error
`correcting code) coding and codeword interleaving differ—
`ently to signals of different data channels to produce
`encoded data signals having different delays; and modulat-
`ing different numbers of bits of the encoded data signals onto
`different carriers.
`
`Preferably the modulating step includes the step of allo-
`cating bits of the encoded data signals having relatively less
`delay to carriers carrying relatively fewer bits.
`Preferably the step of applying FECC coding and code-
`word interleaving comprises the steps of: storing signals of
`the different data channels; sequentially FECC coding the
`stored signals to produce FECC codewords; and storing the
`FECC codewords in an interleaved manner, the interleaving
`being diiferent for the codewords of the different data
`channels. The modulating step preferably also includes the
`step of trellis coding the bits of the encoded data signals.
`The invention further extends to a method of modulating
`multiple carriers with signals of a plurality of data channels,
`comprising the steps of: applying FECC (forward error
`correction code) coding and codeword interleaving differ-
`ently to signals of different data channels to produce
`encoded data signals having different coding delays; and
`allocating the encoded data signals to the carriers in depen-
`dence upon the coding delays and in accordance with a
`predetermined criterion. Conveniently the predetermined
`criterion comprises transmission attenuation of and/or noise
`on the carriers, bits of the encoded data signals having
`relatively less delay being allocated to carriers that are
`subject to relatively more attenuation and/or noise.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`The invention will be further understood from the fol-
`
`lowing description with reference to the accompanying
`drawings, in which:
`FIG. 1 illustrates a block diagram of an ADSL transmis-
`sion system using multicarrier modulation in accordance
`with an embodiment of this invention;
`FIG. 2 illustrates a functional block diagram of a down—
`stream transmitter, provided at a telephone CO, and a
`downstream receiver, provided at a subscriber’s premises, of
`the system of FIG. 1;
`FIG. 3 illustrates a block diagram of an embodiment of
`parts of the downstream transmitter; and
`FIG. 4 is a diagram illustrating the operation of parts of
`the downstream transmitter.
`
`DETAILED DESCRIPTION
`
`Referring to FIG. 1, an ADSL transmission system com-
`prises a telephone central oflice (CO) transceiver 10 and
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`remote terminal (RT) transceiver 12, linked via a channel 14
`providing a downstream transmission path 16, from a down-
`stream transmitter (Tx) 18 in the CO to a downstream
`receiver (Rx) 20 in the RT, and an upstream transmission
`path 22 from an upstream transmitter 24 in the RT to an
`upstream receiver 26 in the CO.
`Signals transmitted in the downstream direction are indi-
`cated by way of example as comprising digital video, ISDN,
`control, and POTS signals, and signals transmitted in the
`upstream direction are indicated by way of example as
`comprising ISDN, control, and POTS signals; other types of
`data may be transmitted in a similar manner. The system is
`asymmetric in that the video signals, which require a large
`bandwidth of for example 6 Mb/s as already discussed, are
`transmitted only in the downstream direction. The other
`signals,
`transmitted in both directions, require a much
`smaller bandwidth. In addition to these signals, an opera-
`tions control channel (OPC) provides for transmission in
`both directions on the channel 14 between the transceivers
`10 and 12 of control signals required for operation of the
`transceivers as described below.
`
`The channel 14 is for example a two-wire telephone
`subscriber line on which the POTS signals are transmitted in
`a low frequency band below about 10 kHz and on which the
`other signals are transmitted by multicarrier modulation at
`higher frequencies. The downstream and upstream signals
`can be separated by frequency division multiplexing or
`using echo cancellation techniques.
`Referring to FIG. 2, the downstream transmitter 18 func-
`tionally comprises a switch 30, one or more FECC (forward
`error correcting code) coders 32 two of which are illustrated,
`data buffers 34, a trellis coder 36 having an associated bit
`and energy allocation table 38 and a carrier index table 40,
`a sorter 42, an Inverse Fast Fourier Transform (IFFI‘)
`apparatus 44 including a bufier at its input and a prefix adder
`at its output, and a digital-to-analog converter, analog filter,
`and line interface block 46. Conversely, the downstream
`receiver 20 comprises a line interface, analog filter, and
`analog-to—digital converter block 48 that is assumed also to
`include a digital filter, an FFI‘ apparatus 50 including a
`prefix remover at its input and frequency domain equalizers
`(FEQ) and a buffer at its output, a sorter 52, a trellis decoder
`54, operating in accordance with the Viterbi algorithm to
`perform maximum likelihood sequence estimation in known
`manner, having an associated bit allocation table 56 and
`carrier index table 58, data bufiers 60, one or more FECC
`decoders 62 complementary to the coders 32, and a switch
`64.
`
`The components 44 to 50 form a multicarrier modulation
`or DMT transmission system of generally known form, to
`which system the components 36, 38, 54, and 56 add trellis
`coding and decoding in generally known manner. In this
`system data signals, constituted by the video, ISDN, control,
`and OPC signals represented in FIG. 1, are frequency
`division multiplexed at frequencies above about 10 kHz, i.e.
`above the frequencies of POTS telephone signals that are
`supplied to and derived from the blocks 46 and 48 and are
`separated by the analog filters within these blocks.
`By way of example, the DMT system may have 256
`carriers with a frequency spacing of 4 kHz, the discrete
`Fourier transform accordingly having a length of N=512,
`with a symbol period of 250 us and about 1700 bits per
`symbol to provide a total transmission rate of about 6.8
`Mb/s, with each carrier or subchannel carrying a number of
`bits in each symbol period that depends on the characteris-
`tics (e.g. signal to noise ratio, or SNR) of the subchannel.
`
`6
`The number of bits carried by each subchannel in each
`symbol period can be zero (i.e. the subchannel is not being
`used) or can vary from a minimum number, for example 1
`or 2 bits, to a maximum number, for example in a range from
`10 to 16 bits. Because the subchannels carry variable num-
`bers of bits, the total transmission rate of the system is not
`fixed but can be increased or decreased to meet particular
`requirements.
`Signals from a plurality of input data channels, for
`example information and control channels as discussed
`above, are supplied to inputs of the switch 30, which
`switches these signals to one of a plurality of outputs each
`coupled to a respective one of the plurality of FECC coders
`32. Although two FECC coders 32 are shown in FIG. 2, a
`different number of such coders may alternatively be pro-
`vided. Each FECC coder 32 provides a respective degree of
`FECC coding and interleaving, and hence reliability of the
`data signals that it encodes, and a corresponding transmis-
`sion delay. The switch 30 switches the data signals to the
`respective outputs and hence FECC coders in accordance
`with latency (i.e. transmission delay) and reliability require-
`ments for the respective signals. As already indicated, such
`requirements can vary for difierent types of signals, and for
`signals on a single channel at different times.
`The particular characteristics of the individual FECC
`coders 32 are not important to the invention, but the different
`coders have different degrees of interleaving so that the
`transmitted data signals have different» susceptibilities to
`impulse noise as discussed further below. For example, one
`of the FECC coders 32 may provide coding with relatively
`short term or no interleaving, or even may be omitted
`entirely, thus propagating data signals with little or no delay
`but with a relatively high susceptibility to impul‘se noise, and
`the other of the coders 32 may provide coding with inter—
`leaving over relatively long periods, thereby propagating
`data signals with a high immunity to impulse noise but with
`a relatively long delay.
`The data signal codewords output from the FECC coders
`32 are buffered in the buffers 34, which are represented in
`FIG. 2 as being divided into relatively fast, i.e. short delay,
`buffers and relatively slow, or long delay, bulfers, corre-
`sponding to the respective interleaving periods associated
`with the respective FECCs 32. In practice, as described
`below, the storage in the buffers 34 is used in implementing
`the FECC interleaving. The units 36 to 42 serve to read bits
`of the codewords from the buffers 34, implement trellis
`coding, and supply the resulting amplitudes to the IFFT
`apparatus 44 in each transmission symbol period for trans-
`mission via the multicarrier subchannels. The operation of
`the units 36 to 42 is described further below.
`
`Conversely, in the receiver 20 amplitudes produced by the
`FFT apparatus 50 are converted by the units 52 and 54 to
`codeword bits that are supplied to the buffers 60,
`the
`codewords being de-interleaved and decoded by the FECC
`decoders 62, each of which operates in a complementary
`manner to a respective one of the FECC coders 32. From the
`FECC decoders 62 the decoded data signals are supplied to
`respective output data channels via the switch 64.
`Although details of the units 44 to 50 are not significant
`to the present invention, it is noted here that the prefix added
`at the output of the IFFT apparatus 44 consists of a repetition
`of information from the end of a data block in order to
`provide a guard space to eliminate interference from one
`transmitted symbol to the next. The digital filter in the block
`48 is a time domain equalizer in the form of a finite impulse
`response filter that limits such interference to less than the
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`|PR2019-00958
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`Apple Inc. EX1006 Page 7
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`IPR2019-00958
`Apple Inc. EX1006 Page 7
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`the prefix then being removed or
`length of the prefix,
`subtracted at the input of the FFT apparatus 50 thereby
`eliminating the interference. The frequency domain equal-
`ization (FEQ) at the output of the FFT apparatus 50 operates
`individually on each subchannel and adaptively adjusts for
`the attenuation and delay of each carrier.
`In addition it is observed that, while preferred, the use of
`trellis coded modulation is not essential to the invention.
`Accordingly the trellis coder 36, which converts data bits
`from the buffers 34 into scaled amplitudes for the IFFT
`apparatus 36 as well as implementing the trellis coding, may
`be replaced by simpler apparatus for converting data bits
`into scaled amplitudes without any trellis coding, with a
`complementary replacement of the trellis decoder 54.
`As is well known and discussed above, in each symbol
`period of a system using multicarrier modulation different
`subchannels carry different numbers of bits, in accordance
`with the SNR of the respective subchannels. Typically, it
`may be desired for all of the subchannels to have substan—
`tially the same SNR as monitored at the receiver, and this is
`assumed by way of example in the remainder of this
`description, but other distributions of SNR among subchan-
`nels may be desirable and can alteratively be provided. The
`SNR of each subchannel is dependent upon the attenuation
`and the noise level of the subchannel. Accordingly, subchan-
`nels with a relatively high attenuation or noise level are
`allocated relatively fewer bits, and hence a greater signal
`point spacing at the transmitter, than subchannels with a
`relatively low attenuation or noise level. Due to the different
`subchannel attenuations,
`the signal point spacing at the
`receiver (and the bit error rate) is approximately the same for
`all of the subchannels. Thus the characteristics of the sub—
`channels are substantially compensated for by an appropri-
`ate distribution of the number of bits carried by each
`subchannel.
`
`impulse noise can be
`The invention recognizes that
`coupled onto the transmission path at any point along its
`length, and from its coupling point to the receiver 20 is
`subjected to the same frequency-dependent attenuation as
`the data signals. (Impulse noise may also be introduced in
`the transmitter 10 as a result of clipping in digital logic or at
`the digital-to-analog converter,
`this possibly being intro-
`duced deliberately in order to reduce implementation costs.)
`Consequently, impulse noise that appears on the relatively
`more attenuating subchannels, which carry relatively fewer
`bits in each symbol period, is relatively more attenuated at
`the receiver. It follows that subchannels carrying relatively
`fewer bits in each symbol period are less susceptible to
`impulse noise (because of the greater attenuation) than
`subchannels carrying relatively more bits in each symbol
`period.
`In order to provide the best possible overall performance,
`corresponding to all of the data signals having substantially
`the same immunity to impulse noise, the invention matches
`those data signals that are the most susceptible to impulse
`noise, by virtue of interleaving of the FECC codewords over
`relatively shorter periods, with the subchannels that have the
`most attenuation (and hence carry the fewest number of bits
`in each symbol period) and hence on which the impulse
`noise is most attenuated so that it has the least effect at the
`receiver.
`
`To this end, in the transmitter 18, the index table 40 is
`arranged to store the index, or number, i of each subchannel
`sorted in order of increasing number of bits b,- (from the
`minimum number to the maximum number as discussed
`
`above) per symbol period allocated to the subchannels. In
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`each symbol period, the sorted indices i are read in turn from
`the index table 40 and used to address the table 38, and are
`supplied to the sorter 42. The allocated number of bits to be
`used for the respective subchannel, and an energy scale
`
`factor for the subchannel, are accordingly read from the
`table 38 and supplied to the trellis coder 36, which reads the
`allocated number of bits from the buffers 34 starting with the
`fastest (least interleaving and delay) buffer and progressing
`gradually through all of the bits to be read and transmitted
`in the symbol period, ending with the slowest (most inter-
`leaving and delay) bufier. For each subchannel index i the
`trellis coder 36 produces amplitudes, representing a signal
`point in a constellation of 2”i signal points and scaled in
`accordance with the energy scale factor for the subchannel,
`which are written by the sorter 42 into a position i in the
`buffer at the input of the IFFT apparatus 44.
`In the receiver 20, the index table 58 is the same as the
`index table 40, and the bit allocation table 56 stores the same
`allocations of number of bits for each subchannel as the table
`
`38. As in the transmitter, in each symbol period the sorted
`indices i are read in turn from the index table 58, are
`supplied to the sorter 52, and are used to address the table
`56. The allocated number of bits used for the respective
`subchannel i are read from the table 56 and supplied to the
`trellis decoder 54, which reads the amplitudes from the
`position i in the output bufl°er of the FFT apparatus 50 as
`identified by the sorter 52 and supplies the relevant number
`of bits to the buffers 60, starting in each symbol period with
`the fastest (least interleaving and delay) buffer and progress-
`ing gradually to the slowest (most interleaving and delay)
`buffer. The operation of the FECC decoders 62 and the
`switch 64 is the inverse of the coders 32 and switch 30.
`The various units in the transceivers 10 and 12 can be
`
`implemented in various ways, using arrangements of hard—
`ware and/or software. FIG. 3 illustrates by way of example
`a block diagram of one embodiment of the units 30 to 42,
`and the bufier at the input of the IFFT apparatus 44, of the
`downstream transmitter 18.
`
`Referring to FIG. 3, a microprocessor control unit 68,
`which may comprise one or more microprocessors such as
`digital signal processors for carrying out respective func-
`tions,
`is coupled via various control paths to a RAM
`(random access memory) 70 that operates as the sw