throbber
(12) United States Patent
`Slater, Jr. et al.
`
`USOO67911 19B2
`US 6,791,119 B2
`Sep. 14, 2004
`
`(10) Patent No.:
`(45) Date of Patent:
`
`(54)
`
`(75)
`
`(73)
`(*)
`
`(21)
`(22)
`(65)
`
`(60)
`
`(51)
`(52)
`(58)
`(56)
`
`LIGHT EMITTING DODES INCLUDING
`MODIFICATIONS FOR LIGHT
`EXTRACTION
`
`Inventors: David B. Slater, Jr., Raleigh, NC (US);
`Robert C. Glass, Chapel Hill, NC
`(US); Charles M. Swoboda,
`Morrisville, NC (US); Bernd Keller,
`Goleta, CA (US); James Ibbetson s
`Goleta, CA (US); Brian Thibeault,
`Santa Barbara, CA (US); Eric J. Tarsa,
`Goleta, CA (US)
`Assignee: Cree, Inc., Durham, NC (US)
`Notice:
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`Appl. No.: 10/057,821
`Filed:
`Jan. 25, 2002
`Prior Publication Data
`US 2002/0123164 A1 Sep. 5, 2002
`Related U.S. Application Data
`Provisional application No. 60/307,235, filed on Jul. 23,
`2001, and provisional application No. 60/265,707, filed on
`Feb. 1, 2001.
`Int. Cl................................................. H01L 33/00
`U.S. Cl. .............................. 257/99; 257/95; 257/98
`Field of Search ............................... 257/95, 98, 99
`
`References Cited
`
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`Light-Emitting
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`(List continued on next page.)
`Primary Examiner Jerome Jackson
`(74) Attorney, Agent, or Firm- Myers Bigel Sibley &
`Sajovec
`ABSTRACT
`(57)
`Light emitting diodes include a Substrate having first and
`Second opposing faces and that is transparent to optical
`radiation in a predetermined wavelength range and that is
`patterned to define, in cross-section, a plurality of pedestals
`that extend into the Substrate from the first face towards the
`Second face. A diode region on the Second face is configured
`to emit light in the predetermined wavelength range, into the
`Substrate upon application of Voltage acroSS the diode
`region. A mounting Support on the diode region, opposite the
`Substrate is configured to Support the diode region, Such that
`the light that is emitted from the diode region into the
`Substrate, is emitted from the first face upon application of
`Voltage across the diode region. The first face of the Sub
`Strate may include therein a plurality of grooves that define
`the plurality of triangular pedestals in the Substrate. The
`grooves may include tapered Sidewalls and/or a beveled
`floor. The first face of the substrate also may include therein
`an array of Via holes. The via holes may include tapered
`sidewalls and/or a floor.
`104 Claims, 15 Drawing Sheets
`
`738
`735
`734
`
`1700
`
`1726
`
`742
`
`744 r 74
`
`1750 A
`bonding
`arrier
`adhesion
`
`Ohmicireflector r
`
`-A 1310a
`
`13
`
`22 N 1724
`
`1320
`
`Ohmic
`refector
`arrier
`1748 ... --To-or
`bonding
`
`20
`
`Cree Exhibit 1012
`Page 1
`
`

`

`US 6,791,119 B2
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`5,247,533 A 9/1993 Okazaki et al. ............... 372/45
`5,338.994 A 8/1994 Lezan et al. ....
`... 307/86
`5,369,289 A 11/1994 Tamaki et al. ..
`... 257/99
`5,393,993 A 2/1995 Edmond et al.
`... 257/77
`5,416,342 A 5/1995 Edmond et al.
`... 257/76
`5523,589 A 6/1996 Edmond et al.
`... 257/77
`5,585,648 A 12/1996 Tischler ..........
`25777
`5,604,135 A 2/1997 Edmond et al.
`... 437/22
`5,631,190 A 5/1997 Negley ...........
`... 438/33
`5,718,760 A 2/1998 Carter et al. ....
`... 117/84
`5,739,554 A
`4/1998 Edmond et al. ............ 257/103
`5,760,479 A 6/1998 Yang et al.
`5,767,581 A 6/1998 Nakamura et al. .......... 257/749
`5,777,350 A
`7/1998 Nakamura et al. ..... ... 257/96
`5,779,924. A 7/1998 Krames et al. .....
`... 216/24
`5,846,694. A * 12/1998 Strand et al. ...
`... 430/321
`5,912.477 A 6/1999 Negley ...........
`... 257/95
`5,917.202 A 6/1999 Haitz et al. ..
`... 257/98
`5,952,681 A 9/1999 Chen ..............
`... 257/89
`6,015,719 A
`1/2000 Kish, Jr. et al. .
`... 438/29
`6,031,243 A * 2/2000 Taylor ............
`... 257/98
`6,046,465 A
`4/2000 Wang et al. .
`27
`6,097,041 A 8/2000 Lin et al. ...................... 257/98
`6,118.259 A 9/2000 Bucks et al. ....
`... 323/312
`6120600 A 9/2000 Edmond et al.
`... 117/89
`6.121636 A 9/2000 Morita et al. ...
`... 257/99
`6,121,637 A 9/2000 Isokawa et al. ............... 257/99
`6,133,589 A 10/2000 Krames et al. ............. 257/103
`6,139,166. A 10/2000 Marshall et al. ............ 362/231
`6,147,458. A 11/2000 Bucks et al............... 325/225
`6,169,294 B1
`1/2001 Bing-Jye et al....... ... 257/79
`6,177,688 B1
`1/2001 Linthicum et al. ..... ... 257/77
`6,187.606 B1
`2/2001 Edmond et al. ....
`... 438/46
`6,194,742 B1
`2/2001 Kern et al. .....
`... 257/94
`6,201,264 B1
`3/2001 Khare et al. ....
`... 257/97
`6,204,523 B1
`3/2001 Carey et al. .................. 257/08
`6,222.207 B1
`4/2001 Carter-Coman et al. ...... 257/98
`6,229,160 B1
`5/2001 Krames et al.
`257/94
`6,455,878 B1
`9/2002 Bhat et al. ..........
`... 257/99
`2003/0006418 A1
`1/2003 Emerson et al. .............. 257/79
`2003/0025212 A1
`2/2003 Bhat et al.
`
`6,091,085 A 7/2000 Lester - - - - - - - - - - - - - - - - - - - - - - - - - 257/98
`
`
`
`FOREIGN PATENT DOCUMENTS
`
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`
`61110476
`1-225377
`06-232510
`O7-235 729
`O8-321660
`9-82587
`O9-223846
`10-1635.30
`1O-233549
`10-256604
`11-1503O2 A
`11-191641
`
`11-22O168 A
`
`2OOO-77713
`2000-195827
`
`5/1986
`9/1989
`8/1994
`9/1995
`12/1996
`3/1997
`8/1997
`6/1998
`9/1998
`9/1998
`6/1999
`7/1999
`8/1999
`3/2000
`7/2000
`
`WO
`WO
`
`WO OO/33365
`WO O1/47039 A1
`
`6/2000
`6/2001
`
`OTHER PUBLICATIONS
`Lambrecht et al., Band Structure Interpretation of the Opti
`cal Transitions Between Low-Lying Conduction Bands in
`n-Type Doped SiC Polytypes, Materials Science Forum,
`vols. 264-268, 1998, pp. 271-274.
`Craford, Overview of Device Issues in High-Brightness
`Light-Emitting Diodes, Chapter 2, High Brightness Light
`Emitting Diodes. Semiconductors and Semimetals, vol. 48,
`Stringfellow et al. ed., Academic Press, 1997, pp. 47–63.
`Yoo et al., Bulk Crystal Growth of 6H SiC On Polytype
`Controlled Substrates Through Vapor Phase and Charac
`terization. J
`1 of Crvstal Growth
`1. 115
`1. 1991
`efigurna OI Urystal Urown, Vol. 115, Vol.
`s
`pp. 133-159.
`Biederman, The Optical Absorption Bands and Their Anisot
`ropy in the Various Modifications of SiC, Solid State Com
`munications, vol. 3, 1965, pp. 343-346.
`U.S. application Ser. No. 09/154.363, entitled Vertical
`Geometry InGaN LED.
`U.S. application Ser. No. 60,411,980, filed Sep. 19, 2002,
`
`Phosphor-Coated Light Emitting Diodes Including Tapered
`
`Sidewalls, and Fabrication Methods.
`U.S. application Ser. No. 10/003,331, filed Oct. 31, 2001,
`Low Temperature Formation of Backside Ohmic Contacts
`for Vertical Devices.
`U.S. application Ser. No. 60/294,445, filed May 30, 2001,
`Multi-Quantum Well Light Emitting Diode Structure.
`U.S. application Ser. No. 60/294,378, filed May 30, 2001,
`Light Emitting Diode Structure With Multi-Quantum Well
`and Superlattice Structure.
`U.S. application Ser. No. 60/294,308, filed May 30, 2001,
`Light Emitting Diode Structure With Superlattice Structure.
`U.S. application Ser. No. 09/787,189, filed Mar. 15, 2001,
`Low Temperature Formation of Backside Ohmic Contacts
`for Vertical Devices.
`Invitation to Pay Additional Fees, Annex to Form PCT/ISA/
`206, Communication Relating to the Results of the Partial
`International Search, PCT/US02/02849, Aug. 26, 2002.
`International Search Report, PCT/US02/02849, Dec. 2,
`2002.
`Mensz et al., In, GANAGAN Violet Light Emitting
`Diodes with Reflective p-Contacts for High Single Sided
`Light Extraction, Electronics Letters, vol. 33, No. 24, Nov.
`20, 1997, pp. 2066–2068.
`Honma et al., Evaluation of Barrier Metals of Solder Bumps
`for Flip-Chip Interconnection, Electronic Manufacturing
`Technology Symposium, 1995, Proceedings of 1995 Japan
`International, 18" IEEE/CPMT, Dec. 4, 1995, pp. 113-116.
`Lee et al., Bonding of InP Laser Diodes by Au-Sin Solder and
`Tungsten-Based Barrier Metallization Schemes, Semicon
`ductor Science and Technology, vol. 9, No. 4, Apr. 1994, pp.
`379-386.
`* cited by examiner
`
`Cree Exhibit 1012
`Page 2
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 1 of 15
`
`US 6,791,119 B2
`
`F.G. 1
`
`15O
`
`40
`130 X 170
`
`110
`
`110a
`
`
`
`Cree Exhibit 1012
`Page 3
`
`

`

`U.S. Patent
`U.S. Patent
`
`Sep. 14, 2004
`Sep. 14, 2004
`
`
`
`Sheet 2 of 15
`Sheet 2 of 15
`
`US 6,791,119 B2
`
`US 6,791,119 B2
`
`Cree Exhibit 1012
`Page 4
`
`Cree Exhibit 1012
`Page 4
`
`

`

`
`
`400
`
`\
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`
`FIG. 5
`
`U.S. Patent
`U.S. Patent
`
`Sep. 14, 2004
`Sep. 14, 2004
`
`Sheet 3 of 15
`Sheet 3 of 15
`
`US 6,791,119 B2
`US 6,791,119 B2
`
`FG. 4
`FIG. 4
`
`110 210
`110c
`
`Cree Exhibit 1012
`Page 5
`
`Cree Exhibit 1012
`Page 5
`
`

`

`U.S. Patent
`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 4 of 15
`
`US 6,791,119 B2
`US 6,791,119 B2
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`Cree Exhibit 1012
`Page 6
`
`Cree Exhibit 1012
`Page 6
`
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 5 of 15
`
`US 6,791,119 B2
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`FG. 7A
`
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`
`722
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`
`71 Oa
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`Cree Exhibit 1012
`Page 7
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 6 of 15
`
`US 6,791,119 B2
`
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`
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`
`Cree Exhibit 1012
`Page 8
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 7 of 15
`
`US 6,791,119 B2
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`
`
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`
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`
`Cree Exhibit 1012
`Page 9
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 8 of 15
`
`US 6,791,119 B2
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`Cree Exhibit 1012
`Page 10
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 9 of 15
`
`US 6,791,119 B2
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`Cree Exhibit 1012
`Page 11
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 10 of 15
`
`US 6,791,119 B2
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`
`Cree Exhibit 1012
`Page 12
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 11 of 15
`
`US 6,791,119 B2
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`
`Cree Exhibit 1012
`Page 13
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 12 of 15
`
`US 6,791,119 B2
`
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`
`Cree Exhibit 1012
`Page 14
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 13 of 15
`
`US 6,791,119 B2
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`Cree Exhibit 1012
`Page 15
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 14 of 15
`
`US 6,791,119 B2
`
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`Cree Exhibit 1012
`Page 16
`
`

`

`U.S. Patent
`
`Sep. 14, 2004
`
`Sheet 15 of 15
`
`US 6,791,119 B2
`
`F.G. 19
`
`LED Manufacturing
`
`
`
`Fabricate diode region on
`Silicon Carbide substrate
`
`Form grooves and/or
`via holes
`
`Form semi-transparent
`electrode and/or reflector
`
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`
`Package
`
`End
`
`1910
`
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`
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`Cree Exhibit 1012
`Page 17
`
`

`

`1
`LIGHT EMITTING DODES INCLUDING
`MODIFICATIONS FOR LIGHT
`EXTRACTION
`
`CROSS-REFERENCE TO PROVISIONAL
`APPLICATIONS
`This application claims the benefit of Provisional Appli
`cation Serial No. 60/265,707, filed Feb. 1, 2001 entitled
`Light Emitting Diode With Optically Transparent Silicon
`Carbide Substrate, and Provisional Application Serial No.
`60/307,235, filed Jul. 23, 2001, entitled Light Emitting
`Diodes Including Modifications for Light Extraction and
`Manufacturing Methods Therefor, the disclosures of both of
`which are hereby incorporated herein by reference in their
`entirety as if set forth fully herein.
`
`15
`
`STATEMENT OF FEDERAL SUPPORT
`This invention was made possible with government Sup
`port under grant number 70NANB8H4022 from the
`National Institute of Standards and Technology (Advanced
`Technology Program). The United States government has
`certain rights to this invention.
`
`FIELD OF THE INVENTION
`
`25
`
`This invention relates to microelectronic devices and
`fabrication methods therefor, and more particularly to light
`emitting diodes (LEDs) and manufacturing methods there
`for.
`
`BACKGROUND OF THE INVENTION
`Light emitting diodes are widely used in consumer and
`commercial applications. AS is well known to those having
`skill in the art, a light emitting diode generally includes a
`diode region on a microelectronic Substrate. The microelec
`tronic Substrate may comprise, for example, gallium
`arsenide, gallium phosphide, alloys thereof, Silicon carbide
`and/or Sapphire. Continued developments in LEDs have
`resulted in highly efficient and mechanically robust light
`Sources that can cover the Visible spectrum and beyond.
`These attributes, coupled with the potentially long Service
`life of Solid State devices, may enable a variety of new
`display applications, and may place LEDs in a position to
`compete with the well entrenched incandescent and fluores
`cent lamps.
`One measure of efficiency of LEDs is the cost per lumen.
`The cost per lumen for an LED may be a function of the
`manufacturing cost per LED chip, the internal quantum
`efficiency of the LED material and the ability to couple or
`extract the generated light out of the device. An Overview of
`light extraction issues may be found in the textbook entitled
`High Brightness Light Emitting Diodes to Stringfellow et al.,
`Academic Press, 1997, and particularly Chapter 2, entitled
`Overview of Device Issues in High-Brightness Light Emit
`ting Diodes, to Craford, at pp. 47–63.
`Light extraction has been accomplished in many ways,
`depending, for example, on the materials that are used to
`fabricate the diode region and the Substrate. For example, in
`gallium arsenide and gallium phosphide material Systems, a
`thick, p-type, topside window layer may be used for light
`extraction. The p-type window layer may be grown because
`high epitaxial growth rates may be possible in the gallium
`arsenide/gallium phosphide material Systems using liquid
`and/or vapor phase epitaxy. Moreover, current Spreading
`may be achieved due to the conductivity of the p-type
`topside window layer. Chemical etching with high etch rates
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`US 6,791,119 B2
`
`2
`and high etch Selectivity also may be used to allow the
`removal of at least some of the substrate if it is optically
`absorbent. Distributed Bragg reflectors also have been
`grown between an absorbing Substrate and the diode region
`to decouple the emitting and absorbing regions.
`Other approaches for light extraction may involve
`mechanical Shaping or texturing of the diode region and/or
`the Substrate. However, it may be desirable to provide other
`light extraction techniques that can allow further improve
`ments in extraction efficiency. Moreover, it may be desirable
`to increase the area of an LED chip from about 0.1 mm to
`larger areas, to thereby provide larger LEDS. Unfortunately,
`the effectiveness of these shaping techniques may not be
`maintained as the chip dimensions are Scaled up for higher
`power/intensity and/or other applications.
`Much development interest and commercial activity
`recently has focused on LEDs that are fabricated in or on
`Silicon carbide, because these LEDS can emit radiation in the
`blue/green portions of the visible spectrum. See, for
`example, U.S. Pat. No. 5,416,342 to Edmond et al., entitled
`Blue Light-Emitting Diode With High External Quantum
`Efficiency, assigned to the assignee of the present
`application, the disclosure of which is hereby incorporated
`herein by reference in its entirety as if set forth fully herein.
`There also has been much interest in LEDs that include
`gallium nitride-based diode regions on Silicon carbide
`Substrates, because these devices also may emit light with
`high efficiency. See, for example, U.S. Pat. No. 6,177,688 to
`Linthicum et al., entitled Pendeoepitaxial Gallium Nitride
`Semiconductor Layers On Silicon Carbide Substrates, the
`disclosure of which is hereby incorporated herein by refer
`ence in its entirety as if set forth fully herein.
`In such silicon carbide LEDs or gallium nitride LEDs on
`Silicon carbide, it may be difficult to use conventional
`techniques for light extraction. For example, it may be
`difficult to use thick p-type window layers because of the
`relatively low growth rate of gallium nitride. Also, although
`such LEDs may benefit from the use of Bragg reflectors
`and/or Substrate removal techniques, it may be difficult to
`fabricate a reflector between the Substrate and the gallium
`nitride diode region and/or to etch away at least part of the
`Silicon carbide Substrate.
`U.S. Pat. No. 4,966,862 to Edmond, entitled Method of
`Production of Light Emitting Diodes, assigned to the
`assignee of the present application, the disclosure of which
`is hereby incorporated herein by reference in its entirety as
`if Set forth fully herein, describes a method for preparing a
`plurality of light emitting diodes on a single Substrate of a
`Semiconductor material. The method is used for Structures
`where the Substrate includes an epitaxial layer of the same
`Semiconductor material that in turn comprises layers of
`p-type and n-type material that define a p-n junction ther
`ebetween. The epitaxial layer and the Substrate are etched in
`a predetermined pattern to define individual diode
`precursors, and deeply enough to form mesas in the epitaxial
`layer that delineate the p-n junctions in each diode precursor
`from one another. The substrate is then grooved from the
`Side of the epitaxial layer and between the mesas to a
`predetermined depth to define Side portions of diode pre
`cursors in the Substrate while retaining enough of the
`Substrate beneath the grooves to maintain its mechanical
`Stability. Ohmic contacts are added to the epitaxial layer and
`to the Substrate and a layer of insulating material is formed
`on the diode precursor. The insulating layer covers the
`portions of the epitaxial layer that are not covered by the
`ohmic contact, any portions of the one Surface of the
`Substrate adjacent the mesas, and the Side portions of the
`
`Cree Exhibit 1012
`Page 18
`
`

`

`3
`Substrate. As a result, the junction and the Side portions of
`the Substrate of each diode are insulated from electrical
`contact other than through the ohmic contacts. When the
`diodes are separated they can be conventionally mounted
`with the junction side down in a conductive epoxy without
`concern that the epoxy will short circuit the resulting diode.
`See the abstract of U.S. Pat. No. 4,966,862.
`U.S. Pat. No. 5,210,051 to Carter, Jr., entitled High
`Eficiency Light Emitting Diodes From Bipolar Gallium
`Nitride, assigned to the assignee of the present application,
`the disclosure of which is hereby incorporated herein by
`reference in its entirety as if set forth fully herein, describes
`a method of growing intrinsic, Substantially undoped single
`crystal gallium nitride with a donor concentration of 7x10'7
`cm or less. The method comprises introducing a source of
`nitrogen into a reaction chamber containing a growth Surface
`while introducing a Source of gallium into the same reaction
`chamber and while directing nitrogen atoms and gallium
`atoms to a growth Surface upon which gallium nitride will
`grow. The method further comprises concurrently maintain
`ing the growth Surface at a temperature high enough to
`provide Sufficient Surface mobility to the gallium and nitro
`gen atoms that Strike the growth Surface to reach and move
`into proper lattice Sites, thereby establishing good
`crystallinity, to establish an effective Sticking coefficient,
`and to thereby grow an epitaxial layer of gallium nitride on
`the growth Surface, but low enough for the partial preSSure
`of nitrogen species in the reaction chamber to approach the
`equilibrium vapor pressure of those nitrogen Species over
`gallium nitride under the other ambient conditions of the
`chamber to thereby minimize the loss of nitrogen from the
`gallium nitride and the nitrogen vacancies in the resulting
`epitaxial layer. See the abstract of U.S. Pat. No. 5,210,051.
`In View of the above discussion, improved light extraction
`techniques may be desirable for LEDs, especially LEDs that
`are fabricated from silicon carbide, that are fabricated from
`gallium nitride on Silicon carbide and/or that have a rela
`tively large area.
`SUMMARY OF THE INVENTION
`Light emitting diodes according to Some embodiments of
`the invention include a Substrate having first and Second
`opposing faces that is transparent to optical radiation in a
`predetermined wavelength range and that is patterned to
`define, in cross-section, a plurality of pedestals that extend
`into the Substrate from the first face towards the second face.
`AS used herein, the term “transparent” refers to an element,
`Such as a Substrate, layer or region that allows Some or all
`optical radiation in a predetermined wavelength range to
`pass therethrough, i.e., not opaque. A diode region on the
`Second face is configured to emit light in the predetermined
`wavelength range, into the Substrate upon application of
`Voltage acroSS the diode region. In other embodiments, a
`mounting Support on the diode region, opposite the Substrate
`is configured to Support the diode region, Such that the light
`that is emitted from the diode region into the Substrate, is
`emitted from the first face upon application of Voltage acroSS
`the diode region. In Some embodiments, the light emitting
`diode on a transparent Substrate with pedestals is flip
`mounted on a mounting Support, with the diode region
`adjacent to the mounting Support and a Substrate opposite
`the mounting Support, for light emission through the Sub
`Strate. In other embodiments, the light emitting diode on a
`transparent Substrate with pedestals is mounted on a mount
`ing Support, with the Substrate adjacent to the mounting
`Support and the diode region opposite the mounting Support.
`Thus, non-flip-chip mounting also may be provided.
`
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`US 6,791,119 B2
`
`4
`In yet other embodiments of the invention, a reflector also
`is provided between the mounting Support and the diode
`region or the Substrate. The reflector may be configured to
`reflect light that is emitted from the diode region back
`through the diode region, through the Substrate and from the
`pedestals, upon application of Voltage across the diode
`region. In other embodiments, a transparent electrode also
`may be provided between the diode region and the reflector.
`In still other embodiments, a solder preform and/or other
`bonding region may be provided between the reflector and
`the mounting Support and/or an optical element Such as a
`window or lens may be provided adjacent the first face
`opposite the diode region. In yet other embodiments, the
`diode region includes a peripheral portion and at least one
`central portion that is enclosed by the peripheral portion, and
`the light emitting diode further comprises at least one
`electrode on the diode region, that is confined to within the
`at least one central portion and does not extend onto the
`peripheral portion. It will be understood that the central
`portion need not be centered on the diode region.
`In other embodiments of the invention, a contact structure
`for the substrate and/or the diode region of an LED includes
`a transparent ohmic region, a reflector, a barrier region and
`a bonding region. The transparent ohmic region provides
`electrical contact and/or current spreading. The reflector
`reflects at least Some incident radiation and also may provide
`current spreading. The barrier region protects the reflector
`and/or the ohmic region. The bonding region bonds the LED
`package to a mounting Support. In Some embodiments, the
`functionality of the transparent ohmic region and the reflec
`tor can be combined in a Single ohmic and reflector region.
`Contact structures according to these embodiments of the
`invention also may be used with conventional Silicon car
`bide LEDs, gallium nitride on silicon carbide LEDs and/or
`other LEDs.
`In still other embodiments of the present invention, the
`first face of the Substrate may include therein at least one
`groove that defines a plurality of pedestals, Such as trian
`gular pedestals, in the Substrate. The grooves may include
`tapered sidewalls and/or a beveled floor. The first and second
`faces of the Substrate may have Square perimeters, and/or the
`first face of the substrate may be textured. The light emitting
`diode may further include a plurality of emission regions
`and/or electrodes on the diode region, a respective one of
`which is confined to within a respective one of the pedestals
`and does not extend beyond the respective one of the
`pedestals.
`In yet other embodiments of the present invention, the
`first face of the Substrate includes therein an array of Via
`holes. The via holes may include tapered Sidewalls and/or a
`floor. The via holes preferably extend only part way through
`the substrate, but in other embodiments they can extend all
`the way through the substrate. The first and second substrate
`faces may have Square perimeters, and/or the first face may
`be textured. The light emitting diodes may further include at
`least one electrode on the diode region that does not overlap
`the array of Via holes.
`The pedestals and/or array of via holes also may be used
`with light emitting diodes that include Silicon carbide or
`non-Silicon carbide Substrates, to allow improved light
`extraction therefrom. Moreover, electrodes as described
`above also may be used with light emitting diodes that
`include a non-Silicon carbide Substrate. For example, when
`the first face of the Substrate has Smaller Surface area than
`the Second face, and the diode region is on the Second face,
`an emission region may be provided on the diode region that
`is confined to within the Smaller Surface area of the first face.
`
`Cree Exhibit 1012
`Page 19
`
`

`

`US 6,791,119 B2
`
`S
`In other embodiments of the present invention, light
`emitting diodes include a compensated, colorless Silicon
`carbide Substrate having first and Second opposing faces and
`a gallium nitride-based diode region on the Second face that
`is configured to emit light into the Substrate upon application
`of Voltage acroSS the diode region. Mounting Supports,
`reflectors, contact Structures, grooves, pedestals, texturing
`and/or confined emission areas/electrodes may be provided
`according to any of the embodiments that were described
`above.
`Accordingly, many of the above-described embodiments
`comprise embodiments of means for extracting from the
`Substrate at least Some of the light that is emitted into the
`Substrate by the diode region. Examples of these means for
`extracting include compensating dopants in the Silicon car
`bide Substrate to provide a colorleSS Silicon carbide
`Substrate, patterning the Substrate to define, in cross-section,
`a plurality of pedestals that extend into the Substrate from the
`first face toward the Second face and/or many of the other
`embodiments that were described above, including mount
`ing Supports, reflectors, contact Structures, grooves,
`pedestals, texturing and/or confined emission areas/
`electrodes.
`Light emitting diodes may be manufactured, according to
`Some embodiments of the invention, by forming a diode
`region that is configured to emit light in a predetermined
`wavelength range on a Second face of a Substrate having first
`and Second opposing faces, and that is transparent to the
`optical radiation in the predetermined wavelength range.
`The Substrate is patterned before, during and/or after form
`ing the diode region to define, in cross-section, a plurality of
`pedestals that extend into the Substrate from the first face
`towards the Second face. In other embodiments, the diode
`region is mounted onto a mounting Substrate that is config
`ured to Support the diode region Such that the light that is
`emitted from the diode region into the Substrate is emitted
`from the first face upon application of Voltage across the
`diode region. The mounting may be preceded by forming a
`reflector on the diode region Such that the reflector is
`configured to reflect light that is emitted from the diode
`region back into the diode region through the Substrate and
`from the first face, upon application of Voltage acroSS the
`diode region. Prior to forming the reflector, a transparent
`ohmic electrode also may be formed on the diode region
`opposite the Substrate. A barrier region and/or an adhesion
`region also may be formed after forming the reflector. In
`other embodiments, a mounting Support is placed adjacent
`the reflector with the barrier region and/or the adhesion
`region therebetween, and the LED is joined to the mounting
`Support. In Still other embodiments, an electrode is formed
`on the diode region that is confined to within the central
`portion thereof and does not extend onto the peripheral
`portion thereof.
`Other method embodiments include forming a plurality of
`interSecting grooves into the first face of the Substrate to
`define the plurality of pedestals, Such as triangular pedestals,
`in the Substrate. The grooves may include tapered Sidewalls
`and/or a beveled floor. The first face of the Substrate also
`may be textured. A plurality of electrodes also may be
`formed on the diode region. In Some embodiments, a respec
`tive one of the electrodes is confined to within a respective
`one of the pedestals and does not extend beyond the respec
`tive one of the pedestals.
`Still other method embodiments according to the present
`invention include reactive ion etching an array of via holes
`in the first face of the substrate. The via holes may include
`tapered sidewalls and/or a floor. The first face also may be
`
`6
`textured. An electrode may be formed on the diode region
`that does not overlap the array of via holes.
`Sawing a plurality of interSecting grooves and/or reactive
`etching an array of Via holes into the first face may be used
`for light emitting diodes that include a Silicon carbide or
`non-Silicon carbide Substrate to allow improved light extrac
`tion therefrom. Moreover, the formation of an emission
`region on the diode region that is confined to within the
`Smaller Surface area of the first face also may be used for
`other conventional light emitting diodes, to allow improved
`light extraction therefrom.
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`BRIEF DESCRIPTION OF THE DRAWINGS
`FIGS. 1-5 are cross-sectional views of light emitting
`diodes according to embodiments of the present invention.
`FIG. 6 graphically illustrates absorption of light versus
`wavelength for Silicon carbide at various doping levels.
`FIG. 7A is a top view and FIGS. 7B and 7C are cross
`sectional views along the line 7B-7B' of FIG. 7A, of light
`emitting diodes according to other embodiments of the
`present invention.
`FIG. 8A is a top view and FIGS. 8B and 8C are cross
`sectional views along the line 8B-8B' of FIG. 8A, of light
`emitting diodes according to other embodiments of the
`present invention.
`FIGS. 9-13 are cross-sectional views of light emitting
`diodes according to yet other embodiments of the present
`invention.
`FIG. 14A a cross-sectional view taken along the lines
`14A-14A of FIG. 14B, which is a bottom view of light
`emitting diodes according to Still other embodiments of the
`present invention.
`FIG. 15A a cross-sectional view taken along the lines
`15A-15A of FIG. 15B, which is a bottom view of light
`emitting diodes according to yet other embodiments of the
`present invention.
`FIGS. 16, 17A and 18 are cross-sectional views of light
`emitting diodes according to Still other embodiments of the
`present invention.
`FIG. 17B is a top view of FIG. 17A accordi

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