United States Patent
`Bobba
`
`(15)
`
`[11] Patent Number:
`
`[45] Date of Patent:
`
`5,063,383 |
`Nov. 5, 1991
`
`[54] SYSTEM AND METHODFORTESTING
`ANALOG TO DIGITAL CONVERTER
`EMBEDDED IN MICROCONTROLLER
`
`[75]
`
`Inventor: Ram S, Bobba, San Jose, Calif.
`
`[73] Assignee: National Semiconductor Corporation,
`Santa Clara, Calif.
`
`[21] Appl. No.: 532,606
`
`[22] Filed:
`
`Jun. 4, 1990
`
`Aint, C15 cocceccssssseseeeseeees HO03M 1/10; GO6F 11/00
`[SU]
`[52] U.S. Cl ceaceeccsccsssscscsesstsseseseeesee 341/120; 371/27;
`324/73.1; 364/571.01; 364/553
`[58] Field of Search... 341/120, 131, 139;
`371/25.1, 27, 24, 26, 15.1, 16.1; 324/73.1;
`364/553, 571.02, 571.07, 571.01, 550
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`4,354,177 10/1982 Sloane .......sssscecsseseeseeeessnerens 341/120
`4,539,683
`9/1985 Hahnetal. ....
`. 341/120
`
`
`4,700,174 10/1987 Sutherlandet al.
`.. 341/120
`...
`4,816,750 3/1989 Van Der Klootetal. ........ 324/73.1
`4,896,282
`1/1990 Orwell 0... eeeseseseseeee 341/120 X
`
`Primary Examiner—A.D. Pellinen
`Assistant Examiner—Sharon D. Logan
`Attorney, Agent, or Firm—Flehr, Hohbach,Test,
`Albritton & Herbert
`
`[57]
`
`ABSTRACT
`
`A tester system tests the transfer characteristics and
`operability of an analog to digital converter (ADC)
`embedded in a microprocessor. The tester generates a
`sequence of analog signal test values, and prompts the
`microprocessor to read and convert each test value.
`The microprocessorsets up a table in its internal mem-
`ory, the table having onetally value for every possible
`code output by the embedded ADC. After the embed-
`ded ADCconverts each test value, the microprocessor
`reads the digital value output by the embedded ADC
`and increments a correspondingtally valuein its inter-
`nally stored table. When the sequence of tests is com-
`pleted, the microprocessor transmits the entire table of
`tally values to the tester. The tester then performs a
`well knownset of calculations on the tally data to deter-
`mine the transfer characteristics and operability of the
`embedded ADC.By performingall tally operations in
`the microprocessor undertest, the test sequence can be
`performed much more quickly than if each converted
`value were separately transmitted by the microproces-
`sor to the tester. In addition, the tallying operation of
`the microprocessor simulates normal operation of the
`microprocessor while performing analog to digital con-
`versions, and thus the embedded ADCis subjected to
`electromagnetic noise characteristic of the micro-
`processor under normal operation.
`
`16 Claims, 2 Drawing Sheets
`
`
`
`
`100
`
`110 DEVICE UNDER
`
`
`
`.BUFFER—
` D0-D7
`
`INT
`
`TEST:
`MICROCONTROLLER
`WITH EMBEDDED
`A/D CONVERTER
`
`1
`
`APPLE 1030
`
`1
`
`APPLE 1030
`
`

`

`U.S. Patent
`
`Nov. 5, 1991
`
`Sheet 1 of 2
`
`5,063,383
`
`100
`
`110
`
`pt|TEST:
`
`DEVICE UNDER
`
`4 —_—
`
`MICROCONTROLLER
`WITH EMBEDDED
`
` E
`
`ADC
`U
`AL ram||misc
`
`ADR REG
`158
`
`154 ~142 156120 122
`
`
`
`
`
`
`140
`
`140
`
`FIGURE2
`
`5.0V
`
`
`
`TESTVOLTAGE
`
`0.0V TIME
`
`1.22 mV
`
`FIGURE3
`
`BUFFER
`
`FIGURE 1
`
`INTRPT
`
`INSTR
`
`DECODER
`146
`
`TIMERS
`148
`
`VO
`
`PORTS WATCHDOG |
`150
`152
`
`
`
`
`
`
`
`2
`
`

`

`U.S. Patent
`
`Noy. 5, 1991
`
`Sheet 2 of 2
`
`5,063,383
`
`
`
`TESTER:
`
`200 4 !
`
`q
`
`START TEST
`
`|
`
`202
`
`SET OUTPUT VOLTAGE =
`
`
`
`DEVICE UNDERTEST:
`
`
`
` DEFINE TALLY
`TABLE, AND -
`CLEAR TALLIES
`
`
`
`(24*count,
`|
`222
`
`204 1
`|
`r
`
`206 I
`ly
`
`
`
`
`OUTPUT INTERRUPT
`SIGNAL TEN TIMES
`
`INTERRUPT
`
`INCREMENT
`
`COUNT
`
`208
`
`Vy
`
`BEGIN
`PERFORMING A/D
`CONVERSION
`
`224
` INCREMENT
`
`TALLY(INDEX
`
`
`FROM PRIOR A/D
`
`
`
`CONVERSION) 226
`230
`
`IMPORT TALLIES
`FROM DEVICE
`UNDER TEST
`
`TRANSMIT
`TALLIES
`TO TESTER
`
`WAIT FOR A/D
`CONVERSION
`TO COMPLETE
`---> INDEX
`
`FIGURE5
`
`3
`
`

`

`1
`
`5,063,383
`
`SYSTEM AND METHOD FOR TESTING ANALOG
`TO DIGITAL CONVERTER EMBEDDEDIN
`MICROCONTROLLER
`
`The present invention relates generally to testing
`complex semiconductor circuits, and particularly to
`methods and systemsfor testing the accuracy and lin-
`earity of an analogto digital converter which is embed-
`ded in a microcontroller or microprocessor.
`BACKGROUND OF THE INVENTION
`
`10
`
`A number of microcontroller and microprocessor
`products now include an embedded analog to digital
`converter (ADC). This meansthat there is an ADC on
`the same semiconductor chip as the rest of the mi-
`crocontroller’s circuitry. For example, the COP888CF
`single chip CMOScontroller made by National Semi-
`conductor has an embedded ADC.In fact, that particu-
`lar microcontroller has eight ADC channels (i.e., eight
`separate analog signal input connections). The develop-
`ment of such microcontrollers is a continuation of the
`trend toward putting all the circuitry needed for a pro-
`grammable controller onto a single chip.
`While complex semiconductor circuits with embed-
`ded circuits are convenient when building a product
`that needs a simple controller, such as a microwave
`oven controller, the presence of such embeddedcircuits
`makes it difficult to fully test the operation of the cir-
`cuit.
`Previous methods of testing embedded ADCs on
`digital VLSI test systems perform one conversion at a
`time. In other words, one analog signal is sent to the
`device under test, and the converted digital value is
`then read by the tester. The device under test is pro-
`grammed to perform a conversion and then send the
`results of the conversion to the tester. Testing each
`possible output code of the ADC typically requires
`dozens of conversion and read sequences. Since the
`numberof conversions typically used to test an eight bit
`ADCis in the range of 20,000 to 200,000,this testing
`method is very slow.
`Another major disadvantage of the prior art methods
`of testing embedded ADCsis that the testing conditions
`do not match normal operating conditions. More specif-
`ically, when an embedded ADCis used in an actual
`application,
`the microcontroller will be performing
`manyother operations, including computations, reading
`and writing data to and from registers and memory, and
`so on, all of which generate electromagnetic noisein the
`microcontroller. Standard prior art testing methods do
`not create the electromagnetic noise which is encoun-
`tered during normal microcontroller operation.
`SUMMARYOF THE INVENTION
`
`In summary, the present invention is a tester system
`and method for testing the transfer characteristics and
`operability of an analog to digital converter (ADC)
`embedded in a microprocessor. The tester generates a
`sequence of analog signal test values, and prompts the
`microprocessor to read and convert each test value.
`The microprocessorsets up a table in its internal mem-
`ory, the table having onetally value for every possible
`code output by the embedded ADC. After the embed-
`ded ADC converts eachtest value, the microprocessor
`reads the digital value output by the embedded ADC
`and increments a correspondingtally value in its inter-
`nally stored table. When the sequence of tests is com-
`
`25
`
`30
`
`40
`
`45
`
`55
`
`60
`
`2
`pleted, the microprocessor transmits the entire table of
`tally values to the tester. The tester then performsa set
`of calculations on the tally data to determine the trans-
`fer characteristics and operability of the embedded
`ADC.
`tally operations in the micro-
`By performing all
`the test sequence can be per-
`processor under test,
`formed much more quickly than if each converted
`value were separately transmitted by the microproces-
`sor to the tester. In addition, the tallying operation of
`the microprocessor simulates normal operation of the
`microprocessor while performing analog to digital con-
`versions, and thus the embedded ADCis subjected to
`electromagnetic noise characteristic of the micro-
`processor under normal operation.
`Another important advantage of the present inven-
`tion is that it enables an embedded ADCto betested
`using a relatively inexpensive tester. In particular, the
`test equipmentofthe present invention does not need to
`perform measurements “on the fly’—all it needs is an
`accurate digital to analog converter for generating test
`voltages, plus a CPU with a few standard interface
`circuits for sending digital messages to and from the
`device undertest.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`Additional objects and features of the invention will
`be more readily apparent from the following detailed
`description and appended claims when taken in con-
`junction with the drawings, in which:
`FIG. 1 is a block diagram of a test apparatus for
`testing an analog to digital converter embedded in a
`microprocessor.
`FIG. 2 is a block diagram of the circuits in a typical
`microcontroller having an embedded ADC.
`FIG.3 depicts a sequence of analog test signals used
`in a preferred embodiment.
`FIG. 4 is a block diagram ofa table of tally values
`stored in the random access memory of a microcon-
`troller being tested.
`FIG.5 is a flow chart of a testing method in accor-
`dance with the present invention.
`DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`
`The terms “microcontroller” and “microprocessor”
`are used interchangeably herein, both terms being used
`to refer to single chip data processing circuits. A mi-
`crocontroller or microprocessor which has an “embed-
`ded ADC”is one with an analog to digital converter
`circuit on the same chip as the microcontroller or mi-
`croprocessor’s other circuitry.
`Each digital value output by an analog to digital
`converter (ADC)is herein called a “code” or “output
`code”. An eight bit ADC can output 256 distinct output
`codes, while a ten bit ADC can output 1024 distinct
`output codes.
`Referring to FIGS. 1 and 2, the test apparatus 100 in
`the preferred embodiment includes a data processing
`unit 102, including test control software 104, a digital to
`analog converter (DAC) 106 with sixteen bit resolution,
`and a buffer 108 for transmitting data values received by
`the test apparatus to the data processing unit 102.
`The device undertest is a microprocessor 110 having
`an embedded analog to digital converter (ADC) 120,
`herein called the embedded ADC. The embedded ADC
`120 typically has a resolution of eight or ten bits (ie.,
`256 distinct output values or 1024 distinct output val-
`
`4
`
`

`

`5,063,383
`4
`.
`3
`ADCis equal to thirty-one (ie., IF hex), then entry
`ues). For the purposes of the explaining the invention,it
`is assumed that the embedded ADC 120 has a resolution
`thirty-one in the table 170 is incremented.
`To generate a meaningfulset oftally values, the tester
`of eight bits.
`Most microcontrollers have the ability to execute
`100 prompts the embedded ADC 120 to performalarge
`instructions stored externally to the microcontroller
`number of conversions while the input test voltage is
`110, in addition to software stored in an internal ROM
`within the voltage range corresponding to each distinct
`122. The test system in the preferred embodiment in-
`output code. For instance, in the preferred embodiment,
`cludes a memory 130 external to the microcontroller
`the tester software 104 is set up to initiate 160 ADC
`which includes software 132-136 which is used while
`conversions for each ADC output code. Thus, at the
`testing the embedded ADC 120. In particular, exter-
`end of the test all the entries in the tally table 170 (ex-
`nally stored software 132 is used to initialize the mi-
`cept for possibly the first and last entries) for a perfect
`crocontroller’s internal random access memory (RAM)
`ADC 120 would be equal to 160.
`FIG.5 is a flow chart of the test software 104 in the
`140 by defining a table of values that will be described
`in more detail below with reference to FIGS. 4 and 5.
`tester 100 and the microcontroller’s software 132-136
`Software 134 accumulates and stores data in the RAM
`which is used while testing the embedded ADC 120.
`140 while the embedded ADC 120is tested with a se-
`Thetester initiates the beginning of the test by sending
`quence oftest values. Software 136 transmits the result-
`a first signal to the microcontroller and setting an inter-
`ing table of values to the tester’s data processing unit
`nal counter (COUNT) to zero (step 200). The mi-
`102 at the conclusion of the test sequence.
`crocontroller 110 responds by defining and clearing a
`The internal circuits of the microcontroller 110 gen-
`tally table 170 in its internal RAM 120atally table 170
`erate noise which may or may notaffect the operation
`(step 220).
`of the ADC 120. FIG. 2 shows some of the common
`Next (step 202), the tester sets the output voltage to
`circuits found in most such microcontrollers, including
`be generated in accordance with the following formula:
`an internal random access memory 140, arithmetic logic
`unit (ALU) 142, interrupt processing circuit 144,
`in-
`struction decoder 146,
`timers 148, input/output port
`circuits 150, a watchdog circuit 152, register logic 154,
`program counter and address register circuits 156, and
`other miscellaneous circuitry 158. The present inven-
`tion exercises at least some of these internal circuits
`while testing the operation of the ADC 120, thereby
`subjecting the ADC 120 to electromagnetic noise char-
`actenistic of the microcontroller 110 under normal oper-
`ation.
`In the preferred embodiment, the tester’s DAC 106
`has a resolution of sixteen bits while the embedded
`ADC120 being tested has a resolution of only eightbits.
`Referring to FIG. 3, this enables the tester 100 to gener-
`ate test voltages which take the form ofa staircase of
`increasing voltage values within the nominal voltage
`range corresponding to each output code of the embed-
`ded ADC 120. For example, if the voltage range for a
`particular output code (e.g., output code 1) is 19.53
`millivolts to 39.06 millivolts, the tester 100 will generate
`Morespecifically, in response to each interruptsig-
`a staircase of N distinct test voltages within that range
`nal, the embedded ADC 120 begins to perform an ana-
`while testing the embedded ADC 120, where N is a
`log to digital conversion of the test voltage. However,
`positive integer such as eight or sixteen.
`it takes about a dozen of the microcontroller’s CPU
`In the preferred embodiment, the tester 100 outputs
`cycles for the conversion to be completed. During this
`sixteen voltage steps within the range assigned to each
`time, the output code from the previous analog to digi-
`distinct output code of the embedded ADC 120. Foran
`tal conversionis used as an index into the tally table 170,
`eight bit ADC 120 operating in a circuit with a maxi-
`and this indexed entry in the table is then incremented
`mum voltage swing of five volts, each distinct output
`(step 224). Then the microcontroller waits for the cur-
`code corresponds to a voltage range of about 19.53
`rent analog to digital conversion to complete (step 226),
`millivolts (ie., 5 volts divided by 256). To provide a
`thereby generating the output code (or index) to be used
`staircase of test voltages with sixteen steps per output
`for tallying during the next test cycle. Finally, the mi-
`code, the tester generates test voltages which increase
`crocontroller waits for the next interrupt signal from
`by about 1.22 millivolts per step, as shown in FIG.3.
`the tester (step 230). Thus the process of performing an
`Referring to FIG. 4, a table 170 of “tally values” is
`stored in a table inside the microcontroller’s RAM 120.
`analog to digital conversion using the embedded ADC
`is overlapped with the tallying operation using the re-
`Tallying works as follows. For an eight bit ADC there
`sults of the prior analog to digital conversion.
`are 256 distinct output codes. Therefore, for this ADC
`After the tester has output ten interrupt signals (box
`120 the test software will defineatally table 170 having
`204) for the current test voltage, it increments its inter-
`256 entries 172 for storing tally values, with values of
`nal counter COUNT (box 206) and tests to see if the
`zeroinitially stored in every entry. Then, every time the
`counteris equal to a predefined maximum value which
`ADC 120 performs a conversion, an entry correspond-
`correspondsto thelast test voltage (box 208), which in
`ing to the output code generated by the ADCisincre-
`this example would be a value of 4096. If the value of
`mented. In other words, if the output code from the
`
`where 5 volts is the fully voltage range in which the
`ADC120is being tested, 4096 is the numberof voltage
`steps being used, COUNT denotes the current voltage
`step being generated.
`;
`Oncethe test voltage has been set up, ten interrupt
`signals are sent to the microcontroller 110 (step 204) so
`as to prompt the embedded ADC 120 to convert the test
`voltage ten times The microcontroller and its embedded
`ADC120 respond to each interrupt signal by perform-
`ing an ADC conversion, thereby generating an output
`code, which serves as an index into the tally table 170.
`The indexed entry in the table (iec., the tally for the
`output code generated by the embedded ADC 120)is
`then incremented.
`
`TEST VOLTAGE = (
`
`5 Volts
`
`4096
`
`* COUNT )
`
`30
`
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`
`40
`
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`
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`

`5,063,383
`
`5
`COUNT has not yet reached this value, the cycle (steps
`202 through 206) repeats for the next test voltage.
`Whenall the tests have been completed, the entries of
`the tally table 170 will indicate the numberof timesthat
`each output code was generated. At this point in thetest
`procedure the tester imports the transmitted table (box
`210) and then runsa standard routine for evaluating the
`tally data (box 212) to determine whether the embedded
`ADCissufficiently linear to be commercially accept-
`able. For a reasonably linear and operational embedded
`ADC120,thetallies will all be reasonably close to the
`target value of 160.
`ALTERNATE EMBODIMENTS
`
`It should be noted that in other embodiments of the
`invention, the embedded ADC could be a device for
`measuring currents rather than voltages. Furthermore,
`some prior art tallying methods for testing analog to
`digital converters use various methods for weighting
`the contributions of each test conversionto thetally for
`each code. To incorporate such weighted tally tech-
`niques into the present, one would need only to change
`step 224 for incrementing a selected tally to the modi-
`fied step of “adding a weighted value to a selected
`tally” with the weighted value being computed in ac-
`cordance with a specified formula or algorithm.
`Another variation of the above described testing
`methodis required for microcontrollers having a RAM
`140 which is too small to hold the entire table 170 re-
`quired for tallying. For example, if the RAM can only
`hold 128 values (i.e., the RAM 140 has 128 bytes) but
`there are 256 distinct output codes, the following test
`sequence could beused.First, the tester would generate
`tests (i.e., test voltages and interruptsignals) for thefirst
`125 test voltages. Then the first 120 entries of thetally
`table would be transmitted to the tester and the remain-
`ing entries would be shifter to the beginning of the table
`170. Then the tests for the next 120 test voltages (for
`output codes 125 through 244) would be generated,
`followed by transmission ofthe tallies for output codes
`120 through 239 to the tester and shifting the remaining
`entries (starting at the entry for code 240) of the table to
`its beginning. Finally, tests for the last sixteen test volt-
`ages would be run and the remainderofthe tally table
`sent to the tester.
`As will be appreciated by those skilled in the art,
`there are a number ofother techniques which could be
`used to handle small internal RAMs140. For instance,
`one could run the tests for output codes 0 through 130
`(but performingnotallying for output codesin excess of
`127) and export the first half of the table. Then one
`could clear the table and run the tests for output codes
`125 through 256 (while ignoring output codes below
`128) and then export the second half ofthe table to the
`tester. This second technique requires less transmissions
`from the microcontroller to the tester, but requires
`running tests on a few output codes twice.
`While the present invention has been described with
`reference to a few specific embodiments, the descrip-
`tion is illustrative of the invention and is not to be con-
`strued as limiting the invention. Various modifications
`mayoccurto those skilled in the art without departing
`from thetrue spirit and scopeof the invention as defined
`by the appended claims.
`Whatis claimedis:
`1. A method oftesting an analog to digital converter
`(ADC) embedded in a microprocessor, said embedded
`ADCgenerating a predefined numberofdistinct, digital
`
`6
`output values. when converting input analog signals,
`said microprocessor having a random access memory
`embeddedin said microprocessor for storing data val-
`ues and program means coupled to said microprocessor
`for storing software which controls the operation of
`said microprocessor, the steps of the method compris-
`ing:
`storing in said microprocessor’s program meana data
`tallying control program;
`generating a sequence of analog test signals within a
`predefined range and transmitting said analog test
`signals to said embedded ADC;
`said embedded ADC converting each said analogtest
`signal and generating a digital output value,
`said microprocessor, under control of said data tally-
`ing control program,tallying said digital output
`values generated by said embedded ADCandstor-
`ing correspondingtally values in said microproces-
`sor’s embedded random access memory; and
`after said sequence of analog test signals has been
`transmitted and converted, transmitting said tally
`values stored in said embedded random access
`memory in said microprocessor to a tester, and
`then evaluating said tally values in said tester.
`2. The method of testing an analog to digital con-
`verter (ADC) embedded in a microprocessor set forth
`in claim 1, wherein said generating step generates ana-
`log voltage test signals within a predefined range and
`said embedded ADC converts analog voltage signals
`into digital values.
`3. The method of testing an analog to digital con-
`verter (ADC) embeddedin a microprocessor set forth
`in claim 1, wherein said generating step generates ana-
`log current test signals within a predefined range and
`said embedded ADC converts analog current signals
`into digital values.
`4. The method of testing an analog to digital con-
`verter (ADC) embedded in a microprocessor set forth
`in claim 1, wherein
`said embedded random access memorycanstore tally
`values corresponding to a predefined maximum
`number X of distinct digital output values gener-
`ated by said embedded ADC;
`said embedded ADC is capable of generating more
`distinct digital output values than X;
`said method including the step of repeating said gen-
`erating, converting, storing and accumulating, and
`transmitting steps for plurality of different signal
`ranges; said plurality of different signal ranges to-
`gether corresponding to all distinct digital output
`values which can be generated by said embedded
`ADC.
`5. The method of testing an analog to digital con-
`verter (ADC) embedded in a microprocessor, said em-
`bedded ADCgenerating. a predefined number of dis-
`tinct, digital output values when converting input ana-
`log signals, said microprocessor having a random access
`memory embedded in said microprocessor for storing
`data values and program means coupled to said micro-
`processorfor storing software which controls the oper-
`ation of said microprocessor, the steps of the method
`comprising:
`storing in said microprocessor’s program mean a data
`tallying control program;
`said microprocessor, under the control of said data
`tallying contro! program, defining in said embed-
`ded random access memoryin said microprocessor
`a table havingtally entries for storing a multiplicity
`
`_ 0
`
`_ 3
`
`wy0
`
`25
`
`40
`
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`
`60
`
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`
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`

`—0
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`
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`
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`
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`5,063,383
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`7
`oftally values, each said tally entry in said table
`corresponding to a distinct, digital output value
`generated by said embedded ADC;
`generating a sequence of analogtest signals within a
`predefined range and transmitting said analog test
`signals to said embedded ADC;
`said embedded ADC converting each said analog test
`signal and generating a digital output value;
`said microprocessor, under controlof said data tally-
`ing control program, incrementing said tally value
`stored in said table entry corresponding to said
`digital output value generated by said embedded
`ADC;and
`after said sequence of analog test signals has been
`transmitted and converted, transmitting said table
`of tally values stored in said embedded random
`access memory of said microprocessor to a tester,
`and then evaluating said tally values in said tester;
`whereby tally values are accumulated in random
`access memory embedded in said microprocessor,
`whichenables fast testing of the embedded ADC.
`6. The method of testing an analog to digital con-
`verter (ADC) embedded in a microprocessor set forth
`in claim 5, wherein said generating step generates ana-
`log voltage test signals within a predefined range and
`said embedded ADC converts analog voltage signals
`into digital values.
`7. The method oftesting an analog to digital con-
`verter (ADC) embedded in a microprocessor set forth
`in claim 5, wherein said generating step generates ana-
`log current test signals within a predefined range and
`said embedded ADC converts analog current signals
`into digital values.
`8. The method of testing an analog to digital con-
`verter (ADC) embedded in a microprocessor set forth
`in claim 5, wherein
`said random access memory canstore entries corre-
`sponding to a predefined maximum number X of
`distinct digital output values generated by said
`embedded ADC;
`said embedded ADCis capable of generating more
`distinct digital output values than X;
`said method including the step of repeating said gen-
`erating, converting, incrementing, and transmitting
`steps for plurality of different signal ranges; said
`plurality of different signal ranges together corre-
`spondingtoall distinct digital output values which
`can be generated by said embedded ADC.
`9. Test apparatus for testing an analog to digital con-
`verter (ADC) embedded in a microprocessor, said em-
`bedded ADC generating a predefined number ofdis-
`tinct, digital output values when converting input ana-
`log signals, said microprocessor having a random access
`memoryforstoring data values, the test apparatus com-
`prising:
`a data processing unit coupled to an analog signal
`generator, said data processing unit and analog
`signal generator generating a sequence of analog
`test signals within a predefined range and transmit-
`ting said analog test signals to an embedded ADC
`in a microprocessor; said data processing unit and
`analog signal generator including means for gener-
`ating a prompting signal which causes said embed-
`ded ADCto convert each said analog test signal
`into a digital output value; and
`program means coupled to said microprocessor for
`directing said microprocessor to store and accumu-
`late in said random access memory in said micro-
`
`8
`processor data correspondingto said digital output
`values output by said embedded ADC;
`said program meansincluding software for directing
`said microprocessor to transmit said data stored in
`said random access memoryin said microprocessor
`to said data processing unit after said sequence of
`analog test signals has been converted by said em-
`bedded ADC;
`said data processing unit including software for eval-
`uating said data accumulated and stored in said
`microprocessor and transmitted by said micro-
`processor to said data processing unit;
`wherebydata resulting from testing of said embedded
`ADCis accumulated in random access memory in
`said microprocessor, which enables fast testing of
`the embedded ADC.
`10. The test apparatus set forth in claim 9, wherein
`said analog signal generator generates analog voltage
`test signals within a predefined range and said embed-
`ded ADC converts analog voltage signals into digital
`values.
`11. The test apparatus set forth in claim 9, wherein
`said analog signal generator generates analog current
`test signals within a predefined range and said embed-
`ded ADC converts analog current signals into digital
`values.
`12. The test apparatus set forth in claim 9, wherein
`said random access memory can store data corre-
`sponding to a predefined maximum number X of
`distinct digital output values generated by said
`embedded ADC;
`said embedded ADCis capable of generating more
`distinct digital output values than X;
`said data processing unit and analog signal generator
`generating a plurality of analog test signals sequen-
`ces within a plurality of predefined signal ranges;
`program means including means for directing said
`microprocessor to store and accumulate in said
`random access memory in said microprocessor
`data corresponding to digital output values output
`by said embedded ADCin response to each said
`sequence ofanalog test signals and to transmit at
`least a portion of said data corresponding to each
`said sequence of analog test signals to said data
`processing unit after each said sequence of analog
`test signals has been converted by said embedded
`ADC;
`said plurality of different signal ranges together cor-
`responding to all distinct digital output values
`which can be generated by said embedded ADC.
`13. Test apparatus for testing an analog to digital
`converter (ADC) embedded in a microprocessor, said
`embedded ADC generating a predefined number of
`distinct, digital output values when converting input
`analog signals, said microprocessor having a random
`access memoryfor storing data values, the test appara-
`tus comprising:
`a data processing unit coupled to an analog signal
`generator, said data processing unit and analog
`signal generator generating a sequence of analog
`test signals within a predefined range and transmit-
`ting said analog test signals to an embedded ADC
`in a microprocessor; said data processing unit and
`analog signal generator including means for gener-
`ating a prompting signal which causes said embed-
`ded ADC to convert each said analog test signal
`into a digital output value; and
`
`50
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`55
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`65
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`9
`program means coupled to said microprocessor for
`defining in said random access memory in said
`microprocessora table having entries for storing a
`multiplicity of tally values, each said entry in said
`table corresponding to a distinct, digital output
`value generated by said embedded ADC;
`said program means directing said microprocessor to
`incrementsaid tally value stored in said table entry
`corresponding to each said digital output value
`generated by said embedded ADC;
`said program means further including software for
`directing said microprocessor to transmit said tally
`values stored in said random access memoryin said
`microprocessor to said data processing unit after
`said sequence of analog test signals has been con-
`verted by said embedded ADC;
`said data processing unit including software for eval-
`uating said data accumulated and stored in said
`microprocessor and transmitted by said micro-
`processor to said data processing unit;
`wherebysaid tally values are accumulated in random
`access memory in said microprocessor, which ena-
`bles fast testing of the embedded ADC.
`14. The test apparatus set forth in claim 13, wherein
`said analog signal generator generates analog voltage
`test signals within a predefined range and said embed-
`ded ADC converts analog voltage signals into digital
`values.
`
`10
`15. The test apparatus set forth in claim 13, wherein
`said analog signal generator generates analog current
`test signals within a predefined range and said embed-
`ded ADC converts analog current signals into digital
`values.
`16. The test apparatus set forth in claim 13, wherein
`said random access memory can store entries corre-
`sponding to a predefined maximum number X of
`distinct digital output values generated by said
`embedded ADC;
`said embedded ADCis capable of generating more
`distinct digital output values than X;
`said data processing unit and analog signal generator
`generating a plurality of analog test signals sequen-
`ces within a plurality of predefined signal ranges;
`said program means including means for directing
`said microprocessor to increment in said random
`access memory tally values stored in said table
`entries in response to each said sequence of analog
`test signals and to transmit at least a portion ofsaid
`table entries corresponding to each said sequence
`of analog test signals to said data processing unit
`after each said sequence of analog test signals has
`been converted by said embedded ADC;
`said plurality of different signal ranges together cor-
`responding to all distinct digital output values
`which can be generated by said embedded ADC.
`*
`x
`«x
`x
`x
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`5,063,383
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`35
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