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`
`Juanita R. Brooks, SBN 75934, brooks@fr.com
`Seth M. Sproul, SBN 217711, sproul@fr.com
`Frank Albert, SBN 247741, albert@fr.com
`Joanna M. Fuller, SBN 266406, jfuller@fr.com
`Robert M. Yeh, SBN 286018, ryeh@fr.com
`Fish & Richardson P.C.
`12390 El Camino Real
`San Diego, CA 92130
`Phone: 858-678-5070 / Fax: 858-678-5099
`
`Ruffin B. Cordell, DC Bar No. 445801, appearing pro hac vice, cordell@fr.com
`Lauren A. Degnan, DC Bar No. 452421, appearing pro hac vice, degnan@fr.com
`Fish & Richardson P.C.
`1000 Maine Avenue, S.W. Suite 1000
`Washington, D.C. 20024
`Phone: 202-783-5070 / Fax: 202-783-2331
`
`Mark D. Selwyn (SBN 244180), mark.selwyn@wilmerhale.com
`Wilmer Cutler Pickering Hale and Dorr LLP
`950 Page Mill Road
`Palo Alto, CA 94304
`Phone: 650-858-6000 / Fax: 650-858-6100
`
`Attorneys for Defendant/Counterclaim-Plaintiff Apple Inc.
`
`[Additional counsel identified on signature page.]
`UNITED STATES DISTRICT COURT
`SOUTHERN DISTRICT OF CALIFORNIA
`Case No. 3:17-CV-1375-DMS-MDD
`QUALCOMM INCORPORATED,
`
`
`
`v.
`
`APPLE INC.,
`
`Plaintiff,
`
`Defendant.
`
`AND RELATED COUNTERCLAIMS.
`
`DEFENDANT AND COUNTERCLAIM
`PLAINTIFF APPLE INC.’S OPENING
`CLAIM CONSTRUCTION BRIEF
`
`September 5, 2018
`Date:
`9:00 a.m.
`Time:
`Courtroom 13A
`Place:
`Judge: Hon. Dana M. Sabraw
`
`Case No. 3:17-CV-1375-DMS-MDD
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`Qualcomm, Ex. 1015, Page 1
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`Case 3:17-cv-01375-DMS-MDD Document 296 Filed 08/08/18 PageID.9854 Page 2 of 33
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`
`TABLE OF CONTENTS
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`
`INTRODUCTION ..................................................................................................... 1
`I.
`LEGAL STANDARDS FOR CLAIM CONSTRUCTION ................................ 1
`II.
`III. U.S. PATENT NOS. 7,355,905; 7,760,559; AND 8,098,534 ............................... 2
`A.
`“integrated circuit” (’905 patent, claim 1; ’559 patent,
`claims 1, 2, 3; ’534 patent, claims 1, 3, 4) ...................................................... 3
`“received on a first / second input to the integrated
`circuit” (’905 patent, claim 1); “receiving power from at
`least one first / second input to the integrated circuit”
`(’559 patent, claim 1) ........................................................................................ 4
`“during use” (’905 patent, claim 1; ’559 patent, claims 1, 2;
`’534 patent, claim 1) ......................................................................................... 6
`IV. U.S. PATENT NOS. 7,383,453 AND 8,433,940 ................................................... 7
`A.
`“core” and “area” (’453 patent, claims 1, 2, 4) ............................................ 8
`B.
`“sufficient to maintain the state information of the
`instruction-processing circuitry” (’453 patent, claims 1, 2,
`4) ...................................................................................................................... 11
`“power area” (’940 patent, claims 9, 11) .................................................... 14
`C.
`“real-time clock” (’940 patent, claims 9, 11) ............................................. 15
`D.
`U.S. PATENT NOS. 8,271,812; 8,443,216; AND 8,656,196 ............................ 16
`A.
`“performance domain” (’812 patent, claim 8; ’216 patent,
`claim 1; ’196 patent, claims 1, 2, 3) ............................................................. 17
`“power management unit” (’812 patent, claim 8; ’216
`patent, claims 1, 2; ’196 patent, claim 1) .................................................... 19
`“establish a . . . performance state” (’812 patent, claim 8;
`’216 patent, claim 1; ’196 patent, claim 1) ................................................. 22
`“a prior performance state at which the processor was
`operating prior to entering the sleep state” (’812 patent,
`claim 8) ............................................................................................................ 23
`VI. CONCLUSION ........................................................................................................ 25
`
`
`
`B.
`
`C.
`
`V.
`
`B.
`
`C.
`
`D.
`
`
`
`i
`
` Case No. 3:17-CV-01375-JAH-MDD
`
`Qualcomm, Ex. 1015, Page 2
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`Case 3:17-cv-01375-DMS-MDD Document 296 Filed 08/08/18 PageID.9855 Page 3 of 33
`
`
`TABLE OF AUTHORITIES
`
` Page(s)
`
`Cases
`
`Accent Packaging, Inc. v. Leggett & Platt, Inc.,
`707 F.3d 1318, 1325–26 (Fed. Cir. 2013) ........................................................................ 18
`
`Action Star Enter. Co. v. KaiJet Tech. Int’l Ltd.,
`No. CV-1208074-BRO-MRX, 2014 WL 12595331 (C.D. Cal. Jan. 27,
`2014) ...................................................................................................................................... 15
`
`AIA Eng’g Ltd. v. Magotteaux Int’l S/A,
`657 F.3d 1264 (Fed. Cir. 2011) .......................................................................................... 13
`
`Biosig Instruments, Inc. v. Nautilus, Inc.,
`783 F.3d 1374 (Fed. Cir. 2015) ............................................................................................ 2
`
`Cadence Pharm., Inc. v. Exela PharmSci Inc.,
`780 F.3d 1364 (Fed. Cir. 2015) .......................................................................................... 16
`
`Cal. Inst. of Tech. v. Hughes Commc’ns Inc.,
`35 F. Supp. 3d 1176 (C.D. Cal. 2014) ............................................................................... 10
`
`Carl Zeiss Vision Int’l GMBH v. Signet Armorlite, Inc.,
`No. 07-cv-0894 DMS (POR), 2008 WL 4951984 (S.D. Cal. June 2,
`2008) (Sabraw, J.) ................................................................................................................. 20
`
`CytoLogix Corp. v. Ventana Med. Sys., Inc.,
`424 F.3d 1168 (Fed. Cir. 2005) .......................................................................................... 24
`
`dunnhumby USA, LLC v. emnos USA Corp.,
`No. 13-CV-0399, 2015 WL 1542365 (N.D. Ill. Apr. 1, 2015) ..................................... 10
`
`Enthone Inc. v. BASF Corp.,
`No. 1:15-CV-0233-TJM-DEP, 2016 WL 6679493 (N.D.N.Y. June 17,
`2016), report and recommendation adopted, No. 1:15-CV-233, 2016 WL
`4257355 (N.D.N.Y. Aug. 11, 2016) .................................................................................. 16
`
`GE Lighting Solutions, LLC v. AgiLight, Inc.,
`750 F.3d 1304 (Fed. Cir. 2014) ........................................................................................ 1, 2
`
`i4i Ltd. P’ship v. Microsoft Corp.,
`598 F.3d 831 (Fed. Cir. 2010), aff’d, 564 U.S. 91 (2011) ................................................ 19
`
`ii
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`
`
`Interactive Gift Exp., Inc. v. Compuserve Inc.,
`256 F.3d 1323 (Fed. Cir. 2001) .......................................................................................... 23
`
`Nautilus, Inc. v. Biosig Instruments, Inc.,
`134 S. Ct. 2120 (2014) ........................................................................................................... 2
`
`Oatey Co. v. IPS Corp.,
`514 F.3d 1271 (Fed. Cir. 2008) .......................................................................................... 13
`
`Omega Eng’g, Inc. v. Raytek Corp.,
`334 F.3d 1314 (Fed. Cir. 2003) ............................................................................................ 2
`
`Pactiv, LLC v. Multisorb Techs., Inc.,
`No. 10 C 461, 2013 WL 120234 (N.D. Ill. Jan. 9, 2013), aff’d, 621 F.
`App’x 665 (Fed. Cir. 2015) ................................................................................................. 12
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) ........................................................................................ 1, 2
`
`Pitney Bowes, Inc. v. Hewlett-Packard Co.,
`182 F.3d 1298 (Fed. Cir. 1999) .......................................................................................... 20
`
`Power-One, Inc. v. Artesyn Techs., Inc.,
`599 F.3d 1343 (Fed. Cir. 2010) .......................................................................................... 23
`
`TASER Int’l, Inc. v. Stinger Sys.,
`No. 2:09-cv-289-MMD-PAL, 2012 WL 3562371 (D. Nev. Aug. 16,
`2012) ...................................................................................................................................... 12
`
`Thorner v. Sony Computer Entm’t Am. LLC,
`669 F.3d 1362 (Fed. Cir. 2012) ............................................................................................ 1
`
`Viasat, Inc. v. Space Sys./Loral, Inc.,
`No. 3:12-cv-00260-H, 2013 WL 12061852 (S.D. Cal. May 29, 2013) ......................... 18
`
`Wi-Fi One, LLC v. Broadcom Corp.,
`887 F.3d 1329 (Fed. Cir. 2018) .......................................................................................... 13
`
`Statutes
`
`35 U.S.C. § 282(a) ........................................................................................................................ 2
`
`iii
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`
`I.
`
`INTRODUCTION
`Proper claim construction begins with the plain meaning of terms informed by
`the intrinsic evidence. Phillips v. AWH Corp., 415 F.3d 1303, 1314-15 (Fed. Cir. 2005).
`For this reason, a usage consistent with and supported by the specification and the
`embodiments within a patent is almost always the proper construction. Id. at 1316.
`Deviations from the specification are unusual and justified by only an unmistakably clear
`disclaimer. GE Lighting Solutions, LLC v. AgiLight, Inc., 750 F.3d 1304, 1309 (Fed. Cir.
`2014). Qualcomm nonetheless repeatedly violates these elementary tenets. Qualcomm
`artificially restricts the claimed inventions by adding limitations that do not exist, relying
`on cherry-picked specification quotes that Qualcomm misapplies to contradict the
`complete teachings of the patents—sometimes embodiments described in the very next
`sentence. Qualcomm also conjures indefiniteness arguments for nearly every asserted
`claim—arguments that deny the plain language of the claims, deviate from the written
`description, and disregard the knowledge of one of skill in the art.
`For these reasons, Qualcomm’s constructions should be rejected. Apple’s
`constructions, on the other hand, find solid support in the law and fit with the plain
`meaning of the disputed terms and the intrinsic and extrinsic evidence.
`II. LEGAL STANDARDS FOR CLAIM CONSTRUCTION
`“It is a ‘bedrock principle’ of patent law that ‘the claims of a patent define the
`invention to which the patentee is entitled the right to exclude,’” and as such claim
`construction must focus on the claim language itself. Phillips, 415 F.3d at 1312. The
`construction “that stays true to the claim language and most naturally aligns with the
`patent’s description of the invention will be, in the end the correct construction.” Id. at
`1316. Claim terms “are generally given their ordinary and customary meaning” as
`understood by the skilled artisan at the time of the invention. Id. at 1313. “There are
`only two exceptions to this general rule: 1) when a patentee sets out a definition and acts
`as his own lexicographer; or 2) when the patentee disavows the full scope of a claim term
`either in the specification or during prosecution.” Thorner v. Sony Computer Entm’t Am.
`1
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`LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). “The standards for finding lexicography and
`disavowal are exacting.” GE Lighting, 750 F.3d at 1309.
`Claim construction begins with the intrinsic evidence—namely, the claim
`language, the specification, and the prosecution history. Phillips, 415 F.3d at 1312–17.
`The claims provide important guidance both through “the context in which a term is
`used” and “differences among claims.” Id. at 1314–15. The specification is “always
`highly relevant.” Id. at 1315. However, the specification must be used with care because
`it is improper to read limitations from embodiments described in the specification into
`the claims. Id. at 1323. The prosecution history may shed light on what a term means,
`but “it often lacks the clarity of the specification and thus is less useful for claim
`construction purposes,” id. at 1317, and it will not limit claim scope unless it contains a
`“clear and unmistakable” disclaimer. Omega Eng’g, Inc. v. Raytek Corp., 334 F.3d 1314,
`1325–26 (Fed. Cir. 2003). Extrinsic evidence, like dictionaries and treatises, may be
`considered, but plays a limited role in claim construction. Phillips, 415 F.3d at 1320–21.
`“[A] patent is invalid for indefiniteness if its claims, read in light of the
`specification delineating the patent, and the prosecution history, fail to inform, with
`reasonable certainty, those skilled in the art about the scope of the invention.” Nautilus,
`Inc. v. Biosig Instruments, Inc., 134 S. Ct. 2120, 2124 (2014). An accused infringer bears the
`burden of proving by clear and convincing evidence that a claim is indefinite. Biosig
`Instruments, Inc. v. Nautilus, Inc., 783 F.3d 1374, 1377 (Fed. Cir. 2015); see also 35 U.S.C.
`§ 282(a) (“A patent shall be presumed valid.”).
`III. U.S. PATENT NOS. 7,355,905; 7,760,559; AND 8,098,534
`The ’905, ’559, and ’534 patents (Decl. of Robert M. Yeh1 Exs. 1-3, collectively
`the “Campbell Patents”)2 relate to methods that allow for different voltage levels in the
`
`1 All references to exhibits are to exhibits of Declaration of Robert M. Yeh in Support
`of Defendant / Counterclaim-Plaintiff Apple Inc.’s Opening Claim Construction
`Brief.
`2 The Campbell Patents (Ex. 1 (U.S. 7,355,905 (“’905”)); Ex. 2 (U.S. 7,760,559 (“’559”);
`Ex. 3 (U.S. 8,098,534 (“’534”))) are related patents. They share the same specification
`and all claim priority to U.S. App. No. 11/173,565 filed on July 1, 2005, now the ’905
`patent.
`2
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`memory and logic portions of an integrated circuit in view of what the patents describe
`as the “increase in importance” of “manag[ing] . . . power consumed by an integrated
`circuit.”. (Ex. 1 (’905) at Abstract, 1:14–19.) Reducing power consumption can be
`difficult because, while “[p]ower consumption in an integrated circuit is related to the
`supply voltage provided to the integrated circuit” (id. at 1:28–29), the amount that the
`supply voltage to the memory can be reduced is limited because “[a]s supply voltage
`decreases below a certain voltage, the ability to reliably read and write the memory
`decreases.” (Id. at 1:43–44.) The Campbell Patents solve these thermal and power
`management issues by separating the supply voltages into “at least one logic circuit
`supplied by a first supply voltage and at least one memory circuit . . . supplied by a second
`supply voltage.” (Id. at 2:4–6; see also Ex. 4 (Decl. of Robert L. Stevenson (“Stevenson
`Decl.”)) ¶ 21.) This allows the voltage of the logic circuits to be lower, and “[r]educing
`the supply voltage generally leads to reduced power consumption.” (Ex. 1 (’905) at 1:36–
`37.)
`
`A.
`
`“integrated circuit” (’905 patent, claim 1; ’559 patent, claims 1, 2, 3; ’534
`patent, claims 1, 3, 4)
`
`Disputed Term
`“integrated
`circuit”
`
`Qualcomm’s Construction
`“a chip made up of
`connected circuit elements”
`
`Apple’s Construction
`“one or more circuit elements
`that are integrated onto a single
`semiconductor substrate”
`Here, the parties primarily dispute whether an integrated circuit refers to circuit
`elements, which are on a semiconductor substrate (Apple), or whether a chip itself is an
`integrated circuit (Qualcomm). The claims, the written description, and the prosecution
`history all support Apple’s construction. (Ex. 4 (Stevenson Decl.) ¶¶ 23–35.)
`The claim language supports Apple’s construction. Nothing in the claims requires
`an “integrated circuit” to be the chip itself. Rather, all that the claims require is that the
`integrated circuit contains interconnected circuit elements, in this particular case a logic
`circuit and memory circuit. (Id. ¶ 25.) For example, Claim 1 of the ’905 specifically
`recites “An integrated circuit comprising: at least one logic circuit … and at least one
`
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`memory circuit….” (Ex. 1 (’905) at 11:12–15.) The other claims contain similar
`descriptions of integrated circuits as containing a number of circuit elements. This
`construction is consistent with the plain language of the claims. Dictionary definitions
`provided by both parties confirm this proposed claim construction. For example, the
`Microsoft Computer Dictionary, cited by Qualcomm, defines an integrated circuit as “a
`device consisting of a number of connected circuit elements, such as transistors and
`resistors, fabricated on a single chip of silicon crystal or other semiconductor material,”
`which does not require an integrated circuit to be the chip itself, but rather—consistent
`with Apple’s construction—describes connected circuit elements on a semiconductor
`substrate. (Ex. 4 (Stevenson Decl.) ¶ 33 & Ex. J; see also id. at Exs. F–I, H–L.)
`The written description and prosecution history further support Apple’s
`construction. The written description repeatedly describes “integrated circuit” as
`comprising logic and memory circuit elements, not as a chip. (See, e.g., Ex. 1 (’905) at
`Abstract, 2:3–9, 2:49–63; see also Ex. 4 (Stevenson Decl.) ¶ 26.) Further, the written
`description explains the “integrated” aspect of the term, explaining that the memory and
`logic elements are “integrated onto a single semiconductor substrate (or chip)”—again
`not the chip itself. (Ex. 1 (’905) at 2:61–63; see also Ex. 4 (Stevenson Decl.) ¶ 29.) Nothing
`in the prosecution history defines “integrated circuit” differently from this usage. (Ex. 4
`(Stevenson Decl.) ¶ 32.)
`B.
`“received on a first / second input to the integrated circuit” (’905
`patent, claim 1); “receiving power from at least one first / second
`input to the integrated circuit” (’559 patent, claim 1)
`
`Disputed Term Apple’s Construction
`“received on a first
`“provided to the
`/ second input to
`integrated circuit on a
`the integrated
`first / second input”
`circuit”
`“receiving power
`from at least one
`first / second input
`to the integrated
`circuit”
`
`“provided power from
`at least one first /
`second input to the
`integrated circuit”
`
`4
`
`Qualcomm’s Construction
`“generated external to the integrated
`circuit and connected to the integrated
`circuit on a first / second input”
`
`“supplied by a first / second supply
`voltage generated external to the
`integrated circuit and connected to the
`integrated circuit on at least one first /
`second input”
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`The parties’ dispute centers on Qualcomm’s attempt to change the claim language
`and insert extraneous language into the claims. The claim language, written description,
`and prosecution history support Apple’s construction. (See Ex. 4 (Stevenson Decl.) ¶¶
`36–44.)
`The claim language supports Apple’s construction given that Apple’s construction
`amounts to the plain meaning of the claims. (See id. ¶ 37.) In addition, the specification
`uses the phrase “provided to the integrated circuit” in the same way that the claims use
`“received on a first [or second] input.” (Id. ¶ 38.) For example:
`The logic circuits 12 are coupled to the memory circuits 14. The logic
`circuits 12 are powered by a first supply voltage provided to the
`integrated circuit 10 (labeled VL in FIG. 1). The memory circuits 14
`are powered by a second power supply voltage provided to the
`integrated circuit 10 (labeled VM in FIG. 1).
`(Ex. 1 (’905) at 2:53–583.) This passage’s language mirrors the claim language, except
`that instead of a supply voltage being “received,” the supply voltage is “provided to the
`integrated circuit.”
` Nothing
`in the prosecution history counsels a different
`interpretation. (Ex. 4 (Stevenson Decl.) ¶ 43.)
`Qualcomm improperly seeks to insert language not found in the claims. Nothing
`in either the claims or the written description indicates the source of the voltage being
`provided to the integrated circuit. (Id. ¶¶ 41–42.) Indeed, “generated externally” does
`not appear in the claims, specification, or prosecution history. Further, without any basis
`in the intrinsic record, Qualcomm inexplicably changes “power” to “voltage” in claim 1
`of the ’559. The Court should reject Qualcomm’s attempt to rewrite the claims under
`the guise of construction.
`
`
`3 For all references, emphasis has been added unless otherwise noted.
`5
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`C.
`
`“during use” (’905 patent, claim 1; ’559 patent, claims 1, 2; ’534 patent,
`claim 1)
`
`Apple’s Construction
`
`Qualcomm’s
`Construction
`Indefinite.
`
`Disputed
`Term
`“during use” plain and ordinary meaning. To the extent the Court
`finds that further construction is necessary, “while
`operating”
`The term “during use” is unambiguous to the skilled artisan when read in context
`of the claim language and specification. Qualcomm creates the parties’ dispute by
`arguing that “during use” is indefinite, but ignores the intrinsic evidence, the knowledge
`of one of ordinary skill, and common sense. (Ex. 4 (Stevenson Decl.) ¶¶ 45–49.)
`The claim language itself supports the plain and ordinary meaning of the phrase
`“during use.” (Id. ¶ 46.) The claims illustrate its meaning in relation to the operation of
`the circuit elements. For example:
` “at least one logic circuit operating in a first voltage domain during
`use” (Ex. 2 (’559) at cl. 1.)
` “at least one memory circuit coupled to the logic circuit, wherein the
`at least one memory circuit comprises a plurality of static random
`access memory (SRAM) cells operating in a second voltage domain
`during use” (Id.)
`
`Consistent with the plain and ordinary meaning, the claims indicate that the logic circuit
`and the memory circuit are operating “during use.” (Ex. 4 (Stevenson Decl.) ¶ 48.) The
`written description also uses this plain and ordinary meaning by using the term “during
`use” in relation to the operation of the claimed circuit:
`The supply voltage for the memory circuits 14 (VM) may be maintained at
`the minimum supply voltage that provides for robust memory operation
`(or greater, if desired). Thus, the VL supply voltage may be less than the
`VM supply voltage during use. At other times, the VL supply voltage may
`exceed the VM supply voltage during use (e.g. at times when higher
`performance is desired and higher power consumption is acceptable to
`achieve the higher performance).
`(Ex. 2 (’559) at 3:26–37; see also Ex. 4 (Stevenson Decl.) ¶ 47.)
`The written description further illustrates that “during use” refers to the period
`when both the logic and memory circuits are operating, unsurprising as the patents
`concern the interplay between logic and memory circuits. (Ex. 4 (Stevenson Decl.) ¶ 48.)
`6
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`Qualcomm, Ex. 1015, Page 10
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`Case 3:17-cv-01375-DMS-MDD Document 296 Filed 08/08/18 PageID.9863 Page 11 of 33
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`For example, the claims refer to both recited logic and memory circuits operating during
`use:
`
` “the memory circuit is configured to be read and written responsive to
`the logic circuit even if the first supply voltage is less than the second
`supply voltage during use” (Ex. 1 (’905) at cl. 1.)
` “wherein a magnitude of the first supply voltage is less than a
`magnitude of the second supply voltage at least a portion of the time
`during use” (Ex. 3 (’534) at cl. 1.)
`(See also Ex. 2 (’559) at cl. 1 (above).) The specification also describes the use of the logic
`and memory circuits during operation:
`The logic circuits 12 may generally implement the operation for which
`the integrated circuit is designed. The logic circuits 12 may generate
`various values during operation, which the logic circuits 12 may store in
`the memory circuits 14. Additionally, the logic circuits 12 may read various
`values from the memory circuits 14 on which to operate.
`(Ex. 1 (’905) at 2:64–3:2.) Accordingly, the Court should adopt either the plain and
`ordinary meaning or the related meaning “while operating.”
`IV. U.S. PATENT NOS. 7,383,453 AND 8,433,940
`The ’453 and ’940 patents (Exs. 6 and 7, collectively the “Youngs Patents”)4 relate
`to saving power by placing different portions of a processor in different power modes.
`Advancements in processor technology led to faster and smaller processors, but also
`increased power leakage, a form of power consumption that does not contribute to the
`processor’s function. (Ex. 6 (’453) at 1:27–58.) Increased power consumption was
`especially problematic for battery operated devices, such as laptops, with limited power
`supplies. (Id.) To reduce power consumption, the Youngs Patents disclose innovative
`power conservation techniques whereby the instruction-processing core(s) of a processor
`and the non-instruction processing area(s) of a processor may receive differentiated clock
`signaling and voltage as part of different operation and power-saving modes. (Id. at 1:65–
`2:9; see also Ex. 8 (Decl. of Sherief Reda (“Reda Decl.”) ¶ 23.) For example, in one mode,
`to conserve power, the clock signal to the instruction-processing core is inactive and the
`
`4 The Youngs Patents (Ex. 6 (U.S. 7,383,453 (“’453”)); Ex. 7 (U.S. 8,433,940 (“’940”)))
`are related patents. They share the same specification and both claim priority to
`application No. 10/135,116, filed on April 29, 2002, now U.S. Patent No. 6,920,574.
`7
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`Qualcomm, Ex. 1015, Page 11
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`voltage to the instruction-processing core is less than in its normal operation. (Ex. 6
`(’453) at 4:59–5:10.)
`A.
`“core” and “area” (’453 patent, claims 1, 2, 4)5
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`Qualcomm’s
`Construction
`Indefinite.
`
`Disputed
`Term
`“core”
`
`Apple’s Construction
`
`plain and ordinary meaning. To the extent the Court
`finds that further construction is necessary, “a logical
`
`or physical instruction processing mechanism”
`Indefinite.
`“a portion of the processor excluding a core”
`“area”
`The ’453 patent’s asserted claims recite an “instruction processing system”
`comprising “a core with instruction-processing circuitry” and “an area coupled to the
`core.” These terms are unambiguous to the skilled artisan when read in context of the
`claim language and specification. Qualcomm argues that both “core” and “area” are
`indefinite, but ignores the intrinsic evidence, the knowledge of one of ordinary skill, and
`common sense.
`Taking “core” first, the claims recite “a core with instruction-processing
`circuitry.” (Ex. 6 (’453) at cl. 1.) As is apparent from the claim language alone, the ’453
`patent uses the term “core” consistent with its plain and ordinary meaning—“a logical
`or physical instruction processing mechanism.” A person of ordinary skill in the art was
`well aware of what a core was, the existence of multi-“core” processors, and that the
`cores in those processors perform instruction processing. (See, e.g., Ex. 8 (Reda Decl.)
`¶¶ 27–31; Ex. 9 (Reda Dep. Tr.) at 55:16-57:11.) Indeed the concept of a core was so
`ubiquitous that there simply should not be any debate regarding its definiteness. (Ex. 9
`(Reda Dep. Tr.) at 56:5–8 (“When you ask the plain, ordinary meaning of core is that any
`core, an instruction-processing mechanism[,] could be logical or physical.”); id. at 74:20–
`75:3.) Consistent with the plain and ordinary meaning of “core,” the specification
`describes that “[c]ore power area includes the instruction-processing portion of
`processor 102. Specifically, core power area 126 includes arithmetic-logic unit 104.”
`
`5 As the terms “core” and “area” are related and the dispute over their construction is
`likewise related, they are addressed together.
`8
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` Case No. 3:17-CV-01375-JAH-MDD
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`Qualcomm, Ex. 1015, Page 12
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`(Ex. 6 (’453) at 3:10–13; see also Ex. 8 (Reda Decl.) ¶ 28.) Figures 1A and 1B illustrate
`this idea, showing a “core power area 126” with “arithmetic-logic unit 104” that
`“provides computational and logical operations for processor 102.” (Ex. 6 (’453) at
`3:7–17.) The patent further explains that the “voltage applied to core power 134 remains
`sufficiently high during instruction processing so that core power area 126 remains
`fully active.” (Id. at 4:13–15.)
`As for “area,” claim 1 distinguishes “a core with instruction-processing circuitry”
`from “an area coupled to the core.” (Id. at cl. 1; see also Ex. 8 (Reda Decl.) ¶ 36.) In
`other words, from the plain language of the claims alone, “area” is “a portion of the
`processor excluding a core,” as Apple proposes. The written description provides
`explicit guidance that the area makes up “the remaining portion of processor 102.” (Ex.
`6 (’453) at 3:30–37.) The specification further describes an area by its contents: “non-
`core power area 124 includes portions of processor 102 that are not directly involved
`in processing instructions.” (Id. at 3:34–36.)
`One of skill in the art was well aware that, as described in the ’453, a processor
`contains instruction processing components and auxiliary components. (Ex. 9 (Reda
`Dep. Tr.) at 118:14–20.) Various terminology was used in the field to describe this
`conceptual dichotomy, including, for example, core and un-core. (Ex. 8 (Reda Decl.) ¶
`37 (noting an “uncore” is “not in the processing core,” but rather includes “circuits on a
`chip that are not executing program instructions”).) One of skill in the art reading the
`’453 patent would understand that the applicant chose the terminology of “core” and
`“area” to capture this dichotomy. (Ex. 8 (Reda Decl.) ¶¶ 34–36; Ex. 9 (Reda Dep. Tr.)
`at 120:8–21.) As such, an “area” must contain auxiliary components, and, indeed, the
`patent describes just that: “Non-core power area 124 comprises the remaining portion
`of processor 102 and includes interrupt processor 112, real-time clock 114, clock
`distribution circuitry.” (Ex. 6 (’453) at 3:30–32; Ex. 8 (Reda Decl.) ¶ 36; Ex. 9 (Reda
`Dep. Tr.) at 82:14–82:25.) The patent further underscores the core / area distinction by
`associating voltages with each. (E.g., Ex. 6 (’453) at Fig. 1A (“core power 134” and “non-
`9
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`Qualcomm, Ex. 1015, Page 13
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`Case 3:17-cv-01375-DMS-MDD Document 296 Filed 08/08/18 PageID.9866 Page 14 of 33
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`core power 136”) & cl. 1 (“core voltage” and an “area voltage”); Ex. 9 (Reda Dep. Tr.)
`at 133:14–19, 134:6–135:9.)
`Even though the specification delineates between a