`Nels on et al.
`
`I IIIII IIIIIIII Ill lllll lllll lllll lllll lllll lllll lllll lllll 111111111111111111
`US006341143Bl
`US 6,341,143 Bl
`Jan.22,2002
`
`(10) Patent No.:
`(45) Date of Patent:
`
`12/1993
`3/1994
`4/1994
`4/1994
`8/1994
`
`Herh et al.
`White
`Halpern
`Deaton et al.
`Folger et al.
`
`. ... ... ... 340/825.14
`
`5,268,928 A
`5,293,376 A
`5,301,122 A
`5,305,196 A
`5,337,044 A *
`(List continued on next page.)
`OTHER PUBLICATIONS
`AT&T Microelectronics, "High Speed Data Pump Chip
`Sets," published in Dec. 1991.
`Zilog Intelligent Peripheral Controllers, "Z84C01 Z80®
`CPU with Clock Generator/Controller," 43-73, published in
`1991.
`Zilog Intelligent Peripheral Controllers, "Z84C90 CMOS
`Z80® KIO Serial/Parallel/Counter/Timer," 205-224, pub(cid:173)
`lished in 1995.
`(List continued on next page.)
`Primary Examiner-Madeleine Nguyen
`(74) Attorney, Agent, or Firm----Schwegman, Lundberg,
`Woessner & Kluth, P.A.
`ABSTRACT
`
`(57)
`
`Updated operating code and parameters can be repro(cid:173)
`grammed into a modem system with no disassembly of the
`modem hardware. The modem system includes a memory
`chip in which operating code and parameters are stored. Two
`control programs control the reprogramming of updated
`operating code. One of the control programs is designed for
`manufacturing and testing purposes. The other control pro(cid:173)
`gram allows remote reprogramming of updated operating
`code or parameters from a remote location such as a cus(cid:173)
`tomer site. A user can thus remotely upgrade system firm(cid:173)
`ware with updates, bug fixes, enhancements or other new
`releases of system operating code by downloading the
`update over a phone line to a host PC and reprogramming
`the memory chip of the modem over the serial port from the
`host PC. The user can also remotely upgrade the modem
`system firmware by directly programming the memory chip
`of the modem without the assistance of the host PC. The
`modem system is portable, obtaining power from a standard
`9 volt battery. Therefore, various power saving features are
`also incorporated into the modem system
`
`8 Claims, 28 Drawing Sheets
`
`(54) MODEM WITH FIRMWARE UPGRADE
`FEATURE
`
`(75)
`
`Inventors: Craig A. Nelson, St. Paul;
`Harinarayana Arimilli, Coon Rapids;
`Richard David Johnson, Maplewood,
`all of MN (US)
`
`(73) Assignee: Multi-Tech Systems, Inc., Mounds
`View, MN (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by O days.
`
`(21) Appl. No.: 08/368,291
`Jan. 3, 1995
`(22) Filed:
`
`Related U.S. Application Data
`
`( 63) Continuation-in-part of application No. 08/087,164, filed on
`Jul. 2, 1993.
`
`(51)
`
`Int. Cl.7 ........................... H04B 1/38; H04M 11/00
`
`(52) U.S. Cl. ..................................... 375/222; 379/93.05
`
`(58) Field of Search ................................. 375/222, 219;
`395/200, 200.01, 200.02, 200.09, 200.18,
`200.64, 200.51, 750.05; 379/93.01, 93.05,
`100.01
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`1/1980 Hong et al.
`RE30,187 E
`5/1980 Mascia
`4,203,006 A
`5/1986 Redding
`4,592,069 A
`4,725,977 A * 2/1988 Izumi et al.
`................ 364/900
`4,782,462 A * 11/1988 Kaplinsky et al. .......... 364/900
`4,830,757 A * 5/1989 Lynch et al. ................ 210/742
`4,893,271 A
`1/1990 Davis et al.
`5,001,729 A * 3/1991 Tjahjadi et al. ............. 375/106
`5,132,716 A * 7/1992 Samuels et al.
`............ 354/322
`5,155,847 A
`10/1992 Kirouac et al.
`5,175,845 A
`12/1992 Little
`5,239,652 A
`8/1993 Seibert et al.
`
`TO COMPUTER
`
`Page 1 of 43
`
`GOOGLE EXHIBIT 1019
`
`
`
`US 6,341,143 BI
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`5,367,670 A * 11/1994 Wardetal. we. 395/575
`
`.. 395/150
`5,390,350 A *
`2/1995 Chunget al.
`.....
`4/1995 Ikehata et al. 379/98
`5,408,522 A *
`5,428,790 A *
`6/1995 Harperetal. .....
`... 395/750
`5,434,849 A *
`7/1995 Vicard et al.
`..
`. 370/32.1
`5,450,425 A *
`9/1995 Gunn etal. we. 371/67
`OTHER PUBLICATIONS
`
`
`
`AT&T Microelectronics, WE® DSP16C Digital Signal Pro-
`cessor/CODECPreliminary Data Sheet, 32 pages, published
`in May, 1991.
`AT&T Microelectronics, “T7540 Digital Telephone CODEC
`Data Sheet and Addendum,” 1-4, published in Jul., 1991.
`
`AT&T Microelectronics, T7540 Digital Telephone CODEC
`Preliminary Data Sheet, 1-64, published in Jan., 1991.
`“Dynamic Setting of Modem Parameters,” IBM Technical
`Disclosure Bulletin, Vo. 26, No. 1, Jun. 1983, pp. 261-262.
`“Technique for Power Management in Signal Processors,”
`IBM Technical Disclosure Bulletin, vol. 35, No. 5, Oct.,
`1992, pp. 425-427.
`“Resume Operation for Internal Modems,” IBM Technical
`Disclosure Bulletin, vol. 5, No. 48, Sep. 1992, pp. 398-399.
`K.Tolly, “The New Branch—Office Routers”, Data Commu-
`nications, pp. 58-70, Aug. 1994.
`
`* cited by examiner
`
`Page 2 of 43
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`Page 2 of 43
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`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 1 of 28
`
`US 6,341,143 B1
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`Page 3 of 43
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`Page 3 of 43
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`U.S. Patent
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`Jan. 22, 2002
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`Sheet 2 of 28
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`Page 4 of 43
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`Jan. 22, 2002
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`Sheet 3 of 28
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`Page 11 of 43
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`Page 14 of 43
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`Sheet 15 of 28
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`US 6,341,143 B1
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`TO HOST PC
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`
`FIG. 7
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`Page 17 of 43
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`Page 17 of 43
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`U.S. Patent
`
`Jan. 22, 2002
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`Sheet 16 of 28
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`US 6,341,143 B1
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`FIND AND DISPLAY
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`Page 18 of 43
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`Page 18 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 17 of 28
`
`US 6,341,143 B1
`
`UPDATE ONSCREEN
`HELP DISPLAY
`
`READ AND
`PROCESS FILE
`
`A810
`
`ZAP MEMORY
`BUFFER
`
`OPEN FILE FOR
`
`READ ACCESS
`
`READ FIRST
`RECORD
`
`PARSE
`RECORD
`
`RECORD
`TYPE 00
`?
`
`
`
`
`
`
`<oon
`TYPE 01
`?
`
`NO
`
`RECORD
`TYPE 02
`?
`
`ERROR
`
`[_ERROR_|
`
`
`REPORT
`UNKNOWN
`RECORD
`TYPE
`
`
`
`
`
`
`
`
`
`PROCESS
`RECORD AS
`
`
`EOF
`PROCESS
`
`
`PROCESS RECORD
`
`
`
`RECORD AS
`AS DATA TO
`
`
`64K PAGE
`LOAD TO MEMORY
`
`
`NUMBER
`BUFFER AT
`WERE
`
`ADDRESS
`CURRENT MEMORY
`
`
`T
`0000, 0001, OR 0002
`
`PROGRAMMED
`pommer
`
`
`SI
`
`HEX RECORD
`.
`
`FORCE TO
`
`OC3H, 00
`
`AND 01
`
`RESPECTIVELY
`HEX RECORDCEND_)
`
`NO
`
`READ NEXT
`
`
`
`
`
`
`FIG. 8B
`
`Page 19 of 43
`
`Page 19 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 18 of 28
`
`US 6,341,143 B1
`
`PROGRAM
`FILE INTO
`PRODUCT
`
`}*PROGRAM SEQUENCE
`
`INITIALIZE SERIAL
`PORT 19200, 8,
`NONE,
`1
`
`—S
`SEND _AT*FS
`
`p20
`
`880
`
`882
`
`INITIALIZE POINTERS TO
`TOP OF RAM BUFFER
`
`IF PROTECT IS ON,
`DISABLE PROGRAM
`OF BOOT AREAS
`
`SEARCH BACKWARDS LOOKING
`FOR NON—BLANK AREA
`
`886
`
`INCREMENT
`KEEP LOOKING BACKWARD,
`PACKET LENGTH UNTIL FIND BLANK
`PAGE OR MAX PACKET LENGTH
`
`GET RESPONSE
`
`57600,115200
`
`BY RESPONSE
`J=19200
`K=19200 OR 38400
`M=9600, 19200,38400
`
`WAIT FOR OK
`
`INITIALIZE NEW
`BAUD RATE
`
`SEND ’ATI1’
`
`READ BOOT
`VERSION #
`
`REPORT VERSION #
`
`|SEND'W’|384
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`DONE
`<
`PROGRAMMING
`35")
`“eetEewo’
`?
`
`
`
`
`
`SET MAX PACKET
`SIZE BY VERSION #
`1.07 AND LESS=128
`DSP=256
`ALL ELSE=MAX_SIZE
`=4096
`
`
`
`
`N
`
`REPEAT 5 TIMES
`THEN ERROR AND
`EXIT TO DOS
`(END)
`
`FIG. 8C
`
`Page 20 of 43
`
`Page 20 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 19 of 28
`
`US 6,341,143 B1
`
`POWER UP OR
`AT * FS
`
`INITIALIZE PORT FOR
`19200 BAUD, COPY CODE
`TO RAM, JUMP TO RAM
`
`INITIALIZE COUNTER
`FOR 30ms
`
`GET A CHARACTER
`
`
`
`
`NO
`
`DECREMENT
`COUNTER
`
`<eomes>
`
`ES
`EXIT TO
`MAIN CODE
`
`SEND 'U’
`INITIALIZE
`FOR 300ms
`
`GET A CHARACTER
`
`?
`
`NO
`
`DECREMENT
`COUNTER
`
`NO
`
`ES
`
`
`
`’D’<>
`—
`ES <a
`
`
`SEND M
`
`GET A
`CHARACTER
`
`<s
`CONFIGURE
`ACCORDING TO
`LETTER RECEIVED
`1=9600
`J=19200
`K=38400
`L=57600
`M=115200
`
`ACCEPT
`COMMANDS
`
`FIG. 9A
`
`Page 21 of 43
`
`Page 21 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 20 of 28
`
`US 6,341,143 B1
`
`GET DATA BYTE
`
`CHECKSUM=CHECKSUM @ DATA
`
`DECREMENT COUNTER
`
`
`
`
`
`<om>°
`
`YES
`
`GET CHECKSUM DATA BYTE FROM HOST PC
`
`
`
`CHECKSUM
`
`=CHECKSUM DATA
`?
`
`
`
`PROGRAM BYTES AT ADDRESS
`
`
`SEND ‘OK’
`
`
`SEND ’ERROR’
`
`Page 22 of 43
`
`Page 22 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 21 of 28
`
`US 6,341,143 B1
`
`
`
`ATFLEND RECEIVED
`
`
`
`DISABLE
`SERIAL PORT
`
`JUMP TO
`MAIN CODE
`
`
`
`
`COMMAND END
`
`FIG. 9C
`
`x=0 SEND PRODUCT ID CODE
`x=1 SEND BOOT VERSION NUMBER
`x=2 SEND 'MT1432xx’
`x=3 SEND ‘000 000 000 000 000 000 000 000 000’
`x#0,1,2,5 DEFAULT TO 10
`
`
`
`
`
`
`
`
`
`
`
`
`ATlx RECEIVED
`
`COMMAND END
`
`FIG. 9D
`
`Page 23 of 43
`
`Page 23 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 22 of 28
`
`US 6,341,143 B1
`
`
`
`
`ESTABLISH COMMUNICATIONS BETWEEN
`THE BULLETIN BOARD AND THE MODEM
`TO BE PROGRAMMED WITH UPGRADED CODE
`
`
`
`
`
`
`
`
`
`
`
`ENTER COMMAND MODE BY TRANSMITTING AN
`ESCAPE SEQUENCE TO THE MODEM
`
`ENTER PROGRAMMING MODE BY TRANSMITTING
`"AT * FS1" TO THE MODEM
`
`
`
`EXECUTE THE FLASH CONTROL PROGRAM AT THE
`BULLETIN BOARD SIDE AND DOWNLOAD
`.
`PACKETIZED UPDATED OPERATING CODE TO
`THE MODEM
`
`FIG. 10
`
`Page 24 of 43
`
`Page 24 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 23 of 28
`
`US 6,341,143 B1
`
`A~1100
`
`1108
`
`
`
`FIND AND DISPLAY
`FILES, ASK FOR
`FILE SELECTION
`
`
`
`
`
`
`
`
`READ AND
`PROCESS FILE
`
`
`
`INITIALIZE INTERNAL
`VARIABLES AND
`ENVIRONMENT
`
`PARSE COMMAND
`LINE PARAMETERS
`
`SAVE AND CLEAR
`SCREEN
`
`1102
`
`START HELP SYSTEM
`
`READ SETUP FILE
`
`INITIALIZE
`SERIAL PORT
`
`1104
`
`ALLOCATE MEMORY
`
`1106
`YES
`
`
`
`
`
`OK
`
`TO PROGRAM THIS
`FILE
`
`?
`
`
`
`
`
`PROGRAM FILE
`INTO PRODUCT
`
`SHUT DOWN TIMERS
`AND RESTORE SCREEN
`
`INFORM USER FLASH
`CONTROL PROGRAM IS
`COMPLETE
`
`
`
`
`
`WAS FILE
`
`NAME ON COMMAND
`
`LINE
`?
`NO
`1107
`
`
`
`
`
`
`
`PROCESS MENU
`1 PORT SETUP
`2 READ FILE
`3 PROGRAM
`4 EXIT
`
`FIG. 11A
`
`Page 25 of 43
`
`Page 25 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 24 of 28
`
`US 6,341,143 B1
`
`UPDATE ONSCREEN
`HELP DISPLAY
`
`READ AND
`PROCESS FILE
`
`A110
`
`ZAP MEMORY
`BUFFER
`
`
`
`OPEN FILE FOR
`
`ERROR
`
`READ ACCESS j_ERROR|
`
`
`?
`
`HEX RECORD
`
`READ NEXT
`HEX RECORD
`
`END
`
`FIG. 11B
`
`Page 26 of 43
`
`
`
`READ FIRST
`RECORD
`
`RECORD
`
`SECORD
`TYPE 01
`?
`
`
`
`
`
`
`
`NO
`RECORD
`RECORD
`
`TYPE 02
`TYPE 00
`
`
` PROCESS
`?
`?
`
`
`RECORD AS
`
`
`
`EOF
`
`PROCESS RECORD
`PROCESS
`
`RECORD AS
`AS DATA TO
`
`64K PAGE
`LOAD TO MEMORY
`
`
`
` WERE
`BUFFER AT
`NUMBER
`
`ADDRESS
`
`CURRENT MEMORY
`0000, 0001, OR 0002
`POINTER
`PROGRAMMED
`
` LAST
`? FORCE TO
` NO
`RESPECTIVELY
`
`Page 26 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 25 of 28
`
`US 6,341,143 B1
`
`pol20
`
`INTIALIZE POINTERS TO
`TOP OF RAM BUFFER
`
`IF PROTECT IS ON,
`DISABLE PROGRAM
`OF BOOT AREAS
`
`1180
`
`1182
`
`1184
`
`SEARCH BACKWARDS LOOKING
`
`1186
`
`INCREMENT
`KEEP LOOKING BACKWARD,
`PACKET LENGTH UNTIL FIND BLANK
`PAGE OR MAX PACKET LENGTH
`
`PROGRAM
`FILE INTO
`PRODUCT
`
`}*PROGRAM SEQUENCE
`
`INITIALIZE SERIAL
`PORT TO MATCH
`MODEMS
`
`;
`
`SEND ’M’<>
`
`ES
`
`SEND 'D”
`
`GET RESPONSE
`
`57600, 115200
`
`SET BAUD RATE
`BY RESPONSE
`J=NO CHANGE
`K=19200 OR 38400
`M=9600, 19200, 58400
`
`WAIT FOR OK
`
`INITIALIZE NEW
`BAUD RATE
`(IF NECESSARY
`
`SEND ‘ATI1’
`
`READ BOOT
`VERSION 4
`
`REPORT VERSION #
`
`FOR NON-BLANK AREA
`
`
`
`
`
`
`
`
`
`
`
`
`
`SET MAX PACKET
`
`SIZE BY VERSION #
`
`
`OK: NO|Exit TO DOS
`1.07 AND LESS=128
`
`
`DSP=256
`ALL ELSE=MAX_SIZE
`
`
`BBS
`=4096
`NOW
`PROGRAMMIN
`
`
`
`
`
`
`
`
`
`
`
`REPEAT 5 TIMES
`THEN ERROR AND
`
`DONE
`
`FIG. 11C
`
`Page 27 of 43
`
`Page 27 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 26 of 28
`
`US 6,341,143 B1
`
`RECEIVE REMOTE UPGRADE
`COMMAND (AT * FSI)
`
`COPY CODE
`TO RAM, JUMP TO RAM
`
`WAIT FOR REMOTE PC TO EXIT
`DATA MODE AND PROCESS
`UPDATED OPERATING CODE
`
`GET A CHARACTER
`
`
`
`
`NO
`
`DECREMENT
`COUNTER
`
`<omes>
`
`ES
`EXIT TO
`MAIN CODE
`
`
`
`
`a D’<at>
`:
`
`
`SEND ’U’
`INITIALIZE
`FOR 300ms
`
`GET A CHARACTER
`
`NO
`
`DECREMENT
`COUNTER
`
`NO
`
`FIG. 12A
`
`Page 28 of 43
`
`SEND M
`
`GET A
`CHARACTER
`
`a
`S <r
`
`;
`
`
`
`CONFIGURE
`ACCORDING TO
`
`
`
`
`LETTER RECEIVED
`l=9600
`J=NO CHANGE
`K=38400
`L=57600
`M=115200
`
`
`
`
`
`
`
`
`ACCEPT
`COMMANDS
`
`Page 28 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 27 of 28
`
`US 6,341,143 B1
`
`GET DATA BYTE, STORE
`
`CHECKSUM=CHECKSUM @ DATA
`
`DECREMENT COUNTER
`
`
`
`
`eon
`
`YES
`
`GET CHECKSUM DATA BYTE FROM HOST PC
`
`
`
`
`CHECKSUM
`=CHECKSUM DATA
`?
`
`
`
`
`SEND "ERROR’
`
`
`=
`
`FIG. 12B
`
`Page 29 of 43
`
`Page 29 of 43
`
`
`
`U.S. Patent
`
`Jan. 22, 2002
`
`Sheet 28 of 28
`
`US 6,341,143 B1
`
`ATFLEND RECEIVED
`
`
`
`ALL
`PROGRAM DATA BYTES
`
`
`PACKETS
`FROM RAM INTO
`
`
`
`
`RECEIVED
`
`
`FLASH PROM
`
`OK?
`
`
`
`
`
`
`HARD BOOT
`
`JUMP T0
`MAIN CODE
`
`COMMAND END
`
`FIG. 12C
`
`ATlx RECEIVED
`
`
`
`x=0 SEND PRODUCT ID CODE
`x=1 SEND BOOT VERSION NUMBER
`x=2 SEND 'MT1432xx’
`x=3 SEND ’000 000 000 000 000 000 000 000 000’
`x#0,1,2,3 DEFAULT TO 10
`
`
`
`
`
`
`
`
`
`
`
`COMMAND END
`
`FIG. 12D
`
`Page 30 of 43
`
`Page 30 of 43
`
`
`
`US 6,341,143 B1
`
`1
`MODEM WITH FIRMWARE UPGRADE
`FEATURE
`
`This application is a continuation-in-part of U.S. patent
`application Ser. No. 08/087,164, entitled “Modem with
`Firmware Upgrade Feature”, filed Jul. 2, 1993.
`
`2
`the user can remotely
`host PC. In another embodiment,
`upgrade the modem system firmware by directly program-
`ming the memory chip of the modem without the assistance
`of the host PC.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIELD OF THE INVENTION
`
`The present invention relates to communications systems
`and in particular to a modem in which the firmware which
`controls the operation of the modem can be changed or
`upgraded remotely.
`
`BACKGROUND
`
`Presently, there are several mechanisms through which
`software upgrades, bug fixes and the like are distributed to
`users. In systems employing firmware storage of operating
`programs, such as Electrically Programmable Read Only
`Memory (EPROM)andthelike, bug fixes or enhancements
`to system firmware require programming a new EPROM
`with the updated code and shipping the new EPROMto the
`customer. A technician then travels to the site, disassembles
`the hardware, and replaces the old EPROM with the new
`one.
`
`15
`
`20
`
`25
`
`present invention;
`FIGS. 11A-11C show a flow diagram of the upgrade
`control program from the perspective of the remote PC in a
`second embodimentof the present invention; and
`FIGS. 12A-12D show a flow diagram of the upgrade
`control program from the perspective of the modem in a
`second embodiment of the present invention
`
`40
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`In the drawings, where like numerals refer to like com-
`ponents throughout the several views:
`FIG. 1 showsthe telecommunications environment within
`which the present system may operate,
`FIG. 2 is a block diagram of the hardware components of
`the present system;
`FIG. 3 is a key for viewing the detailed electrical sche-
`matic diagrams of FIGS. 4A-7Cto facilitate understanding
`of the interconnections between the drawings;
`FIGS. 4A-4E, 5A-5C and 6A-6C are detailed electrical
`schematic diagrams of the circuitry of the hardware com-
`ponents of the present system;
`FIG. 7 shows a flow diagram of the process for down-
`loading the HEXfiles containing the updated operating code
`from a bulletin board to the host PC in a first embodiment
`of the present invention;
`FIGS. 8A-8C show a flow diagram of the upgrade control
`program from the perspective of the host PC in a first
`Unfortunately, these methods are very inconvenient.First,
`embodiment of the present invention;
`a considerable time delay is encountered while waiting for
`FIGS. 9A-9D showaflow diagram of the upgrade control
`the manufacturer to program and ship the replacementparts.
`program from the perspective of the modem inafirst
`Second, the hardware may not be operable if the user is
`embodiment of the present invention;
`waiting for a bug fix. Especially true in cases of bug fixes
`FIG. 10 shows a flow diagram of the process for directly
`where the hardware might not be operable without
`the
`downloadingfiles containing updated operating code from a
`updated operating code. Also, the replacement of the old
`remote PC to the modem in a second embodiment of the
`with the new EPROMrequires a technician to travel to the
`site and use special tools to disassemble the hardware and
`replace the outdated on faulty part or parts. This results in an
`increased expensefor repairs or upgrades because technician
`time and special tools are required. Current update methods
`are thus time consuming, expensive and inefficient.
`There is a needin the art, therefore, for a modem which
`allows remote changes and/or upgrades to be made to the
`firmware stored operating code, without requiring disassem-
`bly and replacement of parts, technician time, or special
`tools, thus resulting in the more efficient and cost effective
`means of updating firmware.
`
`45
`
`In the following detailed description of the preferred
`embodiment, reference is made to the accompanying draw-
`SUMMARY
`ings which formapart hereof, and in which is shown by way
`of illustration specific embodiments in which the inventions
`To overcome the shortcomingsin the art described above,
`may be practiced. These embodiments are described in
`and to provide other advantages which will become apparent
`sufficient detail to enable those skilled in the art to practice
`upon reading and understanding the present specification,
`the invention, and it is to be understood that other embodi-
`the present system is a modem system which includes
`ments may be utilized and that structural changes may be
`hardware and software components. The system allows the
`made without departing from the spirit and scope of the
`user to connect to remote locations equipped with a similar
`present inventions. The following detailed description is,
`system or with modemsor facsimile machines over a single
`therefore, not to be taken in a limiting sense, and the scope
`analog telephone line. The incorporation of various power
`of the present inventionsis defined by the appended claims.
`saving features allow practical implementation of a small,
`lightweight and easily transportable modem system powered
`FIG. 1 shows a typical arrangement for the use of the
`from a standard 9 volt battery. The present modem system
`present modem system. Hardware components 20 contain
`also incorporates storage of operating code and parameters
`the present modem system and are connected to laptop
`in an in-circuit reprogrammble memory chip. Multiple
`computer 10. Hardware components 20 communicate over a
`embodiments of the present invention are discussed which
`standard telephoneline 30 to oneofa variety of remote sites.
`allow for remote programming of the modem system. In one
`For example, one of the remote sites may be equipped with
`embodimenta user can thus remotely upgrade system firm-
`the present modem system including hardware components
`ware with updates, bug fixes, enhancements or other new
`20a and laptop computer 10a. The present modem system
`releases of system operating code by downloading the
`can also connect over phonelines 30 to fax machine 60, to
`update over a phone line to a host PC and reprogramming
`a personal computer and associated modem 40, or to a
`the memory chip of the modem overthe serial port from the
`network of personal computers 90. Those skilled in the art
`
`50
`
`60
`
`65
`
`Page 31 of 43
`
`Page 31 of 43
`
`
`
`US 6,341,143 B1
`
`3
`will readily recognize the wide variety of communication
`interconnections possible with the present system by reading
`and understanding the following detailed description.
`
`Hardware Components
`
`FIG. 2 is a block diagram of the hardware components of
`the present system corresponding to reference number20 of
`FIG. 1. These components form the link between the user,
`the laptop or personal computer (PC) and the telephone line
`interface.
`
`The preferred embodiment of the present system prefer-
`ably includes a data pump circuit 211, which includes a
`digital
`telephone coder-decoder (CODEC) and a digital
`signal processor (DSP) for communicating over the tele-
`phoneline interface 209. The data pump DSPof circuit 211
`performs functions such as modulation, demodulation and
`echo cancellation to communicate over the telephone line
`interface 209 using a plurality of telecommunications stan-
`dards including FAX and modem protocols. The main
`controller circuit 213 directly controls the DSP data pump
`circuit 211.
`
`As described morefully below, the main controller circuit
`213 includes, in the preferred embodiment, a microprocessor
`which controls the functions and operation of all of the
`hardware components shown in FIG. 2. The main controller
`is connected to RAM circuit 216 and a programmable and
`electrically erasable read only memory or Flash PROM
`circuit 217. The Flash PROM circuit 217 includes non-
`volatile memory in which the executable control programs
`for the main controller circuits 213 are stored
`The RS232 serial interface 215 communicatesto the serial
`port of the personal computer which is running the software
`components in the first embodiment of the present system.
`The RS232 serial interface circuit 215 is connected to a
`serial input/output circuit 214 with main controller circuit
`213.
`
`invention, data is
`In one embodiment of the present
`received from the telephone line over telephone line inter-
`face circuit 209 and forwarded by the data pump circuit 211
`and the main controller circuit 213 over the serial
`line
`
`interface circuit 215 to the personal computer.If the data is
`upgrade program data, then it is processed and transmitted
`back to serial line interface circuit 215 to be loaded into
`
`RAM circuit 216, and ultimately, into Flash PROM circuit
`217.
`
`In a second embodimentof the present invention, upgrade
`program data is received from the telephone line over
`telephone line interface circuit 209 and stored in RAM 216
`via data pump circuit 211 and main controller circuit 213.
`The upgrade program data stored in RAM circuit 216 is later
`programmed into Flash PROM circuit 217.
`
`Detailed Electrical Schematic Diagrams
`
`The detailed electrical schematic diagrams comprise
`FIGS. 4A-E, 5A-C, 6A-C and 7A-C. FIG. 3 shows a key
`for how the schematic diagrams may be conveniently
`arranged to view the passing of signals on theelectrical lines
`between the diagrams. The electrical connections between
`the electrical schematic diagrams are through the designa-
`tors listed next to each wire. For example, on the right side
`of FIG. 4A, address lines AO-A19 are attached to an address
`bus for which the individual electrical lines may appear on
`other pages as AO-A19 or maycollectively be connected to
`other schematic diagrams through the designator “A”in the
`circle connected to the collective bus. In a like fashion, other
`
`10
`
`15
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`4
`electrical lines designated with symbols such as RNGL on
`the lower left-hand side of FIG. 4A may connect to other
`schematic diagrams using the same signal designator
`RNGL.
`
`Beginning with the electrical schematic diagram of FIGS.
`4D and 4E, the DAA circuitry (telephone line interface) is
`shown. The telephone line connection in the preferred
`embodimentis through connector J201 which is a standard
`six-pin modular RJ-11 jack. In the schematic diagram of
`FIG. 4E, only the tip and ring connections of the first
`telephone circuit of the RJ-11 modular connector are used.
`Ferrite beads FB201 and FB202 are placed on the tip and
`ring wires of the telephone line connections to reduce high
`frequency or RF noise that may radiate from telephone line.
`The incoming telephone line is also overvoltage protected
`through SIDACTOR R205. The incoming telephoneline is
`fill wave rectified by the full wave bridge comprised of
`diodes CR230, CR226, CR227 and CR228 of FIG. 4D.
`Also connected across the incoming telephone line is a
`ring detect circuit. Optical isolator U220 (part model num-
`ber CNY17) senses the ring voltage threshold when it
`exceeds the breakdownvoltages on zener diodes CR201 and
`CR202.
`
`The DAA circuitry is physically isolated from the rest of
`the system by transformer T1, optocoupler U220 and two
`solid state relays X215 and X202 which are optically
`coupled. Connector J203 is a four pin header used for
`automatic testing during manufacturing and for diagnostics.
`Relay X215 shownin FIG. 4D is used to accomplish pulse
`dialing by opening and shorting the tip and ring wires.
`Transistor Q203 along with the associated discrete resistors
`comprise a holding circuit to provide a current path or
`current loop on the telephoneline to grab the line. The DAA
`circuitry shown in FIGS. 4D and 4E can be customized to
`interface to the varying telephone standards used in the
`United States and in many different European countries.
`Connector J202 shown in FIG. 4D connects the telephone
`line interface circuitry described above to connector J102
`shown in FIG. 6A and thusly to the rest of the circuit.
`Incoming RXA signals are buffered by the two operational
`amplifers U104 as shown in FIG. 6B. The first stage of
`buffering is used to drive the transmit carrier signal to the
`telephone line. The second stage of the input buffering is
`configured for a moderate amountof gain before driving the
`signal into CODEC U101. This stage is also used to reduce
`the amount of transmit signal
`that is fed back into the
`receiver. The signal from amplifiers U104 is also fed to
`speaker driver U105, which drives speaker X10.
`Data and address buses A and B shown in FIGS. 4A and
`4B connect the Z80180 microprocessor in microcontroller
`U5 with the Z80 KIO circuit U4 and a gate array circuit U3,
`and to other portions of the electrical schematic diagrams.
`Gate array U3, also shown in FIGS. 4A and 4B, includes the
`“glue logic” used to support various functions in the hard-
`ware components of the present invention. Gate array U3
`includes miscellaneous latch and buffer circuits for the
`present system which normally would be found in discrete
`SSI or MSIintegrated circuits. By combining a wide variety
`of miscellaneous support circuits into a single gate array, a
`much reduced design complexity and manufacturing cost is
`achieved.
`
`CODECchip U101 shownin FIG. 6B, interface chip U1
`shown in FIG. 5A and digital signal processor (DSP) chip
`U2 shown in FIG. 5A comprise a data pump chip set
`manufactured and sold by AT&T Microelectronics. A
`detailed description of the operation of these three chips in
`
`Page 32 of 43
`
`Page 32 of 43
`
`
`
`5
`direct connection and cooperation with one another is
`described in the publication entitled “AT&T V.32bis/V.32/
`FAX High-Speed Data Pump Chip Set Data Book” pub-
`lished by AT&T Microelectronics, December 1991, which is
`incorporated herein by reference. This AT&T data pump
`chip set comprises the core of an integrated, two-wire full
`duplex modem whichis capable of operation over standard
`telephone lines or leased lines. The data pump chip set
`conforms to the telecommunications specifications in
`CCITT recommendations V. 32bis, V. 32, V.22bis, V.22,
`V.23, V.21 and is compatible with the Bell 212A and 103
`modems. Speeds of 14,400, 9600, 4800, 2400, 1200, 12,000
`and 300 bits per second are supported. This data pump chip
`set consists of a ROM-coded DSP16Adigital signal proces-
`sor U2, and interface chip U1 and an AT&T T7525 linear
`CODEC U101. The AT&T data pump chip set is available
`from AT&T Microelectronics.
`
`US 6,341,143 B1
`
`6
`present system in a non-volatile memory. Upon power-up,
`microcontroller chip U5 executes the program codethat is
`stored in the flash PROM U7. In the preferred embodiment,
`RAM chip U6is a pseudostatic RAM which is a dynamic
`RAM with a built-in refresh. Those skilled in the art will
`
`readily recognize that a wide variety of memory chips may
`be used and substituted for pseudo-static RAM U6 andflash
`PROM U7 without departing from the scope of the present
`invention.
`The interface between the main controller circuit 213 and
`
`10
`
`the personal computer is through S10circuit 214 and RS232
`serial interface 215. RS232 connection J103 is shown on
`FIG. 6A with the associated RS232 driver