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`Browse Journals & Magazines > IEEE Transactions on Microwav... > Volume: 56 Issue: 5
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`Resistive-Feedback CMOS Low-Noise Amplifiers for
`Multiband Applications
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` Bevin G. Perumana ; Jing-Hong C. Zhan ; Stewart S. Taylor ; Brent R. Carlton ; Joy Laskar
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`Abstract:
`Extremely compact resistive-feedback CMOS low-noise amplifiers (LNAs) are presented as a cost-effective alternative to multiple narrowband
`LNAs using high-Q inductors for multiband wireless applications. Limited linearity and high power consumption of the inductorless resistive-
`feedback LNAs are analyzed and circuit techniques are proposed to solve these issues. A 12-mW resistive-feedback LNA, based on current-reuse
`transconductance boosting is presented with a gain of 21 dB and a noise figure (NF) of 2.6 dB at 5 GHz. The LNA achieves an output third-order
`intercept point (IP3) of 12.3 dBm at 5 GHz by reducing loop-gain rolloff and by improving linearity of individual stages. The active die area of the
`2
`LNA is only 0.012 mm . A 9.2-mW tuned resistive-feedback LNA utilizing a single compact low-Q on-chip inductor is presented, showing an
`improved tradeoff between performance, power consumption, and die area. At 5.5 GHz, the fully integrated LNA achieves a measured gain of 24
`dB, an NF of 2 dB, and an output IP3 of 21.5 dBm. The LNA draws 7.7 mA from the 1.2-V supply and has a 3-dB bandwidth of 3.94 GHz (4.04-7.98
`2
`GHz). The LNA occupies a die area of 0.022 mm . Both LNAs are implemented in a 90-nm CMOS process and do not require any costly RF
`enhancement options.
`
`Published in: IEEE Transactions on Microwave Theory and Techniques ( Volume: 56, Issue: 5, May 2008 )
`
`Referenced in: IEEE RFIC Virtual Journal
`
`Page(s): 1218 - 1225
`
`Date of Publication: 12 May 2008
`
` ISSN Information:
`
` INSPEC Accession Number: 9966513
`
`DOI: 10.1109/TMTT.2008.920181
`
`Publisher: IEEE
`
`Sponsored by: IEEE Microwave Theory and Techniques Society
`
` Contents
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` Download PDF
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` Download Citation
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`Typesetting math: 24%
` Print
`
`SECTION I.
`Introduction
`
`Low-Noise Amplifiers (LNAs) occupy a significant percentage of the total die area in wireless front-
`ends today. This is because the performance of the LNA is dependent on the Q's of the multiple on-
`chip inductors. Since the area requirement of high-Q on-chip inductors is high, the die area
`occupied by the LNA is also high. Often, costly process steps are required to enhance the Q of the
`on-chip inductors to further improve the performance of RF circuits. the design of these circuits
`usually requires a higher number of simulation and verification iterations. Cascode amplifiers with
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`Resistive-Feedback CMOS Low-Noise Amplifiers for Multiband Applications - IEEE Journals & Magazine
`inductive source degeneration [1], the predominant LNA implementation used in CMOS wireless
`Keywords
`front-ends, require three high-Q inductors for achieving input impedance matching, high gain, and
`low noise figure (NF). in spite of the high die area requirements, cascode LNAs have been used
`extensively in narrowband wireless applications because they provide high gain, low noise, and
`high linearity at relatively low power consumption. with the advent of multiple-input multiple-
`output (MIMO), multistandard, and multiband wireless systems; however, the use of the area
`intensive cascode LNAs is becoming increasingly expensive, leading to the pursuit of alternative
`LNA implementations.
`
`Back to Top
`
`Related Articles
`
`A multiband receiver can be implemented by using a single multiband or wideband LNA, as shown
`in Fig. 1. Cascode LNAs based on inductive source degeneration are not suitable for this
`implementation since it is extremely difficult to switch the three on-chip inductors to make the
`same cascode LNA work across all the required frequency bands without compromising
`performance. Multiband receivers can also be implemented by using multiple narrowband LNAs,
`each designed for a different frequency band, as shown in Fig. 2. If cascode LNAs with inductive
`degeneration are used for this implementation, the die area and cost will both be prohibitively high.
`
`Fig. 1.
`Multiband receiver implementation using a multiband/wideband LNA.
`
`Fig. 2.
`Multiband receiver implementation using multiple narrowband LNAs.
`
`Inductorless resistive-feedback CMOS LNAs [2]–[3][4] have been shown to be a viable option for
`implementing multiband receivers, as shown in Fig. 1. These circuits require very small die area
`and can be implemented in a digital CMOS process without any additional RF enhancements.
`Hence, this approach can potentially significantly reduce the cost of the wireless front-end
`implementation. Resistive-feedback LNAs achieve high gain and reasonably low NF [4]. However,
`novel circuit techniques are required to reduce power consumption and improve linearity.
`
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`
`Fig. 3.
`Simplified schematic and small-signal model of a shunt-shunt feedback amplifier.
`
`This paper presents an inductorless resistive-feedback LNA in which a current-reuse
`transconductance-boosting technique [5] is utilized to reduce the power consumption to 12 mW.
`the LNA has a gain of 21 dB and an NF of 2.6 dB at 5 GHz. the active die area of this circuit is only
`2
`0.012 mm . the combination of small die area, broad bandwidth and moderate power consumption
`make this LNA architecture suitable for low-cost multistandard wireless front-ends, as shown in
`Fig. 1. By maintaining a moderate loop-gain across the frequency band and reducing the
`nonlinearities of individual stages, the LNA achieves an output third-order intercept point (IP3) of
`12.3 dBm at 5 GHz. Techniques to further improve IP3 by nonlinearity cancellation [6]–[7][8][9]
`are also presented.
`
`A resistive-feedback cascode LNA using a single compact on-chip load inductor is presented next. It
`has a maximum gain of 24.4 dB, and a 3-dB bandwidth of 3.94 GHz (4.04–7.98 GHz). At 5.5 GHz,
`the NF is 2 dB, and the output IP3 is 21.5 dBm. Since the inductor Q is not required to be high, the
`2
`area of this LNA is only 0.022 mm . This makes it suitable for multiband receiver implementations,
`as shown in Fig. 2. This LNA can also be easily modified to operate across multiple frequency bands
`(as in Fig. 1) since the single low-Q tuned load can be switched to resonate at different frequencies.
`
`The gain, input impedance, NF, and linearity of resistive-feedback LNAs are discussed in Section II.
`Section III describes circuit techniques to improve linearity and lower power consumption. the
`design of the inductorless LNA with current-reuse transconductance boosting and the tuned
`resistive-feedback LNA (using a compact low-Q inductor) are described in Section III. the
`implementation details of these circuits are discussed in Section IV. the measurement results of
`both the LNAs are given in Section V along with performance comparison to other reported circuits.
`Finally, conclusions are presented in Section VI.
`
`SECTION II.
`Resistive-Feedback LNA Theory
`
`Consider a simplified resistive-feedback amplifier, as shown in Fig. 3(a). { M}_{1} represents the
`input transconductance device, which could be a single transistor or a cascode pair. { R}_{{ L}}
`represents the load resistance including the output resistance of the input transconductance stage. {
`R}_{{ F}} is the resistor implementing the shunt–shunt feedback. { R}_{{ S}} is the source
`resistance and { R}_{{ B}1} is used for biasing along with dc blocking capacitors { C}_{{ B}1}, {
`C}_{{ B}2}, and { C}_{{ B}3}. the equivalent small-signal model of the transimpedance amplifier is
`shown in Fig. 3(b), where { g}_{{ m}} represents the transconductance of { M}_{1}. { C}_{\rm gs}
`represents the capacitance to ground at the gate of { M}_{1}. for frequencies well below 1/(2 \pi {
`C}_{\rm gs}{ R}_{{ S}}), the effect of { C}_{\rm gs} can be neglected.
`
`A. Voltage Gain
`Using the small-signal model in Fig. 3(b), the voltage gain of the amplifier can be derived as A_{v}
`= {v_{\rm out} \over v_{\rm in}} = - \left({g_{m} - {1 \over R_{F}}}\right)({R_{L} \Vert R_{F}}).
`\eqno{\hbox{(1)}}
`
`View Source
`
`Typesetting math: 24%
`
`Feedback analysis [10] can be done by opening the loop and determining the open-loop
`transresistance gain (a) and the feedback factor (f), shown as follows: \eqalignno{a &= - ({R_{S} \,
`\vert \vert \, R {F}})g {m} ({R {L} \, \vert \vert \, R {F}}) &{\hbox{(2)}}\cr f &= - {1\over
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`\vert \vert \, R_{F}})g_{m} ({R_{L} \, \vert \vert \, R_{F}}) &{\hbox{(2)}}\cr f & {1\over
`R_{F}}. &{\hbox{(3)}}}
`
`View Source
`
`The voltage gain given by feedback analysis is A_{v({\rm Feedback}\ {\rm Theory})} = - g_{m}
`({R_{L} \, \vert \vert \, R_{F}}). \eqno{\hbox{(4)}}
`
`View Source
`
`The discrepancy between (1) and (4) is because the feedforward path through { R}_{F} is ignored in
`the feedback analysis. This difference is negligible if g_{m} \gg 1/R_{F}.
`
`B. Input Impedance Matching
`Shunt–shunt feedback reduces the input impedance of the amplifier by a factor of (1+af). the input
`resistance (R_{\rm in}) of the amplifier is given by { R}_{\rm in} = {(R_{S}\, \Vert\, { R}_{F})
`\over 1 + af} \approx {R_{S} \over 1 + af} \eqno{\hbox{(5)}}
`
`View Source
`
`since { R}_{F} \gg { R}_{S} (for reasons related to NF, which will explained later). for input
`impedance matching, R_{\rm in} has to be equal to R_{S}/2. from (5), input matching is achieved
`with a loop gain (af) just below 1, which also ensures circuit stability. Using (3), the open-loop
`transresistance gain has to be approximately equal to the value of the feedback resistance for
`achieving input impedance matching {\hbox{Input Impedance Match Condition:}} \left \vert a
`\right\vert \approx { R}_{F}. \eqno{\hbox{(6)}}
`
`View Source
`
`C. Nf
`The contribution of each noise source to the total output noise is evaluated. the NF is then
`calculated by evaluating the ratio of the total output noise to the output noise due to { R}_{S} as
`follows: \displaylines{ {\rm NF} \approx {1 +} {\gamma_{g_{m}} \over R_{S}{g}_{m}} + {1 \over
`R_{S} R_{L} g_{m}^{2}} \hfill\cr \hfill + {4R_{S} \over R_{F}} \left({-1 \over 1 +
`{\displaystyle{R_{F} +R_{S} \over (1 + g_{m} R_{S})R_{L}}}} \right)^{2} \quad\hbox{(7)} }
`
`View Source
`
`where \gamma_{g_{m}} is the noise excess factor of { M}_{1} [11]. Equation (7) shows that having
`a large feedback resistance can lower the NF. from (6), a higher R_{F} requires a higher open-loop
`gain for input matching, usually leading to higher power consumption.
`
`D. Linearity
`Consider a nonlinear amplifier modeled by the power series [12] v_{\rm out} = a_{1} v_{\rm in} +
`a_{2} v_{\rm in}^{2} + a_{3} v_{\rm in}^{3}. \eqno{\hbox{(8)}}
`
`View Source
`
`Negative feedback improves its input IP3 by the following factor: \eqalignno{ {{{\rm IP3}}\vert
`_{\rm CL} \over {{\rm IP3}}\vert _{\rm OL}} &= \left({1 + a_{1} f} \right)^{2}\sqrt {a_{3} \over
`a_{3} (1 + a_{1} f) - 2fa_{2}^{2}} \cr &\approx ({1 + a_{1} f})^{3/2} &\hbox{(9)} }
`
`View Source
`
`where 2fa_{2}^{2} \ll a_{3} (1+ a_{1} f), {{\rm IP3}}\vert_{\rm CL}, and {\rm IP3}\vert_{\rm
`OL} represent the close-loop and open-loop IP3, respectively. Equation (9) shows that linearity is
`not significantly improved by feedback at high frequencies if the open-loop gain of the amplifier
`rolls off [2].
`
`Typesetting math: 24%
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`
`SECTION III.
`Low-Power High-Linearity Resistive-
`Feedback LNAs
`
`As discussed in Section II, a high open-loop gain is required to simultaneously achieve low NF and
`good input matching. the open-loop bandwidth also has to be high to achieve high linearity at high
`frequencies. These requirements usually lead to high power consumptions in resistive-feedback
`LNAs [2], [4]. We now present circuit techniques to improve linearity and lower power
`consumption in resistive-feedback LNAs.
`
`A. Current-Reuse Resistive-Feedback LNA
`The schematic of the restive feedback LNA with current-reuse transconductance boosting is shown
`in Fig. 4. Cascode transistors { M}_{1} and { M}_{3} form the input transconductance stage. A
`significant portion of the bias current in { M}_{1} is diverted away from the load resistor { R}_{L}
`by transistor { M}_{2}. This reduces the dc voltage drop across { R}_{L}. Moreover, the
`transconductance generated by { M}_{2} adds to that of { M}_{1}, increasing the effective g_{m} of
`the input stage. the current mirror formed by { M}_{7} and { M}_{8} controls the amount of
`current shunted away from { R}_{L}. the amplified signal is fed back to the input transconductance
`stage through feedback resistor { R}_{F} and the source follower formed by { M}_{4}, { M}_{5},
`and { R}_{1}. the diode connected { M}_{5} is used in the source follower to generate gate bias
`voltages for { M}_{1}, { M}_{2}, and { M}_{3}. the dc and ac feedback loops are thus combined,
`making it possible to remove the dc blocking capacitors required in earlier reports [4]. This reduces
`the total area requirement, and avoids loading of the source follower by the parasitic capacitance of
`the dc blocking capacitor to the substrate. the latter improves the LNA linearity. An additional
`source follower, formed by { M}_{6} and { R}_{2}, is incorporated to improve reverse isolation and
`output driving capability. As discussed in Section II, the linearity at high frequencies can be
`improved by increasing open-loop bandwidth. This is achieved by device sizing and reducing layout
`parasitics as much as possible. the overall linearity of the LNA is improved by making each block of
`the LNA more linear. Removing the dc block capacitors reduces the loading of the source follower,
`making it more linear, as explained earlier. Resistors { R}_{1} and { R}_{2} replace active current
`mirrors, which are nonlinear and have greater capacitance.
`
`Fig. 4.
`Schematic of the current-reuse transconductance-boosting resistive-feedback LNA.
`
`In all resistive-feedback LNAs with g_{m}-enhanced cascode structure, the width/length (W/L)
`ratio of the cascode transistor is kept low to achieve a higher bandwidth. the cascode device also has
`a lower bias current than the input transistor so as to reduce the voltage drop across the load
`resistor, as explained earlier. the lower W/L ratio and bias current makes the transconductance of
`the common-gate cascode transistor significantly lower than the common-source input transistor.
`the gain of the common-source stage is the ratio of these transconductances. the high gain in the
`common source input stage preceding the cascode stage makes the g {m} nonlinearity in the
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`common-source input stage preceding the cascode stage makes the g_{m} nonlinearity in the
`cascode stage limit the overall circuit linearity. This is because the IIP3 of the combined stages
`({\rm IIP}3_{{\rm CS}-{\rm CG}}) is related to the IIP3 of the common-source stage ({\rm
`IIP}3_{\rm CS}), its gain ({ G}_{\rm CS}), and the IIP3 of the common-gate stage ({\rm
`IIP}3_{\rm CG}) by the following equation: {1\over ({\rm IIP}3_{\rm CS-CG})^2} = {1\over ({\rm
`IIP}3_{\rm CS})^2} + \left({G_{\rm CS}\over {\rm IIP}3_{\rm CG}}\right)^2
`\eqno{\hbox{(10)}}
`
`View Source
`
`Hence, significant improvement in linearity can be obtained if the nonlinearity of the cascode stage
`is reduced by nonlinearity cancellation. This can be achieved by using derivative superposition [6],
`[13], as shown in Fig. 5(a). Here, the g_{m3} (\delta^{3}I_{D}/\delta { V}^{3}_{\rm GS}) of the
`common-gate stage ({ M}_{3}) is cancelled by the g_{m3} of the subthreshold transistor { M}_{6}.
`the measured input IP3 of the g_{m}-enhanced cascode LNA is plotted against the gate voltage of {
`M}_{3} ({ V}_{C}) in Fig. 5(b). Though significant improvements in IP3 have been demonstrated
`with derivative superposition at the cost of increased NF ({\approx}0.6 dB) [9], such cancellation
`techniques may have potential issues in volume applications due to process and temperature
`variations.
`
`Fig. 5.
`Nonlinearity cancellation in a g_m-enhanced cascode LNA with derivative superposition.
`
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`
`Fig. 6.
`Schematic of the tuned resistive-feedback LNA utilizing a compact low-Q load inductor.
`
`B. Tuned Resistive-Feedback LNA with a Compact Low-Q Load Inductor
`Linearity issues due to the high gain in the common-source stage preceding the common-gate
`cascode stage can be avoided by replacing the load resistance with a low-Q resonant load, using a
`compact on-chip inductor. the bias current of the cascode device can be made equal to that of the
`input device because the dc voltage drop across the resonant load is negligible. Since all the
`capacitance at the output node can be resonated out with the inductive load, it is not necessary to
`make the W/L ratio of the cascode device small.
`
`The schematic of a tuned resistive-feedback LNA is shown in Fig. 6. Transistor { M}_{1} is used as
`the common-source transconductance stage and { M}_{2} is used as the cascode common-gate
`stage. A compact low-Q on-chip spiral inductor L_{1} and the total capacitance at the output node
`form the resonant load. the parasitic capacitance of the dc block capacitors ({ C}_{C2} and {
`C}_{C3}) to substrate and the drain capacitance of { M}_{2} can, therefore, be resonated out along
`with the load capacitance at the output node. Resistors { R}_{{\rm FB}1}, { R}_{{\rm FB}2}, and {
`R}_{{\rm FB}3} form the shunt-shunt feedback path. Capacitors { C}_{{ B}1} and { C}_{{ B}2} and
`resistor { R}_{B1} are used for biasing the cascode transistors.
`
`Fig. 7.
`Schematic of the modified super source follower output buffer.
`
`Since this LNA utilizes only a single low-Q load inductor, it can be made extremely compact. Hence,
`low-cost multiband receivers can be implemented by using multiple tuned resistive-feedback LNAs
`each designed for a different frequency band, as shown in Fig. 2.
`
`This circuit can be easily modified to operate across different frequency bands for the multiband
`receiver implementation shown in Fig. 1. the band-switching scheme enabling this implementation
`is shown in Fig. 6. the resonant frequency f_{r} can be shifted by using the capacitors { C}_{1} and
`{ C}_{2} and the switches { S}_{C1} and { S}_{C2}. At resonance, the load impedance is purely
`resistive and given by {{ R}_{L,{fr}}} =2\pi{ f_r} L_{ fr}\left({ Q}_{ fr} + {1 \over Q_{ fr}}\right).
`\eqno{\hbox{(11)}}
`
`View Source
`
`Here, L_{ fr} and Q_{ fr} are the inductance and Q of the load inductor at the resonant frequency
`f_{r}. All the equations from Section II are still valid if R_{L} is replaced by R_{L,{\rm fr}}, and if
`g_{m} represents the effective transconductance of the cascode stage.
`
`Typesetting math: 24%
`
`If the switches { S}_{C1} and { S}_{C2} are used to shift f_{r}, the value of R_{L,{\rm fr}}, given by
`(11), will not be the same in different frequency bands. Thus, the open-loop transimpedance gain
`( )
`i
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`f
`f
`b d t
`th
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`(a) given by (2), will also vary from one frequency band to another. To satisfy the input matching
`condition in (6) across all the frequency bands, the feedback resistance R_{\rm FB} will also have
`to be switched, as shown in Fig. 6, using switches { S}_{ R1} and { S}_{ R2}.
`
`SECTION IV.
`Implementation of the Resistive-
`Feedback LNAs
`
`Both of the resistive-feedback LNAs are implemented in a 90-nm seven-metal CMOS process. the
`only RF enhancement option used is the high-resistivity substrate under RF signal paths. All the
`capacitors were implemented as inter-digitated metal finger capacitors. Since the output
`impedance of the LNAs are not 50 \Omega, a modified super source follower [4] was used to
`facilitate measurements. the schematic of this circuit is shown in Fig. 7.
`
`The current-reuse transconductance-boosting resistive-feedback LNA draws 6.7 mA from the 1.8-V
`supply, thus consuming 12 mW of power. the chip micrograph of this LNA is shown in Fig. 8. the
`chip is pad limited and the actual LNA dimensions are 40 \mum \times 310 \mum (Area: 0.012
`2
`mm ). This implementation is a very low-cost alternative to the conventional inductor-based
`circuits for multiband multistandard radios.
`
`Fig. 8.
`Chip micrograph of the current-reuse transconductance-boosting resistive-feedback LNA.
`
`The tuned resistive-feedback LNA has a power consumption of 9.2 mW, drawing 7.7 mA from the
`1.2-V supply. Band switching is not implemented and the LNA is designed to operate in a single
`frequency band around 5.5 GHz. the chip micrograph of this circuit is shown in Fig. 9. the LNA
`2
`dimensions are 155 \mum \times 145 \mum (Area: 0.022 mm ).
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`Fig. 9.
`Chip micrograph of the tuned resistive-feedback LNA.
`
`SECTION V.
`Measurement Results
`
`The measurements for both of the resistive-feedback LNAs were performed with on-wafer probing.
`Standalone output buffers were measured to deembed their effect on the measurement results of
`the LNAs.
`
`A. Measurement Results of the Current-Reuse Resistive-Feedback LNA
`The standalone output buffer used with the current-reuse transconductance boosting LNA has an
`insertion loss of 7 dB. Its input IP3 is 15.6 dBm at 5.8 GHz, 18 dBm at 5 GHz, and higher at lower
`frequencies. the buffer NF is 10 dB, including the noise added by a 50-\Omega resistor added at the
`input for impedance matching.
`
`The measured and simulated gain of the LNA and output buffer is shown in Fig. 10. Also plotted in
`Fig. 10 are the buffer loss and the deembedded LNA gain. the gain falls from 22 dB at low
`frequencies to 21 dB at 5 GHz. the 3-dB bandwidth is 7.5 GHz.
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`Fig. 10.
`Measured and simulated gain of the current-reuse transconductance-boosting resistive-feedback
`LNA and output buffer.
`
`The measured and simulated input matching of the LNA are plotted in Fig. 11. It is − 10 dB at 5 GHz
`and better at lower frequencies. the measured NF is plotted against frequency in Fig. 12. the NF is
`2.6 dB at 5 GHz and varies between 2.3–2.9 dB from 500 MHz to 7 GHz. the 1.5-dB increase in gain
`in the measured results is due to slightly higher values for { R}_{L} and { R}_{F}. This increase in
`gain leads to improved input matching and noise performance compared to the simulated results.
`
`Fig. 11.
`Measured and simulated input matching of the resistive-feedback LNA.
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`Fig. 12.
`Measured and simulated NF of the LNA and output buffer.
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`The input IP3 of the LNA is plotted in Fig. 13 after deembedding the effects of the output buffer. It
`varies from −2.3 dBm at 500 MHz to −8.8 dBm at 5.8 GHz. the degradation of linearity with
`frequency is due to the loop gain rolloff with frequency, as explained earlier.
`
`Fig. 13.
`Measured input IP3 of the current-reuse transconductance-boosting LNA.
`
`B. Measurement Results of the Tuned Resistive-Feedback LNA
`The standalone output buffer used with the tuned resistive-feedback LNA is similar to the one used
`with the current-reuse LNA and has a loss of 8 dB, and an NF of 9.8 dB (including the noise added
`by the 50-\Omega resistor at the input). the output buffer has an input 1-dB compression point of
`6.5 dBm and an input IP3 of 18 dBm at 5.5 GHz.
`
`The measured and simulated gain of the LNA and output buffer is plotted in Fig. 14. the buffer loss
`and the deembedded gain of the LNA without the buffer are also plotted in Fig. 14. the LNA has a
`maximum gain of 24.4 dB and a 3-dB bandwidth of 3.94 GHz from 4.04 to 7.98 GHz. the measured
`input matching is plotted in Fig. 15. the input matching is better than −10 dB from 5 to 6.85 GHz.
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`Fig. 14.
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`Measured and simulated gain of the tuned resistive-feedback LNA and output buffer.
`
`Fig. 15.
`Measured and simulated input matching of the tuned LNA.
`
`Fig. 16.
`Measured and simulated NF of the tuned resistive-feedback LNA and output buffer.
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`Fig. 17.
`Input IP3 of the tuned resistive-feedback LNA.
`
`Fig. 16 shows the measured and simulated NF of the tuned resistive-feedback LNA and the output
`buffer. the deembedded NF of the LNA without the output buffer is also plotted. the tuned resistive-
`feedback LNA has an NF of approximately 2 dB between 4–6 GHz.
`
`The IP3 of the LNA and output buffer is plotted in Fig. 17. the input IP3 of the tuned resistive-
`feedback LNA and output buffer is −7.7 dBm at 5.5 GHz. the IIP3 of the LNA is found to be −2.6
`dBm after deembedding the output buffer nonlinearity using the IIP3 of the standalone buffer (18
`dBm) and the gain of the LNA (24.1 dB). Therefore, the output IP3 of the LNA is 21.5 dBm. the
`measured input 1-dB compression point of the LNA and buffer is −18 dBm at 5.5 GHz. the input 1-
`dB compression point of the LNA without the output buffer is found to be −7.2 dBm after
`deembedding.
`
`The performance of the two resistive-feedback LNAs are tabulated and compared with others
`reported in Table I. the current-reuse transconductance-boosting resistive-feedback LNA provides
`comparable performance at lower power consumption while occupying very small die area. the
`tuned resistive-feedback LNA, though requiring slightly larger die area than the inductorless LNA,
`provides very high linearity, low noise, and high gain while dissipating low power. This LNA
`presents a much improved tradeoff between performance, power consumption, and cost, especially
`for multiband multistandard wireless receivers.
`
`Table I Wideband LNA Performance Comparison
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`SECTION VI.
`Conclusion
`
`Extremely compact LNA circuits based on resistive feedback are presented as a cost-effective
`alternative to multiple tuned LNAs requiring many high-Q inductors for multiband wireless
`applications. the relationships between the feedback resistance, NF, input matching, and open-loop
`gain are presented. the effect of the open-loop bandwidth on the close-loop linearity is also
`explained. A current-reuse transconductance boosting technique is used to reduce the power
`consumption in a resistive-feedback LNA to 12 mW. the inductorless LNA achieves a gain of 21 dB
`and an NF of 2.6 dB at 5 GHz. the rolloff of loop gain and the nonlinearities in the feedback loop are
`reduced to improve the output IP3 to 12.3 dBm at 5 GHz. the active die area of this LNA is only
`2
`0.012 mm . A tuned resistive-feedback LNA, using a compact resonant load, is also presented. It
`achieves a maximum gain of 24.4 dB and a 3-dB bandwidth of 3.94 GHz using a single low-Q on-
`2
`chip inductor and consuming 9.2 mW of power. the LNA has an active die area of 0.022 mm . the
`NF of the tuned resistive-feedback LNA is approximately 2 dB between 4–6 GHz. At 5.5 GHz, the
`LNA has an output IP3 of 21.5 dBm. the combination of high linearity, low NF, high broadband
`gain, small die area, and low power consumption makes this LNA architecture a compelling choice
`for low-cost multistandard wireless front-ends.
`
`ACKNOWLEDGMENT
`The authors would like to thank the following c