throbber
UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`MICROSOFT CORPORATION,
`Petitioner,
`v.
`SAINT REGIS MOHAWK TRIBE,
`Patent Owner.
`_______________________
`
`IPR2018-01601 (Patent 7,225,324 B2)
`IPR2018-01602 (Patent 7,225,324 B2)
`IPR2018-01603 (Patent 7,225,324 B2)
`IPR2018-01605 (Patent 7,620,800 B2)
`IPR2018-01606 (Patent 7,620,800 B2)
`IPR2018-01607 (Patent 7,620,800 B2)
`__________________________
`
`DECLARATION OF DR. HOUMAN HOMAYOUN
`
`
`1
`
`
`
`
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 1
`
`

`

`I, Houman Homayoun, I declare that all statements made herein are true and
`
`that these statements were made with knowledge that willful false statements are
`
`punishable by fine or imprisonment, or both, under Section 1001 of Title 18 of the
`
`United States Code.
`
`
`
`Dated: January 15, 2018
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`________________________
`Houman Homayoun
`
`
`
`2
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 2
`
`

`

`I. ENGAGEMENT
`1. I have been retained by counsel for Patent Owner as an expert witness in the
`
`above-captioned proceedings. I have been asked to provide my opinions about the
`
`validity of U.S. Patent Nos. 7,225,324 (the 324 patent) and 7,620,800 (the 800
`
`patent) and my opinions about what certain references disclose.
`
`2. All of the opinions stated in this report are based on my personal knowledge
`
`and professional judgment. If called as a witness during the trial in this matter, I am
`
`prepared to testify competently about them. I am over the age of eighteen.
`
`II. QUALIFICATIONS
`3. My curriculum vitae is attached as Exhibit A. A summary of my qualifications
`
`relevant to this case is provided below.
`
`4. I am an Associate Professor of Electrical and Computer Engineering at George
`
`Mason University (GMU). I am the director of GMU’s Accelerated, Secure, and
`
`Energy-Efficient Computing Laboratory (ASEEC). Prior to joining GMU, I spent
`
`two years at the University of California, San Diego, as NSF Computing Innovation
`
`(CI) Fellow awarded by the CRA-CCC working with Professor Dean Tullsen.
`
`5. I am currently conducting research in big data computing, heterogeneous
`
`computing and hardware security and trust, which spans the areas of computer design
`
`and embedded systems, where I have published more than 80 technical papers in the
`
`prestigious conferences and journals on the subject.
`
`
`
`3
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 3
`
`

`

`6. I am also currently leading six research projects funded by DARPA, AFRL and
`
`NSF on the topics of hardware security and trust, big data computing, heterogeneous
`
`architectures, and biomedical computing.
`
`7. I have successfully completed four projects on “Hybrid Spin Transfer Torque-
`
`CMOS Technology to Prevent Design Reverse Engineering”, “Persistence and
`
`Extraction of Digital Artifacts from Embedded Systems”, “Inter-core Selective
`
`Resource Pooling in a 3D Chip Multiprocessor”, and “Enhancing the Security on
`
`Embedded Automotive Systems” funded by DARPA, NIST, NSF and General
`
`Motors.
`
`8. I received the 2016 Great Lakes Symposium on VLSI (GLSVLSI) conference
`
`best paper award for developing a manycore accelerator for wearable biomedical
`
`computing.
`
`9. I am currently serving as Member of Advisory Committee, Cybersecurity
`
`Research and Technology Commercialization (R&TC) working group in the
`
`Commonwealth of Virginia.
`
`10. Since 2017 I have been serving as an Associate Editor of IEEE Transactions
`
`on VLSI. I served as TPC Co-Chair for GLSVLSI 2018.
`
`11. I am currently the general chair of GLSVLSI 2019.
`
`
`
`4
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 4
`
`

`

`III. COMPENSATION AND PRIOR TESTIMONY
`12. I am being compensated $445 per hour for my research and report preparation
`
`in this matter but my compensation does not depend on the opinions I render or the
`
`outcome of these proceedings. I do not have a personal interest in the outcome of this
`
`proceeding.
`
`13. I have only previously testified in the co-pending district cases against
`
`Microsoft and Amazon and that was by deposition. Those cases are listed below:
`
`(a) SRC Labs, LLC et al v. Microsoft Corporation, No. 2:18-cv-00321-
`
`JLR (W.D. Wash.).
`
`(b) SRC Labs, LLC et al v. Amazon Web Services, Inc et al, No. 2:18-cv-
`
`00317-JLR (W.D. Wash.).
`
`IV. INFORMATION CONSIDERED
`14. My opinions are based on my years of education, research, and experience, as
`
`well as my review of the IPR petitions, the materials cited by Microsoft in the IPR
`
`petitions, Dr. Stone’s declaration, and materials cited in Dr. Stone’s declaration. In
`
`forming my opinion, I have considered the materials I identify in this report.
`
`15. I may rely on these materials and additional materials to respond to arguments
`
`raised by the Petitioner. I may also consider additional documents and information as
`
`required to form any necessary opinions in this proceeding, including materials that I
`
`have not yet found or been provided.
`
`
`
`5
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 5
`
`

`

`16. My analysis of the materials is ongoing and I will continue to review any new
`
`material as it is provided. This declaration only represents the opinions I have formed
`
`as of the date I sign it. I reserve the right to revise, supplement, or amend my
`
`opinions as needed based on new material or a new understanding of materials
`
`already considered.
`
`V. LEVEL OF ORDINARY SKILL IN THE ART
`17. I agree with Dr. Stone’s assessment of the level of ordinary skill in the art for
`
`both the 324 patent and 800 patent. I also believe that a person having ordinary skill
`
`in the art (“PHOSITA”) must be experienced in developing with high-level
`
`languages (C and Fortran), hardware description languages, and the unique problems
`
`involved with programming FPGAs and FPGA based systems.
`
`18. I meet all the above criteria so I believe that I am a person of ordinary skill in
`
`the art for both the 324 and 800 patents.
`
`19. I am also familiar with the subject matter of the 324 and 800 patents and I am
`
`also aware of the state of the art at the time the applications for both of these patents
`
`were filed.
`
`VI. RELEVANT LEGAL STANDARDS
`20. I have been asked to provide my opinions regarding whether claims of the 324
`
`and 800 patents are anticipated or rendered obvious to a person of ordinary skill at
`
`the time of the invention in light of the references cited by Microsoft in its Petitions.
`
`
`
`6
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 6
`
`

`

`21. I am not an attorney. In preparing and expressing my opinions I have relied on
`
`certain legal principles that Patent Owner’s counsel has explained to me.
`
`B. Claim Construction
`22. I understand that claim construction is the first step in the validity analysis of a
`
`patent and that claims are construed the same for both validity and infringement.
`
`23. I understand that in an inter partes review proceeding of an unexpired patent
`
`the claims are given their broadest reasonable interpretation in light of the
`
`specification. I understand that this standard is different than the standard applied by
`
`district courts when construing claims. I also understand that Patent Owner is asking
`
`the Board to apply the district court standard to the claims in these proceedings.
`
`24. I believe that the claim terms at issue in these proceedings should be construed
`
`the same way regardless of whether the Board applies the broadest reasonable
`
`interpretation standard or the district court claim construction standard.
`
`25. I have been informed and understand that one of cannons of claim construction
`
`is that the district court must construe the claims as one of ordinary skill in the art in
`
`the relevant field of the invention would, theoretically, construe the claims, and not as
`
`a layperson would construe them.
`
`26. I have also been informed that ascertaining the meaning of the claims requires
`
`that they be viewed in the context of those sources available to the public that show
`
`what a person of skill in the art would have understood disputed claim language to
`
`
`
`7
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 7
`
`

`

`mean. The Federal Circuit has stated that different weights are to be placed on these
`
`sources. First, the words of the claims themselves provide the starting point for any
`
`claim-construction analysis. The second most relevant source is the patent's
`
`specification. Third in importance is the prosecution history, which is also part of the
`
`intrinsic evidence that directly reflects how the patentee has characterized the
`
`invention. Last, extrinsic evidence—testimony, dictionaries, learned treatises, or
`
`other material not part of the public record associated with the patent—also may be
`
`helpful but is less significant than the intrinsic record in determining the legally
`
`operative meaning of claim language.
`
`27. I have also been informed that when determining the “ordinary meaning” a
`
`claim term the use of technical dictionaries or even a standard dictionary, such as
`
`Webster's, is often appropriate. Generally, however, technical dictionaries in the
`
`relevant field should take precedence over general dictionaries.
`
`28. I do believe that the claims at issue in these proceedings should be construed
`
`the same way regardless of whether the Board applies the broadest reasonable
`
`interpretation standard ir the district court claim construction standard.
`
`C. Obviousness
`
`29. I have been informed and understand that under 35 U.S.C. § 103, a patent may
`
`be invalid for obviousness if the differences between the subject matter sought to be
`
`patented and the prior art are such that the subject matter as a whole would have been
`
`
`
`8
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 8
`
`

`

`obvious, at the time the invention was made, to a person having ordinary skill in the
`
`art to which said subject matter pertains. I understand that although it is well settled
`
`that the ultimate determination of obviousness is a question of law, it is also well
`
`understood that there are factual issues underlying the ultimate obviousness decision.
`
`30. I understand that the obviousness analysis is based on four underlying factual
`
`inquiries: (1) the scope and content of the prior art; (2) the differences between the
`
`claims and the prior art; (3) the level of ordinary skill in the pertinent art; and (4)
`
`secondary considerations, if any, of nonobviousness.
`
`31. I understand that to sustain an obviousness challenge against a claim, a
`
`petitioner must show that the combined references must teach or suggest all the
`
`limitations of the challenged claim(s).
`
`32. I understand that to qualify as prior art for an obviousness challenge, the
`
`asserted references must be of the same type of art or of an analogous art as the
`
`challenged patent. I understand that a reference may be “analogous” if it is either (1)
`
`in the same field of endeavor as the challenged patent, or (2) in a different field of
`
`endeavor but is still reasonably pertinent to the particular problem that the challenged
`
`patent solves.
`
`33. I understand that because inventions often involve a combination of known
`
`elements that in hindsight seems preordained, to prevent hindsight invalidation of
`
`patent claims, the law requires some “teaching, suggestion or motivation” to combine
`
`
`
`9
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 9
`
`

`

`cited references. I understand that motivation to combine references may be found in
`
`the cited references themselves, in the knowledge of a PHOSITA at the time of
`
`invention, and in the nature of the problem to be solved.
`
`34. I understand that the Supreme Court has recognized other rationales for
`
`combining references or modifying a reference to show obviousness of claimed
`
`subject matter. Some of these other rationales are: (a) combining prior art elements
`
`according to known methods to yield predictable results; (b) simple substitution of
`
`one known element for another to obtain predictable results; (c) use of a known
`
`technique to improve a similar device (method, or product) in the same way; (d)
`
`applying a known technique to a known device (method, or product) ready for
`
`improvement to yield predictable results; (e) choosing from a finite number of
`
`identified, predictable solutions, with a reasonable expectation of success.
`
`35. I understand that obviousness does not require physical combination/bodily
`
`incorporation, but rather consideration of what the combined teachings would have
`
`suggested to a PHOSITA at the time of the invention.
`
`36. I further understand that an asserted motivation to combine references can be
`
`overcome based on a showing that those references together “teach away” from their
`
`combination. I understand that if the references taken in combination would produce
`
`a “seemingly inoperable device,” such references teach away from the combination
`
`and thus cannot serve as a basis for obviousness.
`
`
`
`10
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 10
`
`

`

`37. I understand that within the framework of an obviousness analysis, it is
`
`impermissible to pick and choose from any one reference only so much of it as will
`
`support a given position to the exclusion of other parts necessary to the full
`
`appreciation of what such reference fairly would have suggested to a PHOSITA.
`
`Thus, a reference must be considered in its entirety, including those portions of the
`
`reference that argue against obviousness.
`
`VII. CLAIM CONSTRUCTION
`38. I understand that the parties have proposed the following competing claim
`
`constructions for the 324 patent:
`
`Claim Term
`
`Functional unit
`
`Computational loop
`
`Instantiate
`
`systolic
`
`Patent Owner’s
`Proposed Construction
`a set of logic that
`performs a specific
`operation
`a sequence of
`computations that is
`repeated until a prescribed
`condition is satisfied
`configure
`
`An array of many
`interconnected functional
`units that operates in a
`data flow sense and
`allows different data to
`flow in different
`directions
`
`Microsoft’s Proposed
`Construction
`A computational unit
`configured to perform a
`specific task
`none
`
`Create, such as by
`configuring, a particular
`structure
`The characteristic of
`rhythmically computing
`and passing data directly
`between processing
`elements “without a
`program counter or
`clock that drives the
`movement of data” and
`operating in a manner
`that is “transport
`
`
`
`11
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 11
`
`

`

`transforming an
`algorithm into a
`calculation that is
`systolically implemented
`by said reconfigurable
`computing system at the
`at least one
`reconfigurable processor
`pass computed data
`seamlessly between said
`computational loops
`
`stream communication
`
`Clusters of functional
`units
`Wherein systolically
`linked lines of code of
`said calculation are
`instantiated as clusters of
`functional units
`Data dimensions
`
`Manually or
`automatically converting
`a serial algorithm
`originally written in a
`high-level language into
`a systolic data flow
`bitstream loaded into a
`reconfigurable processor
`communicating the
`computed data over the
`reconfigurable routing
`resources between said
`computational loops
`a data path that acts like a
`queue between a
`producer and a consumer
`of data that operate
`concurrently
`None
`
`None
`
`None
`
`triggered, i.e., by the
`arrival of a data object”
`Compiling an algorithm
`into configuration code
`representing
`computations that
`process data in a systolic
`fashion
`
`to communicate
`computed data directly
`between functional units
`that are calculating
`computational loops
`Communication of a data
`sequence
`
`Groups of functional
`units
`Wherein groups of
`functional units are
`configured to execute
`lines of code in a systolic
`fashion
`Multiple vectors of a
`problem, multiple planes
`of a problem, multiple
`time steps in a problem
`and so forth
`
`39. I understand the parties have proposed the following competing claim
`
`
`
`constructions for the 800 patent:
`
`Claim Term
`
`Patent Owner’s
`Proposed Construction
`
`Microsoft’s Proposed
`Construction
`
`
`
`12
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 12
`
`

`

`Functional unit
`
`Computational loop
`
`Form
`
`Data driven
`
`transforming an
`algorithm into a data
`driven calculation that is
`implemented by said
`reconfigurable
`computing system at the
`at least one
`reconfigurable processor
`pass computed data
`seamlessly between said
`computational loops
`
`stream communication
`
`Clusters of functional
`units
`Wherein systolically
`linked lines of code of
`said calculation are
`instantiated as clusters of
`functional units
`
`a set of logic that
`performs a specific
`operation
`a sequence of
`computations that is
`repeated until a prescribed
`condition is satisfied
`configure
`
`Computation triggered by
`the availability of input
`data
`
`Manually or
`automatically converting
`a serial algorithm
`originally written in a
`high-level language into
`a data flow bitstream
`loaded into a
`reconfigurable processor
`communicating the
`computed data over the
`reconfigurable routing
`resources between said
`computational loops
`a data path that acts like a
`queue between a
`producer and a consumer
`of data that operate
`concurrently
`None
`
`None
`
`A computational unit
`configured to perform a
`specific task
`none
`
`Create, such as by
`configuring, a particular
`structure
`The scheduling of
`operations upon the
`availability of their
`operands
`Compiling an algorithm
`into configuration code
`representing
`computations that
`process data in a data
`driven fashion
`
`to communicate
`computed data directly
`between functional units
`that are calculating
`computational loops
`Communication of a data
`sequence
`
`Groups of functional
`units
`Wherein groups of
`functional units are
`configured to execute
`lines of code in a systolic
`fashion
`
`
`
`13
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 13
`
`

`

`Data dimensions
`
`None
`
`Data mining
`
`None
`
`Multiple vectors of a
`problem, multiple planes
`of a problem, multiple
`time steps in a problem
`and so forth
`
`
`40. I agree with the construction proposed by Patent Owner as they reflect my
`
`
`
`understanding of those terms as they are generally used and in the context of the 324
`
`and 800 patents. My opinions herein are based on my application of the Patent
`
`Owner’s proposed claim constructions unless otherwise stated.
`
`VIII. MICROSOFT HAS NOT SHOWN THAT CLAIMS 8 AND 9 ARE
`OBVIOUS UNDER SPLASH2 IN VIEW OF RAPID, WITH OR
`WITHOUT GAUDIOT
`
`41. Microsoft has asserted identical arguments concerning the unpatentability of
`
`claims 8 and 9 of both the 324 and 800 patent under Splash2 in view of RaPiD, with
`
`or without Gaudiot in the Petitions in IPR2018-01601 and IPR2018-01605 so I will
`
`address these argument together here for efficiency.
`
`42. Microsoft identifies annotated Figure 10 from the RaPiD reference as
`
`disclosing both first and second “computational loop” elements in claims 8 and 9.
`
`IPR2018-01601, Petition at 63; IPR2018-01605, Petition at 64-65. The Petition does
`
`not explain why Microsoft believes Figure 10 depicts a “computational loop.”
`
`43. Dr. Stone’s declaration also includes the annotated Figure 10 (but does not
`
`indicate who annotated it), which is shown below. IPR2018-01601, EX. 1003 at 181;
`
`IPR2018-01605, EX. 1003 at 174.
`
`
`
`14
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 14
`
`

`

`
`
`44. The yellow path in RaPid Figure 10 that Dr. Stone identifies as a
`
`“computational loop” is actually what is commonly called a bypass or forwarding
`
`path. EX. 2045 at 301.
`
`45. The purpose of a forwarding path is to support back to back execution of
`
`operations without stall, by forwarding (or bypassing) the output of an ALU to an
`
`input of the same or other ALU (in this instance it is the same ALU) for back to back
`
`operation without adding any stall. EX. 2045 at 301; EX. 2046 at 6 (“Data bypass
`
`logic is responsible for forwarding result values from completing instruction to
`
`dependent instruction, bypassing the register file.”). Register file is a memory
`
`component. A forwarding path is depicted in Figure 4.56 in blue below from page
`
`311 of EX. 2045:
`
`
`
`15
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 15
`
`

`

`
`
`46. The concept of bypass path has been a concept well-known in computer
`
`architecture long before the 324 patents filing date of October 31, 2002. For example,
`
`the paper “Complexity-Effective Superscalar Processors” that was published in 1997
`
`describes bypass logic as one of the basic structures in computer microarchitecture.
`
`EX. 2046 at 2, 6-7.
`
`47. It is my opinion that the data path (in yellow) identified by Dr. Stone in Figure
`
`10 is clearly a forwarding (or alternatively bypass) path, not a “computational loop”
`
`as that term is used in the 324 and 800 patents.
`
`48. Accordingly, it is my opinion that Microsoft has not demonstrated that claims
`
`8 and 9 of the 324 and 800 patent are obvious under Splash2 in view of rapid, with or
`
`Without Gaudiot.
`
`
`
`16
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2029, p. 16
`
`

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