Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 1 of 24
`
`THE HONORABLE JAMES L. ROBART
`
`UNITED STATES DISTRICT COURT
`WESTERN DISTRICT OF WASHINGTON
`AT SEATTLE
`
`SRC LABS, LLC & SAINT REGIS
`MOHAWK TRIBE,
`
`Plaintiffs,
`
`v.
`
`AMAZON WEB SERVICES, INC., AMA-
`ZON.COM, INC.,
`& VADATA INC.
`
`Defendants.
`
`SRC LABS, LLC & SAINT REGIS
`MOHAWK TRIBE,
`
`Plaintiffs,
`
`v.
`
`MICROSOFT CORPORATION,
`
`Defendant.
`
`Case No.: 2:18-cv-00317-JLR
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`
`JURY TRIAL DEMANDED
`
`Case No.: 2:18-cv-00321-JLR
`
`JURY TRIAL DEMANDED
`
`Plaintiffs SRC Labs, LLC & Saint Regis Mohawk Tribe (collectively, “SRC”), Defendants
`
`Amazon Web Services, Inc., Amazon.com, Inc., and VADATA Inc. (collectively “Amazon”) and
`
`Defendant Microsoft Corp. (“Microsoft”) submit this Joint Claim Chart and Prehearing Statement
`
`per Local Patent Rule 132, the Court’s Standing Order for Patent Cases, the Court’s May 23, 2018
`
`Order consolidating SRC Labs, LLC v. Amazon Web Servs. Inc., No. 2:18-cv-00317-JLR (“the
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 1 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
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`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 1
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 2 of 24
`
`Amazon case”) and SRC Labs, LLC v. Microsoft Corporation, No.: 2:18-cv-00321-JLR (“the Mi-
`
`crosoft case”) for a Markman hearing and Markman-related pretrial matters (Dkt. 961), and the
`
`Court’s October 23, 2018 Order Modifying the Claim Construction Schedule (Dkt. 110).
`
`SRC asserts four patents against Amazon and six patents against Microsoft. Two of the
`
`patents—U.S. Patent No. 7,225,324 (the “’324 patent”) and U.S. Patent No. 7,620,800 (the “’800
`
`patent”)—are asserted against both Amazon and Microsoft. The remaining two patents that SRC
`
`asserts against Amazon are U.S. Patent No. 7,149,867 (the “’867 patent”) and U.S. Patent No.
`
`9,153,311 (the “’311 patent”). The remaining four patents that SRC asserts against Microsoft are
`
`U.S. Patent Nos. 6,434,687 (the “’687 patent”), 6,076,152 (the “’152 patent”), 6,247,110 (the
`
`“’110 patent”), and 7,421,524 (the “’524 patent”).
`
`I. SRC’S ALLEGATIONS OF INFRINGEMENT
`
`A.
`
`Against Amazon
`
`The table below identifies each claim of each patent-in-suit that SRC asserts in the Amazon
`
`case, and each apparatus, product, device, process, method, act, or other instrumentality that SRC
`
`accuses of infringing each asserted claim:
`
`Patent
`Number
`
`Asserted
`Claims
`
`7,149,867
`
`1, 3, 4
`
`7,225,324
`
`1, 17
`
`Applicable
`subsection
`of § 271
`
`§271(a)
`
`§271(b)
`
`7,620,800
`
`1, 17
`
`§271(b)
`
`Accused Devices
`
`EC2 F1 Instance
`
`Zebra and other similar applications designed to
`run on EC2 F1 Instance
`
`Zebra and other similar applications designed to
`run on EC2 F1 Instance
`
`9,153,311
`
`1, 3, 9, 10
`
`§271(a)
`
`EC2 F1 Instance
`
`SRC believes each claim limitation is literally present in the accused devices. Amazon
`
`denies that it infringes any valid and enforceable claim directly or indirectly, literally or otherwise.
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`1 2 3 4 5 6 7 8 9
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`10
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`11
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`12
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`13
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`14
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`15
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`16
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`17
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`18
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`19
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`20
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`21
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`22
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`25
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`26
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`1 Unless otherwise indicated, docket citations refer to the docket number in SRC Labs, LLC v.
`Amazon Web Servs. Inc., No. 2:18-cv-00317-JLR.
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`- 2 -
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 2
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 3 of 24
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`B.
`
`Against Microsoft
`
`The table below identifies each claim of each patent in suit that Plaintiffs allege Microsoft
`
`is infringing, each accused apparatus, product, device, process, method, act, or other instrumental-
`
`ity accused of infringing each asserted claim, including for each claim the applicable statutory
`
`subsections of 35 U.S.C. § 271 asserted:
`
`Asserted
`Patent
`Claims
`Number
`6,076,152 1-7, 11, 12, 15,
`21
`
`Applicable
`subsection
`of § 271
`§271(a)
`
`6,247,110 1-7, 11, 12, 15,
`21
`
`§271(a)
`
`6,434,687 1-5, 10-13, 18,
`25
`7,225,324 1, 8, 9, 17, 18,
`21, 22, 23
`
`§271(a)
`
`§271(a)
`
`Accused Devices
`
`Catapult v2 (Pikes Peak, Storey Peak), Catapult v3
`(Dragontail Peak, Longs Peak, Nicholas Peak2),
`Catapult v4 (Storm Peak3).
`Catapult v2 (Pikes Peak, Storey Peak), Catapult v3
`(Dragontail Peak, Longs Peak, Nicholas Peak4),
`Catapult v4 (Storm Peak5).
`Bing (Ranking, Selection, DNN, CNN).
`
`7,421,524 1, 2, 13, 15
`
`§271(a)
`
`7,620,800 1, 8, 9, 17, 18,
`21, 22, 23
`
`§271(a)
`
`Bing (Ranking, Selection, DNN, CNN), Brain-
`wave, Azure Accelerated Networking, Compres-
`sion (Xpress9 Level 6, Express8 Level 5), decom-
`pression, JPEG & video compression; LZ77 data
`compression, all applications running on the role or
`soft-shell portion of an FPGA in a Catapult Board.
`Catapult v2 (Pikes Peak, Storey Peak), Catapult v3
`(Dragontail Peak, Longs Peak, Nicholas Peak), Cat-
`apult v4 (Storm Peak).
`Bing (Ranking, Selection, DNN, CNN), Brain-
`wave, Azure Accelerated Networking, Compres-
`sion (Xpress9 Level 6, Express8 Level 5), decom-
`pression, JPEG & video compression; LZ77 data
`compression, all applications running on the role or
`soft-shell portion of an FPGA in a Catapult Board.
`Plaintiffs contend that each claim limitation is literally present in the Accused Devices. To
`
`the extent certain elements are not found to be literally present in the Accused Devices, and de-
`
`pending on the Court’s construction, Plaintiffs contend the following elements may also be present
`
`2 Only accused to the extent it was deployed before December 17, 2017.
`3 Only accused to the extent it was deployed before December 17, 2017.
`4 Only accused to the extent it was deployed before December 17, 2017.
`5 Only accused to the extent it was deployed before December 17, 2017.
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 3 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
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`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 3
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 4 of 24
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`under the doctrine of equivalents:
`
`Patent Number Claim
`6,076,152
`1, 3, 11
`6,247,110
`1, 3, 11
`6,076,152
`1, 11
`6,247,110
`1, 11
`7,421,524
`1, 15
`
`Term
`Memory bank
`Memory bank
`Memory addressable
`Memory addressable
`Memory module bus
`
`Copies of the eight patents in suit are attached as Exhibits A-H and excerpts from the file
`
`histories are attached as Exhibits I-P, which are shown in the Table Below:
`
`Exhibit A:
`
`Exhibit B:
`
`Exhibit C:
`
`Exhibit D:
`
`Exhibit E:
`
`Exhibit F:
`
`Exhibit G:
`
`Exhibit H:
`
`Exhibit I:
`
`Exhibit J:
`
`Exhibit K:
`
`Exhibit L:
`
`Exhibit M:
`
`Exhibit N:
`
`Exhibit O:
`
`Exhibit P:
`
`U.S. Patent No. 6,247,110
`
`U.S. Patent No. 6,076,152
`
`U.S. Patent No. 9,153,311
`
`U.S. Patent No. 7,225,324
`
`U.S. Patent No. 7,421,524
`
`U.S. Patent No. 6,434,687
`
`U.S. Patent No. 7,620,800
`
`U.S. Patent No. 7,149,867
`
`‘110 File History (excerpted pages)
`
`‘152 File History (excerpted pages)
`
`‘311 File History (excerpted pages)
`
`‘324 File History (excerpted pages)
`
`‘524 File History (excerpted pages)
`
`‘687 File History (excerpted pages)
`
`‘800 File History (excerpted pages)
`
`‘867 File History (excerpted pages)
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`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 4 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 4
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 5 of 24
`
`II. AMAZON’S ALLEGATIONS OF INVALIDITY
`
`Amazon contends that all asserted claims of each of the patents that SRC asserts against
`
`Amazon—the ’324 patent, the ’800 patent, the ’867 patent, and the ’311 patent—are invalid. The
`
`table below identifies the claims that Amazon alleges are invalid. Amazon served Invalidity Con-
`
`tentions served on July 9, 2018 and Amended Invalidity Contentions served on October 3, 2018.
`
`Included in the table below are the bases of the alleged invalidity and the relevant prior art as
`
`provided in those Contentions:
`
`Patent Claims Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`’324
`patent
`
`1, 17
`
`The claims are invalid
`under 35 U.S.C. §§ 102,
`103, 112 as anticipated,
`obvious, indefinite, and
`lacking written descrip-
`tion and/or enablement.
`
`•
`
`6,438,747 B1
`
`Patent No.
`• U.S.
`(“Schreiber”)
`• U.S. Patent No. 5,361,367 (“Fijany”)
`• U.S. Patent No. 7,139,743 B2 (“Indeck”)
`• U.S. Patent No. 6,675,187 B1 (“Green-
`berger”)
`“Building and Using a Highly Parallel Pro-
`grammable Logic Array,” Gokhale et al.,
`January 1991 (“Splash”)
`• An FPGA Implementation of Walsh-
`Hadamard Transforms for Signal Pro-
`cessing,” A. Amira et al., 2001 (“Amira”)
`• U.S. Patent No. 5,757,959 (“Lopresti”)
`• U.S. Patent No. 4,698,751 (“Parvin”)
`“Artificial Neural Network Implementa-
`•
`tion on a single FPGA of a Pipelined On-
`Line Backpropagation,” R. Gadea et al,
`Proceedings of International Symposium
`on Systems Synthesis, 2000 (“Gadea”)
`“Searching Genetic Databases on Splash
`2,” D. Hoang, 1993 (“Hoang”)
`“Mapping Nested Loops to Field Pro-
`grammable Gate Array Based Systems,”
`J. Spillane and J.S.N. Jean, NAECON
`1995 (“Spillane”)
`“Splash 2: FPGAs in a Custom Compu-
`ting Machine,” D.A. Buell et al., 1996
`(“Buell”)
`
`•
`
`•
`
`•
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 5 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
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`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 5
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 6 of 24
`
`Patent Claims Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`•
`
`“Evaluation of the Streams-C C-to-FPGA
`Compiler: An Applications Perspective,”
`J. Frigo et al., February 11-13, 2001
`(“Streams-C”)
`“PCI-based WILDFIRE Reconfigurable
`Computing Engines,” by B. K. Fross et
`al., October 21, 1996 (“Fross”)
`
`’800
`patent
`
`1, 17
`
`The claims are invalid
`under 35 U.S.C. §§ 102,
`103, 112 as anticipated,
`obvious, indefinite, and
`lacking written descrip-
`tion and/or enablement.
`
`•
`
`•
`
`•
`
`• U.S. Patent No. 5,361,367 (“Fijany”)
`• U.S. Patent No. 7,139,743 B2 (“Indeck”)
`Patent No.
`6,438,747 B1
`• U.S.
`(“Schreiber”)
`• U.S. Patent No. 6,675,187 B1 (“Green-
`berger”)
`“Building and Using a Highly Parallel Pro-
`grammable Logic Array,” Gokhale et al.,
`January 1991 (“Splash”)
`• An FPGA Implementation of Walsh-
`Hadamard Transforms for Signal Pro-
`cessing,” A. Amira et al., 2001 (“Amira”)
`• U.S. Patent No. 5,757,959 (“Lopresti”)
`• U.S. Patent No. 4,698,751 (“Parvin”)
`“Artificial Neural Network Implementa-
`•
`tion on a single FPGA of a Pipelined On-
`Line Backpropagation,” R. Gadea et al,
`Proceedings of International Symposium
`on Systems Synthesis, 2000 (“Gadea”)
`“Searching Genetic Databases on Splash
`2,” D. Hoang, 1993 (“Hoang”)
`“Mapping Nested Loops to Field Pro-
`grammable Gate Array Based Systems,”
`J. Spillane and J.S.N. Jean, NAECON
`1995 (“Spillane”)
`“Splash 2: FPGAs in a Custom Compu-
`ting Machine,” D.A. Buell et al., 1996
`(“Buell”)
`“Evaluation of the Streams-C C-to-FPGA
`Compiler: An Applications Perspective,”
`J. Frigo et al., February 11-13, 2001
`(“Streams-C”)
`“PCI-based WILDFIRE Reconfigurable
`Computing Engines,” by B. K. Fross et
`al., October 21, 1996 (“Fross”)
`
`•
`
`•
`
`•
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`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 6 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 6
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 7 of 24
`
`Patent Claims Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`’311
`patent
`
`1, 3, 9,
`10
`
`The claims are invalid
`under 35 U.S.C. §§ 102,
`103, 112 as anticipated,
`obvious, and indefinite.
`
`• U.S. Patent Application Publication No.
`2004/0034732 A1 (“Valin”)
`• U.S. Patent Application Publication No.
`2003/0200382 A1 (“Wells”)
`• U.S. Patent No. 6,119,200 (“George”)
`• U.S. Patent Application Publication No.
`2014/0043918 A1 (“Ellis”)
`• External Memory Interface Handbook
`Volume 3: Section III. DDR2 and DDR3
`SDRAM Controller with UniPHY User
`• Guide, Altera, June 2011 (“UniPHY”)
`• DDR2SOFT DDR2 Memory Controller
`VHDL
`Source
`Code
`Overview,
`ComBlock,
`September
`22,
`2010
`(“ComBlock”)
`• Atria DDR I/II DRAM Controller Core,
`Atria Logic Inc., 2009 (“Atria”)
`• Xilinx MIG Spartan-6 MCB (“Spartan-6”)
`• U.S. Patent No. 8,683,166 B1 (“Flateau”)
`• ZedBoard System with Zync-7000 Proces-
`sor (“ZedBoard + Zynq”)
`• U.S. Patent Application Publication No.
`2011/0264934 A1 (“Branover”)
`“System- and application-level support for
`runtime hardware reconfiguration on SoC
`platforms,” Syrivelis et al., 2006 (“Syriv-
`elis”)
`• U.S. Patent No. 7,836,331 B1 (“Totolos”)
`“SUZAKU Hardware Manual,” Atmark
`•
`Techno, Inc., December 14, 2004 (“SU-
`ZAKU”)
`• U.S. Patent No. 8,476,926 B2 (“Brun-
`ham”)
`“JEDEC Standard,” JEDEC Solid State
`Technology Association, November 2008
`(“JEDEC”)
`
`•
`
`•
`
`’867
`patent
`
`1, 3, 4
`
`The claims are invalid
`under 35 U.S.C. §§ 102,
`103, 112 as anticipated,
`obvious, and indefinite.
`
`• U.S. Patent No. 6,822,959 B2 (“Galbi”)
`• U.S. Patent No. 7,055,016 B2 (“Phelps”)
`“Memory Access Schemes for Configura-
`•
`ble Processors,” H. Lange and A. Koch,
`FPL 2000: Field-Programmable Logic and
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 7 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
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`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 7
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 8 of 24
`
`Patent Claims Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`Applications: The Roadmap to Reconfigu-
`rable Computing, 2000 (“Lange”)
`“Architectural Adaptation for Application-
`Specific Locality Optimizations,” Xingbin
`Zhang et al., International Conference on
`Computer Design VLSI in Computers and
`Processors, 1997 (“Zhang”)
`Patent No.
`6,662,285 B1
`• U.S.
`(“Douglass”)
`• U.S. Patent No. 6,981,099 B2 (“Paulraj”)
`“An FPGA Implementation of Triangle
`•
`Mesh Decompression,” by Tulika Mitra
`(“Mitra”)
`• U.S. Patent No. 6,182,206 B1 (“Baxter”)
`
`III. MICROSOFT’S ALLEGATIONS OF INVALIDITY
`
`Microsoft contends that all asserted claims of each of the patents that SRC asserts against
`
`Microsoft—the ’152 Patent, the ’110 patent, the ’324 patent, the ’800 patent, the ’687 patent, and
`
`the ’524 patent—are invalid. The table below identifies the claims that Microsoft alleges are in-
`
`valid, along with the bases of the alleged invalidity and the relevant prior art:
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`’152
`patent
`
`1-7, 11, 12,
`15, 18, 21
`
`The claims are invalid
`under
`35 U.S.C.
`§§ 101, 102, 103, 112
`as directed to an ab-
`stract
`idea, antici-
`pated, obvious, indef-
`inite,
`and
`lacking
`written
`description
`and/or enablement.
`
`• US Patent No. 5,574,930 to Halverson et
`al. (issued November 12, 1996).
`• Halverson, Richard Peyton, Jr., Ph.D, The
`Functional Memory Approach to the De-
`sign of Custom Computing Machines, Au-
`gust 1994.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the machine described in the two refer-
`ences cited above.
`• U.S. Patent No. 5,678,021 by Pawate et al.
`(issued October 14, 1997).
`• U.S. Patent No. 6,185,704 by Pawate et al.
`(issued February 6, 2001, provisional filed
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 8 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
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`14
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`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 8
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 9 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`•
`
`April 11, 1997).
`“YARDS: FPGA/MPU Hybrid Architec-
`ture for Telecommunication Data Pro-
`cessing” Tsutsui et al.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the YARDS and/or ANT devices de-
`scribed in the reference cited above.
`• U.S. Patent No. 6,470,380 by Yoshizawa
`et al. (issued October 22, 2002, filed Octo-
`ber 21, 1997).
`“Splash 2: FPGAs in a custom Computing
`Machine,” D.A. Buell, J. M. Arnold, and
`W. J. Kleinfelder, IEEE Computer Society,
`1996.
`• The pre-critical date or pre-invention date,
`public knowledge, offer for sale, sale or
`prior invention of any version of the Splash
`2 system described in the reference cited
`above.
`• Prism II: “PRISM-II Compiler and Archi-
`tecture,” M. Wazlowski et al., in Proceed-
`ings of the IEEE Workshop on FPGAs for
`Custom Computing Machines. 5-7 April,
`1993.
`• The pre-critical date or pre-invention date
`pubic use, public knowledge, offer for sale,
`sale or prior invention of any version of the
`PRISM-II system described in the refer-
`ence cited above.
`• U.S. Patent No. 5,671,355 to Collins (is-
`sued September 23, 1997).
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the Collins system described in the ref-
`erence cited above.
`• U.S. Patent No. 5,835,734 to Alkalaj (is-
`sued November 10, 1998).
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 9 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 9
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 10 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`of the Alkalaj system described in the ref-
`erence cited above
`“Programmable Active Memories: Recon-
`figurable Systems Come of Age” by Vuil-
`lemin et al. (“Vuillemin”)
`
`’110
`patent
`
`1-7, 11, 12,
`15, 18, 21
`
`The claims are invalid
`under
`35 U.S.C.
`§§ 101, 102, 103, 112
`as directed to an ab-
`stract
`idea, antici-
`pated, obvious, indef-
`inite,
`and
`lacking
`written
`description
`and/or enablement.
`
`•
`
`• US Patent No. 5,574,930 to Halverson et
`al. (issued November 12, 1996).
`• Halverson, Richard Peyton, Jr., Ph.D, The
`Functional Memory Approach to the De-
`sign of Custom Computing Machines, Au-
`gust 1994.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the machine described in the two refer-
`ences cited above.
`• U.S. Patent No. 5,678,021 by Pawate et al.
`(issued October 14, 1997).
`• U.S. Patent No. 6,185,704 by Pawate et al.
`(issued February 6, 2001, provisional filed
`April 11, 1997).
`“YARDS: FPGA/MPU Hybrid Architec-
`ture for Telecommunication Data Pro-
`cessing” Tsutsui et al.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the YARDS and/or ANT devices de-
`scribed in the reference cited above.
`• U.S. Patent No. 6,470,380 by Yoshizawa
`et al. (issued October 22, 2002, filed Octo-
`ber 21, 1997).
`“Splash 2: FPGAs in a custom Computing
`Machine,” D.A. Buell, J. M. Arnold, and
`W. J. Kleinfelder, IEEE Computer Society,
`1996.
`• The pre-critical date or pre-invention date,
`public knowledge, offer for sale, sale or
`prior invention of any version of the Splash
`2 system described in the reference cited
`above.
`
`•
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 10 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 10
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 11 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`• Prism II: “PRISM-II Compiler and Archi-
`tecture,” M. Wazlowski et al., in Proceed-
`ings of the IEEE Workshop on FPGAs for
`Custom Computing Machines. 5-7 April,
`1993.
`• The pre-critical date or pre-invention date
`pubic use, public knowledge, offer for sale,
`sale or prior invention of any version of the
`PRISM-II system described in the refer-
`ence cited above.
`• U.S. Patent No. 5,671,355 to Collins (is-
`sued September 23, 1997).
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the Collins system described in the ref-
`erence cited above.
`• U.S. Patent No. 5,835,734 to Alkalaj (is-
`sued November 10, 1998).
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the Alkalaj system described in the ref-
`erence cited above
`“Programmable Active Memories: Recon-
`figurable Systems Come of Age” by Vuil-
`lemin et al. (“Vuillemin”)
`
`•
`
`•
`
`’324
`patent
`
`1, 8, 9, 17,
`18, 21, 22,
`23
`
`The claims are invalid
`under
`35 U.S.C.
`§§ 101, 102, 103, 112
`as directed to an ab-
`stract
`idea, antici-
`pated, obvious, indef-
`inite,
`and
`lacking
`written
`description
`and/or enablement.
`
`“Splash 2: FPGAs in a custom Computing
`Machine,” D.A. Buell, J. M. Arnold, and
`W. J. Kleinfelder, IEEE Computer Society,
`1996.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the Splash 2 system described in the ref-
`erence cited above.
`“Evaluation of the Streams-C C-to-FPGA
`Compiler: An Applications Perspective,”
`J. Frigo et al., in Proceedings of the Asso-
`ciation for Computing Machinery (ACM),
`February 11-13, 2001.
`“PCI-based WILDFIRE Reconfigurable
`Computing Engines,” B. K. Fross et al., in
`
`•
`
`•
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 11 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 11
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 12 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`Proceedings of the International Society
`for Optics and Photonics (SPIE) Vol. 2914,
`October 21, 1996.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the WILDFIRE system described in the
`reference cited above.
`• U.S. Patent No. 6,182,206,“Dynamically
`Reconfigurable Computing using a Pro-
`cessing Unit Having Changeable Internal
`Hardware Organization,” filed February
`26, 1998; priority date April 17, 1995.
`“REMARC: Reconfigurable Multimedia
`Array Coprocessor,” T. Miyamori and K.
`Olukotun, in IEICE Transactions on Infor-
`mation and Systems E82-D, Volume 82,
`pages 389-397, 1998.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the REMARC system described in the
`reference cited above.
`“Computing Multidimensional DFTs Us-
`ing Xilinx FPGAs,” C. Dick, in Proceed-
`ings of the 8th International Conference on
`Signal Processing Applications and Tech-
`nology, September 13-16, 1998
`“The Fast Fourier Transform on a Recon-
`figurable Processor,” G. Donohoe, J. Pur-
`viance, and P. Yeh, in Proceedings of the
`NASA Earth Sciences Technology Con-
`ference, June 11-13, 2002.
`• U.S. Patent No. 6,883,084 (issued on April
`19, 2005, provisional filed July 25, 2001).
`• Mapping Applications to the RaPiD Con-
`figurable Architecture to C. Ebeling et al.
`• Data-Driven Multicomputers to J. Gau-
`diot
`• Automated Target Recognition on Splash
`2, Rencher, et al.
`
`•
`
`•
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 12 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 12
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 13 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`• Development of a parallel molecular dy-
`namics code on SIMD Computers: Algo-
`rithm for use of pair list criterion to Roc-
`catano, et al.
`
`•
`
`’800
`patent
`
`1, 8, 9, 17,
`18, 21, 22,
`23
`
`The claims are invalid
`under
`35 U.S.C.
`§§ 101, 102, 103, 112
`as directed to an ab-
`stract
`idea, antici-
`pated, obvious, indef-
`inite,
`and
`lacking
`written
`description
`and/or enablement.
`
`“Splash 2: FPGAs in a custom Computing
`Machine,” D.A. Buell, J. M. Arnold, and
`W. J. Kleinfelder, IEEE Computer Society,
`1996.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the Splash 2 system described in the ref-
`erence cited above.
`“Evaluation of the Streams-C C-to-FPGA
`Compiler: An Applications Perspective,”
`J. Frigo et al., in Proceedings of the Asso-
`ciation for Computing Machinery (ACM),
`February 11-13, 2001.
`“PCI-based WILDFIRE Reconfigurable
`Computing Engines,” B. K. Fross et al., in
`Proceedings of the International Society
`for Optics and Photonics (SPIE) Vol. 2914,
`October 21, 1996.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the WILDFIRE system described in the
`reference cited above.
`• U.S. Patent No. 6,182,206,“Dynamically
`Reconfigurable Computing using a Pro-
`cessing Unit Having Changeable Internal
`Hardware Organization,” filed February
`26, 1998; priority date April 17, 1995.
`“REMARC: Reconfigurable Multimedia
`Array Coprocessor,” T. Miyamori and K.
`Olukotun, in IEICE Transactions on Infor-
`mation and Systems E82-D, Volume 82,
`pages 389-397, 1998.
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale or prior invention of any version
`of the REMARC system described in the
`
`•
`
`•
`
`•
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 13 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 13
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 14 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`•
`
`reference cited above.
`“Computing Multidimensional DFTs Us-
`ing Xilinx FPGAs,” C. Dick, in Proceed-
`ings of the 8th International Conference on
`Signal Processing Applications and Tech-
`nology, September 13-16, 1998
`“The Fast Fourier Transform on a Recon-
`figurable Processor,” G. Donohoe, J. Pur-
`viance, and P. Yeh, in Proceedings of the
`NASA Earth Sciences Technology Con-
`ference, June 11-13, 2002.
`• U.S. Patent No. 6,883,084 (issued on April
`19, 2005, provisional filed July 25, 2001).
`• Mapping Applications to the RaPiD Con-
`figurable Architecture to C. Ebeling et al.
`• Data-Driven Multicomputers to J. Gau-
`diot
`• Automated Target Recognition on Splash
`2, Rencher, et al.
`• Development of a parallel molecular dy-
`namics code on SIMD Computers: Algo-
`rithm for use of pair list criterion to Roc-
`catano, et al.
`
`’687
`patent
`
`1-5, 10-13,
`18, 25
`
`The claims are invalid
`under
`35 U.S.C.
`§§ 101, 102, 103, 112
`as directed to an ab-
`stract
`idea, antici-
`pated, obvious, indef-
`inite,
`and
`lacking
`written
`description
`and/or enablement.
`
`•
`
`“The Architecture of the Obelix - An Im-
`proved
`Internet Search Engine,” P.
`Knezevic et al., Naval Postgraduate
`School, Proceedings of the 33rd Annual
`Hawaii International Conference on Sys-
`tem Sciences (HICSS) Jan. 4-7, 2000,
`Maui, HI, USA, pp. 2145-2155
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale, or prior invention or, or deriva-
`tion from, of any version of the Obelix sys-
`tem described in the three references cited
`above.
`• U.S. Patent No. 6,326,806 H. Fallside et al.
`(issued December 4, 2001, filed March 29,
`2000).
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale, or prior invention of any version
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 14 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 14
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 15 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`•
`
`•
`
`of the Fallside system described in the ref-
`erence cited above.
`“A Web Based Multiuser Operating Sys-
`tem for Reconfigurable Computing,” to O.
`Diessel et al. in Proceedings of the Associ-
`ation for Computing Machinery (ACM),
`published during a conference held on
`April 12-16, 1999
`• The pre-critical date or pre-invention date
`public use, public knowledge, offer for
`sale, sale, or prior invention of any version
`of the Space 2 system described in the ref-
`erence above.
` “Networking Requirements and Solutions
`for a TV WWW Browser,” to T. David et
`al., submitted to the Virginia Polytechnic
`Institute and State University on Septem-
`ber 17, 1997
`• U.S. Patent No. 6,370,527 to A. Singhal et
`al. (issued April 9, 2002, filed December
`29, 1998)
`• U.S. Patent No. 6,795,448 to P. Lee et al.
`(issued September 21, 2004, filed March 2,
`2000)
`• U.S. Patent No. 5,887,165 to S. Martel et
`al. (issued March 23, 1999)
`• U.S. Patent No. 6,101,180 to P. Donahue
`et al. (issued August 8, 2000)
`• U.S. Patent No. 5,870,769 to Y. Freund (is-
`sued February 9, 1999)
`• A press release entitled “Xilinx Unveils In-
`ternet Reconfigurable Logic,” (“Xilinx
`Press Release”), published on November
`10, 1998.
`“An Open Platform for Development of
`Network Processing Modules in Repro-
`grammable Hardware,” to J. Lockwood in
`IEC DesignCon 2001 (“FPX”), published
`during a conference held in January of
`2001.
`• A dynamic reconfiguration run-time sys-
`tem to J. Burns et al.
`• U.S. Patent No. 7,072,888 to A. Perkins
`
`•
`
`JOINT CLAIM CHART AND
`PREHEARING STATEMENT
`CASE NO. 2:18-CV-00317-JLR
`
`- 15 -
`
`KELLER ROHRBACK L.L.P.
`1201 THIRD AVENUE, SUITE 3200
`SEATTLE, WA 98101-3052
`TELEPHONE: (206) 623-1900
`FACSIMILE: (206) 623-3384
`
`1 2 3 4 5 6 7 8 9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`Patent Owner Saint Regis Mohawk Tribe
`Ex. 2041, p. 15
`
`

`

`Case 2:18-cv-00321-JLR Document 128 Filed 11/01/18 Page 16 of 24
`
`Patent Claims
`
`Bases of Invalidity
`
`Relevant Prior Art Under §§ 102, 103
`
`(issued July 4, 2006, filed June 16, 1999).
`• U.S. Patent No. 6,230,307 to