THE HONORABLE JAMES L. ROBART
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF WASHINGTON
`AT SEATTLE
`
`SRC LABS, LLC & SAINT REGIS
`MOHAWK TRIBE,
`
` Plaintiffs,
`
` v.
`
`MICROSOFT CORPORATION,
`
` Defendant.
`
`CASE NO. 2:18-cv-00321-JLR
`
`PLAINTIFFS’ PRELIMINARY CLAIM
`CONSTRUCTIONS
`
`JURY TRIAL DEMANDED
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 1
`
`
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF WASHINGTON
`AT SEATTLE
`
`SRC LABS, LLC & SAINT REGIS
`MOHAWK TRIBE,
`
` Plaintiffs,
`
` v.
`
`MICROSOFT CORPORATION,
`
` Defendant.
`
`CASE NO. 2:18-cv-00321-JLR
`
`PLAINTIFFS’ PRELIMINARY CLAIM
`CONSTRUCTIONS
`
`JURY TRIAL DEMANDED
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 1
`
`
`
`Per Local Patent Rule 131, attached as Exhibit A are Plaintiffs’ preliminary
`
`proposed constructions for each claim term, phrase, or clause that the parties have identified
`
`for claim construction purposes. Also included in Exhibit A are Plaintiffs’ preliminary
`
`identification of extrinsic evidence. Plaintiffs’ expressly reserve the right to modify or amend
`
`their proposed construction and add extrinsic evidence based on (1) Microsoft’s proposed
`
`construction, (2) the parties meet and confer that is intended to narrow the list of terms for
`
`construction, or (3) after the exchange of expert reports (including rebuttal expert reports) on
`
`Markman issues.
`
`Respectfully submitted,
`/s/ Christopher L. Evans
`Mark A. Griffin, WSBA #16296
`Karin B. Swope, WSBA #24015
`KELLER ROHRBACK L.L.P.
`1201 Third Avenue, Suite 3200
`Seattle, WA 98101
`mgriffin@KellerRohrback.com
`kswope@KellerRohrback.com
`T: (206) 623-1900
`F: (206) 623-3384
`
`Michael W. Shore* (mshore@shorechan.com)
`Alfonso G. Chan* (achan@shorechan.com)
`Christopher Evans* (cevans@shorechan.com)
`Ari B. Rafilson* (arafilson@shorechan.com)
`Paul T. Beeler* (pbeeler@shorechan.com)
`SHORE CHAN DEPUMPO LLP
`901 Main Street, Suite 3300
`Dallas, Texas 75202
`T: (214) 593-9110
`F: (214) 593-9111
`* Admitted pro hac vice
`
`Attorneys for Plaintiffs SRC Labs, LLC and Saint
`Regis Mohawk Tribe
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 2
`
`
`
`CERTIFICATE OF SERVICE
`I hereby certify that on August 17, 2018, Plaintiffs’ Preliminary Claim Constructions
`was served upon all counsel of record via electronic mail.
`
`Dated: August 17, 2018
`
`/s/ Christopher L. Evans
`Christopher L. Evans
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 3
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 4
`
`’324/800 Patents ..................................................................................................................................................18
`
`’687 Patent ............................................................................................................................................................12
`
`’524 Patent ............................................................................................................................................................10
`
`’152 Patent /110 Patent ........................................................................................................................................5
`
`Table of Contents
`
`D.
`
`C.
`
`B.
`
`A.
`
`Exhibit A
`
`
`
`SRC00034352-34360
`
`SRC00034385-34392
`
`SRC00034244-34251
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`U.S. Patent No. 5,367,494
`Extrinsic:
`
`SRC00002102-2103
`’152 patent file history:
`
`’110 patent, Fig. 1, Fig. 3, 2:23-25, 3:17-23, 3:54-4:13
`
`6
`’152 patent, Fig. 1, Fig. 3, 2:15-18, 3:10-17,3:47-67, 4:1-
`Intrinsic:
`Evidence
`
`memory access methods
`may be accessed using only
`range of memory addresses that
`memory subsystem having a
`data processor as part of the
`physical locations viewed by the
`Proposed Construction
`
`memory bank
`Claim Term
`
`SRC00002103-104
`’152 patent file history:
`
`’152 patent, Abstract, Fig. 3, 1:52-59, 7:7-9, 8:42-45
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`programable gate array
`elements, such as a field
`reconfigurable hardware
`
`algorithm processors
`plurality of memory
`
`12, 15, 21
`claims 1-5, 7, 11,
`’152 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 5
`
`’152 Patent /110 Patent
`
`claims 1, 3, 11
`’110 patent
`
`claims 1, 3, 11
`’152 patent
`Claim #
`A.
`
`
`
`
`
`SRC00034244-34251
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00002102-104, SRC00002106
`’152 patent file history:
`
`
`
`’110 patent, Fig. 3, Fig. 4, 3:61-65, 5:35-53, 5:65-6:20
`
`
`
`’152 patent, Fig. 3, Fig. 4, 3:54-58, 5:26-45, 5:56-6:12
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`
`
`
`SRC00004574-82
`
`
`
`SRC00004318-36
`
`
`
`U.S. Patent No. 7,149,867
`Extrinsic:
`
`Evidence
`
`
`
`
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`said memory bank
`addressable portions of
`within individually
`
`1
`’110 patent claim
`
`
`
`1
`’152 patent claim
`
`Proposed Construction
`
`Claim Term
`
`12, 15, 21
`claims 1-5, 7, 11,
`’110 patent
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 6
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00002102-107
`’152 patent file history:
`
`
`
`’152 patent, Figs. 1-4, 2:16-50, 3:10-4:52, 5:27-6:26.
`Intrinsic:
`
`Same as “within individually addressable portions”
`
`
`
`Same as “within individually addressable portions”
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`SRC00034252-34360
`
`
`
`
`
`MS_SRC-SRMT_0441701
`
`
`
`SRC00034385-34392
`Evidence
`
`
`
`processor
`addressable by the data
`be individually memory
`memory algorithm processors to
`Function: allow the plurality of
`
`
`
`disagrees:
`the alternative, if the court
`Not a means plus function. In
`location in memory
`an address of a particular
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`2:16-50, 3:10-4:52, 5:27-6:26.
`Structure: ’152 patent, Figs. 1-4,
`
`
`
`application program
`processor executes said
`as said one data
`least one data processor
`addressable by said at
`individually memory
`algorithm processors are
`said plurality of memory
`address bus such that
`said data bus and to said
`algorithm processors to
`plurality of memory
`means connecting said
`
`memory address
`
`memory addressed
`
`1
`’110 patent claim
`
`
`
`1
`’152 patent claim
`
`3
`’110 patent claim
`
`
`
`3
`’152 patent claim
`
`
`
`1
`’152 patent claim
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 7
`
`
`
`SRC00002103-104
`’152 patent file history:
`
`’152 patent, Abstract, 1:52-59, 7:7-9, 8:42-44
`
`’110 patent, Abstract, 1:59-66, 7:14-16, 8:45-47
`Intrinsic:
`
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`SRC00004583-4587
`
`SRC00005005-5008
`Extrinsic:
`
`SRC00002102-107
`’152 patent file history:
`
` ’152 patent, Figs. 1-4, 2:16-50, 3:10-4:52, 5:27-6:26.
`Intrinsic:
`
`Same as “within individually addressable portions”
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`Evidence
`
`programable gate array
`elements, such as a field
`reconfigurable hardware
`
`algorithm processors
`reconfigurable memory
`a plurality of
`
`claims 1, 11
`’110 patent
`
`2:16-50, 3:10-4:52, 5:27-6:26.
`Structure: ’152 patent, Figs. 1-4,
`
`address bus
`processors to the data bus and
`plurality of memory algorithm
`Function: connecting the
`
`disagrees:
`the alternative, if the court
`Not a means plus function. In
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`bus
`bus and to said address
`processors to said data
`memory algorithm
`plurality of individual
`means coupling said
`
`11
`’110 patent claim
`
`11
`’152 patent claim
`
`locations
`addressable memory
`individual memory
`bank at a plurality of
`Within said memory
`
`11
`’110 patent claim
`
`11
`’152 patent claim
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 8
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 9
`
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`SRC00004574-82
`
`SRC00004318-36
`
`U.S. Patent No. 7,149,867
`Extrinsic:
`Evidence
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`SRC00034252-34360
`
`
`
`
`
`MS_SRC-SRMT_0441985
`
`
`
`SRC00034380-34384
`
`
`
`SRC00034385-34392
`
`
`
`SRC00034244-34251
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00002102-2103
`’152 patent file history:
`
`
`
`’110 patent, Fig. 1, Fig. 3, 2:23-25, 3:17-23, 3:54-4:13
`
`
`
`6
`’152 patent, Fig. 1, Fig. 3, 2:15-18, 3:10-17,3:47-67, 4:1-
`
`5:39-57, 7:34-9:17
`’524 patent, Abstract, Figs. 1-5, 1:29-37, 2:3-47, 3:6-44,
`Intrinsic:
`Evidence
`
`
`
`
`
`data processor
`inserted and accessed by the
`module would typically be
`location where a memory
`that is connected to a physical
`a bus with high transfer rates
`Proposed Construction
`
`memory module bus
`Claim Term
`
`claims 1, 15
`’524 patent
`Claim #
`
`’524 Patent
`
`B.
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 10
`
`
`
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`
`
`
`SRC00004318-36
`Extrinsic:
`
`
`
`SRC00002547-49
`SRC00002472, SRC00002508, SRC00002542,
`’524 patent file history:
`
`
`
`8:26
`’524 patent, Fig. 3, Fig. 5, 3:6-44, 5:4-12, 5:50-57, 7:65-
`Intrinsic:
`MS_SRC-SRMT_0441985
`
`
`
`
`external device
`data is passed directly to an
`FPGA, is altered, then altered
`memory module bus to the
`Data is passed directly from the
`
`thereto
`external device coupled
`module bus to an
`from said memory
`altered data directly
`array for providing said
`programmable gate
`coupled to said field
`a direct data connection
`
`1
`’524 patent claim
`
`
`
`SRC00034385-34392
`
`
`
`SRC00034244-34251
`Extrinsic:
`
`
`
`’524 patent, Abstract, Figs. 1-5, 1:29-37, 2:3-47,
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`Evidence
`
` memory hardware unit
`
` A
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`Memory module
`
`claims 1, 15
`’524 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 11
`
`
`
`MS_SRC-SRMT_0441160-177
`
`
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`’687 patent, Fig. 13, Fig. 14, 2:6-25, 21:1-22.
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`
`
`SRC00034369-34379
`
`
`
`5,715,453, Figs 1-9, 1:23-63, 2:62-52
`Extrinsic:
`
`
`
`’687 patent, Fig. 12-14, 20:36-21:24
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`Extrinsic:
`
`
`
`’687 patent, Fig. 14, 21:1-24
`Intrinsic:
`Evidence
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`
`
`elements
`processing of N data
`substantially parallel
`processors for
`least one reconfigurable
`least a portion of said at
`instantiating N of said at
`
`claim 11
`’687 patent
`
`
`
`web site servers
`One or more internet connected
`
`internet site
`
`claims 1, 18
`’687 patent
`
`No specific order is required
`Proposed Construction
`
`Order of steps
`Claim Term
`
`Claim #
`
`
`
`’687 Patent
`
`C.
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 12
`
`
`
`MS_SRC-SRMT_0441160-177
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`’687 patent, Fig. 14, 21:123
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`
`
`SRC00034393-34394
`
`
`
`SRC00034099-34110
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`’687 patent, Abstract, 2:6-25, 2:66-3:6, 21:1-23
`Intrinsic:
`U.S. Patent No. 6,128,663
`
`
`
`20:52-21:8.
`’687 patent, Figs. 13-14, 1:35-64, 2:6-26, 2:48-65, 4:6-11,
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`Evidence
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`processing elements
`said N reconfigurable
`corresponding ones of
`elements with
`processing said N data
`
`claim 1
`’687 patent
`
`system
`single copy of the operating
`Appears to a user to be but a
`
`an operating system
`a single system image of
`
`claims 10, 11
`’687 patent
`
`user
`information pertaining to the
`
`demographic data
`
`claims 5, 12, 13
`’687 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 13
`
`
`
`Extrinsic:
`
`’687 patent, Figs. 1-10, 2:6-26, 5:1-36, 9:1-42, 11:14-25
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`SRC00034244-34251
`
`SRC00034369-34379
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`’324 patent, 2:1-5
`
`hardware
`instantiate an algorithm as
`such as an FPGA, that can
`a reconfigurable component,
`
`processing element
`Reconfigurable
`
`claims 1, 10
`’687 patent
`
`U.S. Patent No. 7,149,867, 5:25-29, 12:39-40
`Extrinsic:
`
`SRC00000266, SRC00000563, SRC00000567-568
`’687 patent file history:
`
`’687 patent, Fig. 14, 21:1-23
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`to make an instance of
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`instantiating
`
`claims 1, 11
`’687 patent
`
`Evidence
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 14
`
`
`
`
`
`SRC00034244-34251
`
`
`
`SRC00034369-34379
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`
`
`
`SRC00004359-78
`
`
`
`’324 patent, 2:1-5
`
`
`
`U.S. Patent No. 7,149,867, 5:25-29, 12:39-40
`Extrinsic:
`
`
`
`SRC00000266, SRC00000563, SRC00000567-568
`’687 patent file history:
`
`
`
`’687 patent, Figs. 1-10, Fig. 13, Fig. 14, 2:6-25, 21:1-23
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`
`
`SRC00004583-4587
`
`
`
`
`
`SRC00005005-5008
`
`
`
`U.S. Patent No. 7,149,867, 5:26-29
`Evidence
`
`received by said server
`of each of the data elements
`substantially parallel processing
`processors as needed for
`creating as many reconfigurable
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`said server.
`elements received by
`processing of N data
`substantially parallel
`processors for
`least one reconfigurable
`least a portion of said at
`instantiating N of said at
`Said service
`
`claim 11
`’687 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 15
`
`
`
`SRC00034369-34379
`
`SRC00034244-34251
`
`SRC00034365-34368
`
`SRC00004359-78
`
`SRC00004583-4587
`
`SRC00005005-5008
`Extrinsic:
`
`’687 patent, Figs. 1-14, 21:1-23
`Intrinsic:
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`SRC00034385-34392
`
`SRC00034369-34379
`
`SRC00034244-34251
`
`SRC00034365-34368
`
`SRC00004359-78
`
`SRC00034395-34424
`Evidence
`
`processors
`the instantiated reconfigurable
`substantially in parallel using
`processing the data elements
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`processors
`one reconfigurable
`with N of said at least
`said N data elements
`concurrently processing
`substantially
`
`claim 18
`’687 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 16
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 17
`
`terms meaning.
`Ghazawi, and/or Houman Homayoun concerning the
`Expert testimony from Jon Huppenthal, Tarek El-
`
`MS_SRC-SRMT_0441160-177
`
`SRC00034385-34392
`
`Evidence
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`SRC00034252-34360
`
`
`
`
`
`SRC00034369-34379
`
`
`
`SRC00034244-34251
`
`
`
`SRC00004763-4772
`
`
`
`SRC00004685-4688
`
`
`
`SRC00004528-4546
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00004365-78
`
`
`
`SRC00001448
`’324 patent file history:
`
`
`
`’800 patent, Fig. 4, 5:65-6:28
`
`
`
`’324 patent, Fig. 4, 6:1-30.
`Intrinsic:
`Evidence
`
`
`
`the next compute loop
`will be passed as input data to
`Data from one compute loop
`Proposed Construction
`
`computational loops
`seamlessly between said
`pass computed data
`Claim Term
`
`claim 1
`’800 patent
`
`
`
`claim 1
`’324 patent
`Claim #
`
`’324/800 Patents
`
`D.
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 18
`
`
`
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`U.S. Patent No. 7,149,867, 5:26-29
`Extrinsic:
`
`SRC00004359-78.
`
`’687 patent, Fig. 3, 2:6-26
`
`5:29-50
`’800 patent, Fig. 2, 1:65-2:17, 2:39-3:8,
`
`5:31-53
`’324 patent, Fig. 2, 1:63-2:15, 2 :38-3:7,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`Evidence
`
`algorithm as hardware
`reconfiguration, instantiate an
`and can, through
`contains one or more FPGAs
`
`reconfigurable processor a computing device that
`
`claim 1
`’800 patent
`
`claim 1
`’324 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 19
`
`
`
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`Extrinsic:
`
`SRC00034170-34220
`
`SRC00034211-34235
`
`SRC00004359-78
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`Evidence
`
`reconfigurable processor
`instantiated on the
`systolic data flow that can be
`converting an algorithm into
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`reconfigurable processor
`at least one
`computing system at the
`by said reconfigurable
`systolically implemented
`calculation that is
`algorithm into a
`transforming an
`
`claim 1
`’324 patent
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 20
`
`
`
`Same as systolic
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00034369-34379
`
`SRC00034221-34235
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`Extrinsic:
`
`SRC00004359-78
`
`SRC00001447-48
`’324 patent file history:
`
`need not be construed.
`and ordinary meanings and
`These terms have their plain
`
`implemented
`of code/systolically
`systolically linked lines
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 21
`
`next unit
`an operand and pass it to the
`each operate upon the arrival of
`functional units designed to
`An array of interconnected
`
`7:59-62
`7B, Fig. 7C, Fig. 7D, Fig. 8A, 6:1-30,
`’324 patent, Fig. 2, Fig. 4, Fig. 7A, Fig.
`Intrinsic:
`Evidence
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`Proposed Construction
`
`systolic
`Claim Term
`
`claim 1
`’324 patent
`Claim #
`
`
`
`Extrinsic:
`
`
`
`SRC00004361-66
`
`
`
`28
`’800 patent, Figs. 4A-9B, 2:50-3:8, 6:19-
`
`
`
`30
`’324 patent, Figs. 4A-9B, 2:49-3:7, 6:21-
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`
`
`SRC00004763-4772
`
`
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`’800 patent, Figs. 4A-9C, 2:55-59, 6:23-29
`
`30, 13:20-31.
`’324 patent, Figs. 4A-9C, 2:54-58, 6:24-
`Intrinsic:
`
`
`
`Evidence
`
`Proposed Construction
`
`time
`Within a common interval of
`
`concurrently
`substantially
`
`claim 1
`’800 patent
`
`
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 22
`
`
`
`steps, grid points, etc.
`such as vectors, planes, time
`Multiple attributes of a problem,
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`data dimension
`
`Claim Term
`
`
`
`claim 1
`’800 patent
`
`
`
`claim 1
`’324 patent
`
`Claim #
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00004362-378
`
`
`
`49
`3:36-44, 5:65-6:28, 6:46-7:3, 7:38-43, 8:35-
`’800 patent, Figs. 4A-4B, Figs. 6A-9C,
`
`
`
`3:35-44, 6:1-30, 6:47-7:5, 7:42-48, 8:41-55
`’324 patent, Figs. 4A-4B, Figs. 6A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`
`
`SRC00034369-34379
`
`
`
`SRC00034244-34251
`
`
`
`SRC00004763-4772
`
`
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Evidence
`
`prescribed condition is satisfied
`number of times or until a
`repeated either a specific
` sequence of operations that is
`
` a
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`computational loop
`
`claim 1
`’800 patent
`
`
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 23
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`
`
`SRC00005005-5008
`
`
`
`(definition of functional unit)
`U.S. Patent No. 7,149,867, 5:34-37
`Extrinsic:
`
`
`
`SRC00004361-67
`
`
`
`’800 patent, Fig. 2, 2:2-25, 2:39-59
`
`
`
`’324 patent, Fig. 2, 2:1-24, 2:38-58,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00034361-34364
`
`
`
`
`
`SRC00034116-34120
`
`
`
`SRC00034244-34251
`
`
`
`SRC00034369-34379
`
`
`
`SRC00004763-4772
`
`
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`
`
`Evidence
`
`
`
`operations
`functions that perform specific
`interconnected sets of hardware
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`units
`clusters of functional
`
`claim 1
`’800 patent
`
`
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 24
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`6:32
`U.S. Patent No. 7,149,867, 5:29-38, 5:59-
`Extrinsic:
`
`
`
`
`
`SRC00004359-78
`
`
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`
`
`SRC00034111-34115
`
`
`
`SRC00034121-34160
`
`
`
`MS_SRC-SRMT_0441160-177
`
`
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`
`
`
`
`SRC00004528-4546
`
`
`
`SRC00004583-4587
`Evidence
`
`calculation
`as required to perform a desired
`reconfigurable routing resources
`unit is interconnected via
`Each instantiated functional
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`instantiation
`as established at
`reconfigurable processor
`the at least one
`routing resources within
`based on reconfigurable
`reconfigurable processor
`unit at the at least one
`instantiated functional
`with each other
`processor interconnects
`least one reconfigurable
`functional unit at the at
`each instantiated
`
`
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 25
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`Extrinsic:
`
`SRC00004359-78
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00034121-34160
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`functional units
`g at least two of said
`instantiated/Instantiatin
`… are
`unit[s]/ functional units
`instantiated functional
`
`claim 1
`’324 patent
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 26
`
`2:50-59, 4:45-50, 5:65-6:28
`’800 patent, Fig. 2, Fig. 4, Figs. 7A-9C,
`Evidence
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`6:28
`1:65-2:17, 2:39-3:8, 4:45-49, 5:29-50, 5:65-
`’800 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`
`30
`1:63-2:15, 2:37-3:9, 4:46-50, 5:31-54, 6:1-
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00034121-34160
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`2:50-59, 4:45-50, 5:65-6:28
`’800 patent, Fig. 2, Fig. 4, Figs. 7A-9C,
`
`6:32
`U.S. Patent No. 7,149,867, 5:29-38, 5:59-
`Evidence
`
`be construed.
`ordinary meaning and need not
`This term has its plain and
`
`reconfigurable
`comprising at least one
`computing system
`reconfigurable
`computing system, the
`reconfigurable
`processing in a
`A method for data
`
`claim 1
`’800 patent
`
`claim 1
`’324 patent,
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 27
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`2:50-59, 4:45-49, 5:65-6:28
`’800 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`Intrinsic:
`SRC00004763-4772
`
`reconfigurable processor
`that are instantiated on the
`execution of the functional units
`of operands triggers the
`data flow where the availability
`converting an algorithm into a
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`reconfigurable processor
`at least one
`computing system at the
`reconfigurable
`implemented by said
`driven calculation that is
`algorithm into a data
`transforming an
`
`claim 1
`’800 patent,
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`U.S. Patent No. 7,149,867, 5:26-29
`Extrinsic:
`
`SRC00004359-78
`
`’687 patent, Fig. 3, 2:6-26
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`Evidence
`
`Proposed Construction
`
`functional units
`comprising a plurality of
`reconfigurable processor
`processor, the
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 28
`
`
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`
`
`
`2:50-59, 4:45-50, 5:65-6:28
`’800 patent, Fig. 2, Fig. 4, Figs. 7A-9C,
`Intrinsic:
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`
`units
`as clusters of functional
`calculation are formed
`lines of code of said
`
`claim 1
`’800 patent,
`
`
`
`SRC00034385-34392
`
`
`
`SRC00004763-4772
`
`
`
`SRC00004685-4688
`
`
`
`SRC00004528-4546
`
`
`
`SRC00004583-4587
`
`
`
`SRC00005005-5008
`Extrinsic:
`
`
`
`SRC00034170-34220
`
`
`
`SRC00034221-34235
`
`SRC00004365-78
`
`
`
`
`
`SRC00001635-1641
`’800 patent file history:
`Evidence
`
`Proposed Construction
`
`
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 29
`
`
`
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`
`SRC00034121-34160
`
`(definition of functional unit)
`U.S. Patent No. 7,149,867, 5:34-37
`
`SRC00034111-34115
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`Extrinsic:
`
`SRC00004359-78
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`Evidence
`
`that perform specific operations
`interconnected sets of functions
`lines of code are instantiated as
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 30
`
`
`
`SRC00034121-34160
`
`MS_SRC-SRMT_0441160-177
`
`SRC00004763-4772
`
`SRC00004685-4688
`
`SRC00004528-4546
`
`SRC00004583-4587
`
`SRC00005005-5008
`
`6:32
`U.S. Patent No. 7,149,867, 5:29-38, 5:59-
`Extrinsic:
`
`SRC00004359-78
`
`SRC00001449-1450.
`SRC00001341, SRC00001446,
`’324 patent file history:
`
`2:49-58, 4:46-50, 6:1-30
`’324 patent, Fig. 2, Fig. 4, Fig. 7A-9C,
`
`2:50-59, 4:45-50, 5:65-6:28
`’800 patent, Fig. 2, Fig. 4, Figs. 7A-9C,
`Intrinsic:
`Evidence
`
`calculation
`as required to perform desired
`reconfigurable routing resources
`unit is interconnected via
`Each instantiated functional
`
`this term may be construed as:
`be construed. In the alternative,
`ordinary meaning and need not
`This term has its plain and
`Proposed Construction
`
`formation
`as established at
`reconfigurable processor
`least one
`resources within the at
`reconfigurable routing
`based on
`reconfigurable processor
`unit at the at least one
`functional
`with each other formed
`processor interconnects
`reconfigurable
`unit at the at least one
`each formed functional
`Claim Term
`
`claim 1
`’800 patent,
`Claim #
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 31
`
`
`
`Petitioner Microsoft Corporation - Ex. 1069, p. 32
`
`terms meaning.
`Houman Homayoun concerning the
`David Caliga, Tarek El-Ghazawi, and/or
`Expert testimony from Jon Huppenthal,
`Evidence
`
`Proposed Construction
`
`Claim Term
`
`Claim #
`
`
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