`
`Huppenthal
`
`Reference 7
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 1
`
`

`

`SRC Carte™ C Programming Environment
`v3.0 Guide (Pre-Release)
`
`.
`I'l
`Wi
`fl I1:' I
`!
`
`i
`
`■ ‘i
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 2
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`Copyright © 2002 - 2007 SRC Computers, Inc. ALL RIGHTS RESERVED.
`
`The contents of this guide are protected under copyright law. This guide, in part or in full, may not be repro-
`duced or transmitted in any form or by any means including but not limited to electronic and hardcopy with-
`out written permission from SRC Computers, Inc.
`
`MAP® and Hi-Bar® are registered trademarks of SRC Computers, Inc.
`
`SNAP™ and Carte™ are trademarks of SRC Computers, Inc.
`
`Intel® is a registered trademark of Intel® Corporation.
`
`Synplify Pro™ is a trademark of Synplicity, Inc.
`
`VCS™, VCSI™, and VirSim™ are all trademarks of Synopsys®, Inc.
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 3
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`Table of Contents
`PREFACE......................................................................................................................... I
`Purpose ........................................................................................................................i
`Programming Constraints.............................................................................................i
`CHAPTER 1: INTRODUCTION...................................................................................... 1
`1.1 Overview Of Compilation Process .................................................................... 2
`1.2 Filename Conventions ...................................................................................... 2
`CHAPTER 2: MAP COMPILATION PROCESS............................................................. 3
`2.1 Front-end/Optimization ..................................................................................... 4
`2.2 Dataflow Analysis ............................................................................................. 5
`2.3 ComList Assembler........................................................................................... 5
`2.4 Verilog Generator ............................................................................................. 5
`2.5 EDIF Generation............................................................................................... 5
`2.5.1
` Default EDIF generation...............................................................................................6
`2.5.2
` Synplify Pro®................................................................................................................6
`2.6 Place And Route Tools ..................................................................................... 6
`2.7 Configuration Integrator .................................................................................... 6
`2.8 Intel® Processor Compilation Components...................................................... 7
`CHAPTER 3: COMPILING AND LINKING MAP APPLICATIONS................................ 9
`3.1 SRC Directory Structure ................................................................................... 9
`3.2 Runtime Libraries.............................................................................................. 9
`3.3 libmap.h Header File....................................................................................... 10
`3.4 Source Code Preprocessing........................................................................... 10
`3.5 Example Makefile ........................................................................................... 11
`CHAPTER 4: CODE DEVELOPMENT AND PORTING TO THE MAP ....................... 19
`4.1 Partitioning The Code ...................................................................................... 19
`4.1.1
`Inlining functionality .....................................................................................................19
`4.1.2 Data partitioning ..........................................................................................................20
`4.2 Restrictions On The Code ............................................................................... 20
`4.2.1
`Formal parameters to a MAP function.........................................................................20
`4.2.2
`External calls in the MAP function...............................................................................20
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
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`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 4
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`Functions that are candidates for inlining....................................................................21
`4.2.3
`Intrinsics and data types..............................................................................................21
`4.2.4
`4.2.5 Declaring and referencing data ...................................................................................22
`4.3 Example Program ............................................................................................ 23
`4.4 The libmap.h Include File................................................................................. 25
`4.5 Modifications To The MAP Function................................................................ 26
`4.5.1 Read/Write arrays in Block RAM.................................................................................26
`4.5.2 Const Arrays in Block RAM .........................................................................................28
`4.5.3 Const Arrays in LUTs ..................................................................................................28
`4.5.4
`Arrays in OBM banks...................................................................................................29
`4.5.5 DMAs into and out of OBM..........................................................................................30
`4.5.6 DMA streams...............................................................................................................32
`4.5.7 Code example - MAP function.....................................................................................33
`4.6 Modifications To The Calling Function............................................................. 34
`4.6.1 Declaring arrays used in DMA transfers......................................................................34
`4.6.2
`Allocating MAP resources ...........................................................................................34
`4.6.3 Releasing MAP resources...........................................................................................35
`4.6.4 Code example - calling function ..................................................................................36
`4.7 Using Two User Logic Chips ........................................................................... 37
`4.7.1
`send_to_bridge and recv_from_bridge........................................................................38
`4.7.2
`Streaming across bridge ports.....................................................................................39
`4.7.3
`send_perms and recv_perms......................................................................................39
`4.7.4
`Bridge and OBM G/H Interaction.................................................................................40
`4.7.5 Code examples............................................................................................................41
`4.8 Inlining Code Example..................................................................................... 43
`4.9 Parallel Code Blocks........................................................................................ 44
`4.9.1 Using independent parallel sections............................................................................47
`4.9.2 Using cooperating parallel sections.............................................................................47
`4.9.3 Critical sections ...........................................................................................................48
`4.9.4 Coding example: producer/consumer..........................................................................50
`CHAPTER 5: USING SWITCH-BASED SYSTEMS AND GPIO PORTS..................... 53
`5.1 Allocating Global Common Memory (GCM)..................................................... 54
`5.1.1 GCM Library Routines.................................................................................................54
`5.1.2 Reading And Writing GCM Calls .................................................................................59
`5.1.3
` GCM Status................................................................................................................63
`5.1.4
` Environment Variables ...............................................................................................64
`5.1.5
` GCM Allocation Notes ................................................................................................64
`5.1.6
` GCM Allocation Examples..........................................................................................65
`5.2 GPIO Ports ..................................................................................................... 72
`5.2.1 MAP Allocation ............................................................................................................73
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 5
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`5.2.2 Calling Multiple MAPs Concurrently ............................................................................74
`5.3 Multiple MAP Type Compiles.......................................................................... 79
`5.3.1 MAP Targets................................................................................................................79
`5.3.2 Multiple MAP Type Makefiles ......................................................................................79
`5.3.3 Multiple MAP Type Macros..........................................................................................80
`CHAPTER 6: STREAMS.............................................................................................. 83
`6.1 Stream Termination ........................................................................................ 87
`6.2 Runtime Behavior Of Streams ........................................................................ 88
`6.3 Buffer Sizes .................................................................................................... 88
`6.4 Streams Across Bridge Ports.......................................................................... 91
`6.5 DMA Streams ................................................................................................. 96
`6.5.1
` Termination of DMA streams......................................................................................99
`6.6 Special DMA Streams..................................................................................... 99
`6.6.1
` Strided DMAs .............................................................................................................99
`6.6.2
` Sub-array DMAs.........................................................................................................99
`6.7 GPIO Memory Streams ................................................................................ 108
`6.8 Stream Merging and Splitting ....................................................................... 111
`CHAPTER 7: USER DEBUG COMPILATION ........................................................... 117
`7.1 User Debug Requirements ........................................................................... 123
`7.2 Differences Between Debug and MAP Execution ........................................ 123
`CHAPTER 8: CODE OPTIMIZATION AND PERFORMANCE .................................. 125
`8.1 Loop Performance ........................................................................................ 125
`8.1.1
`Loop-carried scalar dependency ...............................................................................126
`8.1.2
`Loop-carried memory dependency............................................................................127
`8.1.3 Multiple accesses to same memory bank..................................................................128
`8.1.4
`Periodic-input macro calls .........................................................................................130
`8.2 Replacement Of If-Then-Else Statement...................................................... 130
`CHAPTER 9: FLOATING POINT OPERATIONS ...................................................... 131
`9.1 Supported Operations and Intrinsics ............................................................ 131
`9.1.1 Relational operations.................................................................................................131
`9.1.2
`Special math operations............................................................................................131
`9.1.3
`Intrinsics ....................................................................................................................131
`9.2 Numeric Conversions ................................................................................... 131
`9.3 Arrays of Floats and Doubles Between CPU and MAP ................................ 132
`9.3.1 Using an array of doubles..........................................................................................132
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 6
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`9.3.2 Using a packed array of floats...................................................................................133
`9.3.3 Using an array of combined int-float words ...............................................................133
`9.3.4 Using an unpacked array of floats.............................................................................134
`9.4 Space Issues ................................................................................................ 134
`CHAPTER 10: VERILOG SIMULATION.................................................................... 137
`10.1 Simulation Build Instructions......................................................................... 137
`10.1.1 VCS/VCSi Variables in the Makefile..........................................................................137
`10.1.2 VCS/VCSi Environment Variables Set At Runtime....................................................138
`10.1.3 ModelSim Variables in the Makefile ..........................................................................138
`10.1.4 ModelSim Environment Variables Set At Runtime ....................................................138
`10.2 Running Simulation with the Emulator.......................................................... 138
`10.2.1 VCS example.............................................................................................................139
`10.2.2 ModelSim example....................................................................................................140
`10.3 Debugging Your Simulation .......................................................................... 142
`10.3.1 VCS and VCSi...........................................................................................................142
`10.3.2 ModelSim...................................................................................................................143
`10.4 Unsupported Features in Simulation ............................................................ 144
`CHAPTER 11: INTEGRATING USER MACROS....................................................... 145
`11.1 Pure Functional Macros................................................................................ 147
`11.2 Pure Functional Periodic Macros.................................................................. 149
`11.3 Stateful Macros............................................................................................. 153
`11.4 Stateful Periodic Macros............................................................................... 158
`11.5 External Macros............................................................................................ 162
`11.6 Streaming User Macros ................................................................................ 166
`11.6.1 Streams in the Info File..............................................................................................168
`11.7 User Macros Producing Streams.................................................................. 170
`11.7.1 Example of stream producer .....................................................................................172
`11.7.2 User macros consuming streams.............................................................................175
`11.7.3 User Macros Producing and Consuming Streams ....................................................178
`11.7.4 User macros with wide streams.................................................................................182
`11.8 Creating Debug Routines for User Macros................................................... 185
`11.9 Integrating The Macro................................................................................... 188
`11.9.1 Integrating the info file ...............................................................................................188
`11.9.2 Integrating the macro sources...................................................................................188
`11.9.3 The black boxes file...................................................................................................188
`11.9.4 The NGO Directory....................................................................................................189
`11.10 Info Files....................................................................................................... 190
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 7
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`APPENDIX A: USER CALLABLE MACROS .............................................................A-1
`A.1 Pure Functional Macros.................................................................................A-1
`A.1.1 Extended precision integer add................................................................................. A-2
`A.1.2 Single precision (FP32) macros ................................................................................ A-3
`A.1.3 Double precision (FP64) macros............................................................................... A-5
`A.2 Accumulators .................................................................................................A-6
`A.2.1
`Integer Accumulators................................................................................................. A-7
`A.2.2
`Floating Point Accumulators...................................................................................... A-8
`A.3 Counters And Sequence Generators.............................................................A-9
`A.3.1 Counters.................................................................................................................... A-9
`A.3.2 Sequence generators .............................................................................................. A-10
`A.4 Loop-Carried Macros (Delay Queues).........................................................A-11
`A.5 Timer Macros...............................................................................................A-13
`A.6 Split and Combine Macros...........................................................................A-13
`A.6.1 Split Macros............................................................................................................. A-14
`A.6.2 Combine Macros ..................................................................................................... A-15
`A.6.3
`Floating Point Split and Combine Macros ............................................................... A-16
`A.7 DMA Calls....................................................................................................A-16
`A.8 Bridge Communication Macros....................................................................A-19
`A.9 Stream Calls ................................................................................................A-20
`A.10 Large Selectors............................................................................................A-21
`A.10.1 Key-based selector macros..................................................................................... A-21
`A.10.2 Prioritized selector macros ...................................................................................... A-28
`APPENDIX B: SRC FLOATING POINT MACROS......................................................B-1
`B.1 Rounding .......................................................................................................B-2
`B.2 Denormal numbers ........................................................................................B-2
`B.3 Intel Sign Invert..............................................................................................B-2
`B.4 Relational operations .....................................................................................B-2
`APPENDIX C: MCC COMMAND ................................................................................C-1
`C.1 mcc ................................................................................................................C-1
`C.1.1 Compilation environment variables ........................................................................... C-1
`C.1.2 Source file types........................................................................................................ C-2
`C.1.3 mcc command line options........................................................................................ C-2
`C.1.4 Overriding default settings for the Xilinx Place and Route Tools............................... C-4
`APPENDIX D: MAKEFILE TEMPLATE AND TAILORING EXAMPLES....................D-1
`D.1 Makefile Template .........................................................................................D-1
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 8
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`D.2 Makefile Tailoring Examples..........................................................................D-3
`D.2.1
` Simple C application................................................................................................. D-3
`D.2.2
` Simple C application with user defined macros........................................................ D-4
`D.2.3
` C application with multiple MAP routines and multiple user macros ........................ D-5
`D.2.4
` C application with a multi-chip MAP function............................................................ D-6
`D.3 Multiple MAP Type Compile Template...........................................................D-8
`APPENDIX E: CACHE ALIGNMENT FUNCTIONS.....................................................E-1
`APPENDIX F: STREAM SYNTAX ............................................................................... F-1
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 9
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`PREFACE
`
`Purpose
`The purpose of this document is to provide users with necessary information that will enable them to
`produce executable code for the SRC systems. Applications that have been run on other computing
`systems will require some modification in order to benefit from the SRC system architectures. This guide
`addresses these modification requirements.
`
`The intended audience for this document encompasses users of SRC systems who will make
`modifications to applications so that the applications can take full advantage of the specialized hardware
`features of the SRC systems. This includes the capability to invoke user-defined macros as part of the
`compilation process. In addition, users will be able to generate code that will execute under any of three
`execution models: debug, simulation, and directly on hardware.
`
`Programming Constraints
`This guide documents the SRC software and highlights the constraints and requirements in modifying
`source code to effectively execute on the MAP. These constraints and requirements will be discussed
`throughout this guide.
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`i
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 10
`
`

`

`PREFACE
`
`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`ii
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 11
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`CHAPTER 1: INTRODUCTION
`
`Compiling and executing applications for the SRC systems involves more "steps" in the compilation
`process than the basic compilation model of first compiling, and then executing the resulting object file on
`a conventional computer system. The more complicated process provides the user:
`
`• Greater flexibility to control compilation on the Intel processor.
`The ability to stop or interrupt the compilation process for the MAP.
`•
`• Opportunities to add custom-logic or modifications into the compilation process.
`
`The compilation process consists of compilation on the Intel processor of the code that will execute on the
`Intel processor, compilation on the Intel processor of the code that will execute on the MAP, and the linking
`of the separately compiled binary files to create a single executable.
`
`Figure 1-1: Overview of Compilation Process
`
`The compilation system provides support for executing in the following modes:
`
`•
`•
`•
`
`Debug mode
`Simulation mode
`Directly on MAP hardware
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`1
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 12
`
`

`

`CHAPTER 1: INTRODUCTION
`
`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`1.1 Overview Of Compilation Process
`As indicated in Figure 1-1, there are two kinds of files to be compiled: files targeting execution on the Intel
`platform, and files targeting execution on a MAP.
`
`The Intel-targeted files, which include calls to MAP routines, is compiled with an Intel compiler to produce a
`relocatable object (*.o) file. The files containing routines to be executed on a MAP are compiled by the
`MAP C compiler (mcc). mcc consists of several distinct steps that result in several intermediate and
`relocatable object files. The object files resulting from both the Intel and MAP compilation steps are then
`linked with the MAP runtime libraries into a single executable file. (Refer to Chapter 3: Compiling And
`Linking MAP Applications on page 9 for information on linking.) The resulting absolute binary file may then
`be executed. If compiled for debug mode, it will execute on the Intel processor. If compiled for MAP
`execution, it will run on the Intel processor and one or more MAPs.
`
`1.2 Filename Conventions
`In order to maintain consistency during compilation, the base name of the input file is used as the base
`name for all files produced by the compilation. In the following sections each step in the compilation
`process is explained in detail.
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`2
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 13
`
`

`

`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`CHAPTER 2: MAP COMPILATION PROCESS
`
`The MAP C compiler translates functions that have been modified for MAP execution into relocatable
`object files. The translation process has several steps, each performed by a distinct component of the
`MAP C compiler. Each component, and the function it performs, is described in the following sections.
`
`The flow of the MAP compilation process is conceptualized in Figure 2-1.
`
`Application
`Application
`Executable
`Executable
`
`HLLHLL
`Source
`Source
`
`FORTRAN
`FORTRAN
`&&
`CC
`
`RC Compiling System
`RC Compiling System
`Optimization
`DFG Generation
`Logic Partitioning
`Verilog Generation
`Synthesis
`Place & Route
`
`MAPMAP
`Macros
`Macros
`
`Customer
`Customer
`Macros
`Macros
`
`Runtime
` Library
`
`Figure 2-1: MAP Compilation Process
`mcc is the command that controls the various components of the MAP compilation process for C codes.
`The input is a file containing C functions that have been modified to execute on a MAP. The resulting
`output files depend on the options specified in the mcc command line. These options control the execution
`of the compiler components, which produce the object files needed to support the three execution modes:
`hardware, debug, and simulation.
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`3
`
`November 20, 2007
`SRC-007-19
`
`PATENT OWNER DIRECTSTREAM, LLC
`EX. 2108, p. 14
`
`

`

`CHAPTER 2: MAP COMPILATION PROCESS
`
`SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`2.1 Front-end/Optimization
`The first component of MAP compilation is a language-specific "front-end" and optimization phase. The
`input to this phase is a file of C functions, for the purpose of example, MAPcode.mc.
`
`Figure 2-2: Diagram of Front-end/Optimization Phase
`
`The front-end/optimization phase of the compiler performs language syntax and semantic analysis
`followed by classical scalar and loop optimization.
`
`NOTE: Not all restrictions placed on the code modified for MAP execution are detected by this phase of
`compilation. Some restrictions are detected and diagnosed by subsequent components of the compiler.
`
`•
`
`•
`
`The front-end/optimization component produces the following three output files:
`MAPcode.cfg contains control flow information about the function and attributes of the input and
`output dummy arguments of the function. This file is the input to dataflow analysis, the next phase
`of MAP compilation. NOTE: This file is normally deleted during compilation.
`MAPcode_cl.cl contains the ComList code that controls data movement between the Intel
`processor and the MAP during execution of a function. This file is subsequently processed by the
`ComList Assembler. NOTE: This file is normally deleted during compilation.
`MAPcode_wrp.c is a C language source file that contains a wrapper function for the code that will
`execute on the MAP. The wrapper function executes on the Intel processor, providing the prolog
`and epilog code around the actual MAP execution. This code loads the user's generated ComList
`with the function's actual argument list and keeps track of the number of scalar values that will be
`copied out upon completion of MAP execution. This code also makes the call to the MAP library
`that transfers control from the Intel processor to the MAP for execution and returns control to the
`Intel processor upon completion of MAP execution.
`
`•
`
`Copyright © 2002 - 2007 SRC Computers, Inc.
`ALL RIGHTS RESERVED.
`
`4
`
`November 20, 2007
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`
`

`

`CHAPTER 2: MAP COMPILATION PROCESS
`
` SRC Carte™ C Programming Environment v3.0 Guide
`(Pre-Release)
`
`2.2 Dataflow Analysis
`The control flow graph (MAPcode.cfg) produced by the front-end/optimization phase is translated to a
`dataflow graph. At this point in compilation, additional analysis is performed to verify the functions being
`compiled for MAP execution adhere to the requirements placed on functions written for MAP execution.
`MAP specific optimizations are performed during dataflow analysis. The dataflow graph represents the
`relationship between basic blocks of the function, with basic operations represented as nodes connected
`by the data that is input to or output from the nodes. Additional nodes are inserted for connecting blocks of