c12) United States Patent
`Ikeda et al.
`
`(IO) Patent No.: US 8,487 ,308 B2
`(45) Date of Patent:
`Jul. 16, 2013
`
`(54) THIN FILM TRANSISTOR AND IMAGE
`DISPLAY UNIT
`
`(75) Inventors: Noriaki Ikeda, Tokyo (JP); Kodai
`Murata, Tokyo (JP); Manabu Ito,
`Tokyo (JP); Chihiro Miyazaki, Tokyo
`(JP)
`
`(73) Assignee: Toppan Printing ℃o., Ltd. (JP)
`
`( * ) Notice: Subject to any disclaimer, the term ofthis
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 521 days.
`
`(21) Appl. No.: 12/753,781
`
`(22) Filed:
`
`Apr. 2, 2010
`
`(65)
`
`Prior Publication Data
`
`US 2010/0258805 Al Oct. 14, 2010
`
`(30)
`
`Foreign Application Priority Data
`
`Apr. 10, 2009 (JP) ............................... 2009-096113
`Jan. 7, 2010 (JP) ・・・・ H ・H ・....・ H ・...・ H ・...・ H ・− 2010-001816
`
`(51) Int. Cl.
`HOJL23！θ4
`HOJL31！θ36
`HOJL2加 I
`HOJL2刀 2
`HOJL31！θ376
`(52) Uふ ℃L
`USPC ................. 257/59; 257/57; 257/72; 257/347;
`257/350
`
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`
`(58) Field of℃lassification Search
`USPC ................... 257/59, 57, 72, 71, 40, 296, 535,
`257/368, 306, 347, 350, 202, 351, 443
`See application file for complete search history.
`
`(56)
`
`References ℃ited
`
`U.S. PATENT DOCUMENTS
`7,465,593 B2 * 12/2008 Yamazaki et al.
`2005/0087769 Al* 4/2005 Yamazaki et al.
`
`438/26
`257/202
`
`JP
`JP
`JP
`
`FOREIGN PATENT DOCUMENTS
`2002-353463
`12/2002
`2008-205469
`9/2008
`2009-099953
`5/2009
`
`* cited by examiner
`
`Primary Examiner Chuong A. Luu
`(74) Attorney, Age祇 orFirm Squire Sanders (US) LLP
`
`(57)
`
`ABSTRA℃I
`
`One embodiment of the present invention is a thin film tran-
`sistor having a substrate, a gate electrode formed on the
`substrate, a gate insulating film, a semiconductor layer
`formed on the gate insulating film, a protective film formed on
`the semiconductor layer and the gate insulating film and
`having first and second opening sections which are separately
`and directly formed on the semiconductor layer, a source
`electrode formed on the protective film and electrically con-
`nected to the semiconductor layer at the first opening section
`of the protective film, and a drain electrode formed on the
`protective film and electrically connected to the semiconduc-
`tor layer at the second opening section of the protective film.
`
`13℃laims, 8 Drawing Sheets
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`Jul. 16, 2013
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`Jul. 16, 2013
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`Jul. 16, 2013
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`US 8,487,308 B2
`
`1
`THIN FILM TRANSISTOR AND IMAGE
`DISPLAY UNIT
`
`CROSS REFERENCE TO RELATED
`APPLICATION
`
`2
`electrode formed on the protective film and electrically con-
`nected to the semiconductor layer at the first opening section
`of the protective film, and a drain electrode formed on the
`protective film and electrically connected to the semiconduc-
`5 tor layer at the second opening section of the protective film.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`This application is based on and claims the benefit of
`priority from the Japanese Patent Application number 2009-
`FIG. 1 is a schematic plane view showing approximately
`096113, filed on Apr. 10, 2009 and the Japanese PatentAppli-
`cation number 2010-001816, filed on Jan. 7, 2010; the entire 10 one pixel of a thin film transistor of an embodiment of the
`contents of which are incorporated herein by reference.
`present invention. A substrate 1, a gate insulating film 4 and a
`protective film 6 are not illustrated in this view.
`FIG. 2 is a schematic cross-sectional diagram showing
`approximately one pixel of a thin film transistor of an embodi-
`15 ment of the present invention. A-A' in this diagram corre-
`sponds to that of FIG. 1.
`FIG. 3 is a schematic cross-sectional diagram showing
`The present invention relates to a thin film transistor and an
`approximately one pixel of a thin film transistor of an embodi-
`image display unit of an active matrix type.
`In recent years, a liquid crystal display unit, an electro- ment of the present invention. A-A' in this diagram corre-
`phoresis display unit and an organic electro luminescence dis- 20 sponds to that of FIG. 1.
`play unit of an active matrix type in which a thin film trans is-
`FIG. 4 is a schematic cross-sectional diagram showing
`tor array is employed are widely utilized as an image display approximately one pixel of an image display unit of an
`unit.
`embodiment of the present invention.
`As an existing display unit of an active matrix type, a
`FIG. 5 is a schematic cross-sectional diagram showing
`display unit in which a non-single crystal silicon is used as a 25 approximately one pixel of a thin film transistor which has an
`semiconductor material for a thin film transistor array is existing structure of a related art of the present invention.
`mainly utilized. (Patent Document 1)
`FIG. 6 is a schematic cross-sectional diagram showing
`Here, FIG. 5 is a schematic cross-sectional diagram of a approximately one pixel of an image display unit which has
`thin film transistor 50 used for an existing image display unit. an existing structure of a comparative example ( a related art)
`FIG. 6 is a schematic cross-sectional diagram of an existing 30 of the present invention.
`image display unit 40 of an active matrix type using a thin film
`FIG. 7 is a view showing electrical current-electrical volt-
`transistor 50. The thin film transistor 50 shown in FIG. 5 will age properties and a gate electrical current of a thin film
`be explained below.
`transistor of an embodiment of the present invention.
`As shown in FIG. 5, the existing thin film transistor 50 has
`FIG. 8 is a view showing electrical current-electrical volt-
`a substrate 31, a gate electrode 32 and a capacitor electrode 33 35 age properties and a gate electrical current of a thin film
`separately arranged on the substrate 31, a gate insulating layer transistor of a comparative example of the present invention.
`34 formed so as to cover entire surfaces of the gate electrode 1 is a substrate,
`32 and the capacitor electrode 33, a semiconductor layer 35 2 is a gate electrode,
`formed on the gate insulating layer 34, and a source electrode 3 is a capacitor electrode,
`38 and a drain electrode 39 separately formed and electrically 40 4 is a gate insulating film,
`connected to the semiconductor layer 35. Further, the thin 5 is a semiconductor layer.
`自lmtransistor also has a protective film 36 in some cases.
`6 is a protective film,
`In the thin白lmtransistor 50 having an existing structure, 6a is an under protective film,
`the gate insulating layer 34 isolates the source electrode 38 6b is an upper protective film,
`from the gate electrode 32. However, an electrical field may 45 7a is a first opening section of a protective film,
`easily gather at an edge of the gate electrode 32. Further, a 7b is a second opening section of a protective film,
`tapered part of the edge of the gate electrode tends to be 7 c is a third opening section of a protective film,
`poorly covered by the gate insulating layer. Thus, a leak 8 is a source electrode,
`current may easily occur between the gate electrode 32 and 9 is a drain electrode,
`the source electrode 38.
`50 10 is an inter-layer insulating film,
`百1epurpose of the present invention is to provide a thin 11 is a pixel electrode,
`自lmtransistor and an image display unit which can uniformly 12 is a display element,
`and steadily operate in which a leak cu汀 entbetween a gate 13 is a counter electrode,
`electrode and a source electrode is reduced by improving 14 is a counter substrate,
`insulating properties between the gate electrode and the 55 20 is an image display unit,
`source electrode.
`30 is a thin film transistor,
`Patent Document 1:・JP-A2002-353463
`31 is a substrate,
`32 is a gate electrode,
`33 is a capacitor electrode,
`60 34 is a gate insulating layer,
`One embodiment of the present invention is a thin film 35 is a semiconductor layer,
`transistor having a substrate, a gate electrode formed on the 36 is a protective film,
`substrate, a gate insulating film, a semiconductor layer 38 is a source electrode,
`formed on the gate insulating film, a protective film formed on 39 is a drain electrode,
`the semiconductor layer and the gate insulating film and 65 41 is inter-layer insulating film,
`having first and second opening sections which are separately 42 is a pixel electrode,
`and directly formed on the semiconductor layer, a source 43 is a display element,
`
`BACKGROUND OF THE INVENTION
`
`Field of the Invention
`
`SUMJ\ι生RYOF THE INVENTION
`
`10
`
`

`

`US 8,487,308 B2
`
`3
`
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`Vapor Deposition) method, a hot
`method or the like. However, a usable method is not limited to
`these.
`First, wirings of the gate electrode 2 and the capacitor
`5 electrode 3 are respectively formed on the substrate 1. The
`electrode part and the wiring part are not required to com-
`pletely separate from each other. Particularly, in the present
`The embodiments of the present invention will be invention, a combination of the wiring part and the electrode
`explained below referring the diagrams. The same constituent part is called an electrode as a constituent element of the thin
`elements have the same identical signs in the embodiments 10 film transistor. In addition, when there is no necessity to
`and therefore duplicative explanations between the embodi- distinguish the wiring from the electrode, gate, source, drain
`itted.
`and capacitor are used to describe the constituent combining
`
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`DETAILED DESCRIPTION OF THE INVENTION
`
`Respective constituents of the present invention will be
`explained in detail below in line with a method for manuf: c-
`
`FIG. 1 is a schematic plane view showing approximately the electrode and the wiring.
`In the thin film transistor 30 of the present invention shown
`one pixel of a thin film transistor 30 of an embodiment of the
`15 in FIG. 1, the combinations of the gate electrode-the gate
`present invention. FIGS. 2 and 3 are schematic cross-sヤー wiring and the capacitor electrode-the capacitor wiri時 e
`tional d時 ramsshowing叩 proximatelyo田 pixelof a中m formed in stripe shapes. Therefore, the仙 1白lmtran凶 or
`film transistor of an embodiment of the present invent10n. a汀 aycan be arranged on the lines of the gate and the capaci-
`A-A' in FIG. 1 co汀 espondsto those ofFIGS. 2 and 3. The thin tor.
`自lmtransistor 30 of the present invention has a gate electrode 20 As a material for the respective electrodes (the gate elec-
`2 formed on a substrate 1, a gate insulating film 4 formed on trode 2, the source electrode 8, the drain electrode 9, the
`the gate electrode 2 so as to cover the gate electrode 2, a capacitor electrode 3 and a pixel electrode 11) and the wirings
`semiconductor layer 5 formed on the gate insulating film 4, connected to the respective electrodes, an oxide material such
`and a source electrode 8 and a drain electrode 9 connected to as indium oxide (In203), tin oxide (Sn02), zinc oxide (ZnO),
`the semiconductor layer. In addition, a protective film 6 is 25 cadmium oxide （α0), indium cadmium oxide (Cdln204),
`formed on the semiconductor layer. Furthermore, the source cadmium tin oxide (Cd2Sn04), zinc tin oxide (Zn2Sn04) or
`electrode and the drain electrode are connected to the semi- Indium zinc oxide (In Zn 0) can be used. In addition to
`conductor layer through a first opening section 7 a and a thus, an oxide material in which an impurity is doped in order
`second opening section 7 b of the protective film which are to improve properties such as electrical properties, optical
`separately and directly arranged on the semiconductor layer. 30 properties and chemical resistance properties can also be
`The protective film located under a drain electrode 9 has a preferably used. For example, a material consisted of indium
`third opening section 7c.百iedrain electrode 9 is formed on oxide doped with tin (Sn), molybdenum (Mo) or titanium
`the capacitor electrode 3 sandwiching the gate insulating film (Ti), a material consisted of tin oxide doped with antimony
`4 there between.
`(Sb) or fluorine (F), and. a material consisted of
`35 doped with indium, alummum or gallium (Ga) or the like can
`be used. In particular, indium tin oxide consisted of indium
`oxide doped with tin (Sn) is preferably used among the ab
`turing an image display unit・
`mentionedmaterials in terms ofits excellent transparency and
`As a material for the substrate 1 in the embodiment of the high resistivity.
`present invention, in particular, polymethylmethacrylate, 40 Moreover, a stacked layer having the above mentioned
`polyacrylates, polycarbonate, polystyrene, poly( ethylene- conductive oxide material and a metal thin film such as gold
`sulfide), polyethぽ sulfone,polyole白1,polyethylene tereph- (Au), silver (Ag), coppぽ （Cu),cobalt (Co), tantalum (Ta),
`thalate, polyethylene naphthalate, cycloolefin polymers, tri- molybdenum (Mo), chrome (Cr), aluminum (Al), nickelic
`acetylcellulose, a polyvinyl fluoride film, an ethylene- (Ni), tungsten (W), platinum (Pt) or titanium (Ti) can also be
`tetrafluoroethylene copolymer resin, weather-resistant 45 used. In this case, in order to prevent a metal material from
`polyethylene terephthalate, weather-resistant polypropylene, oxidation and time degradation, particularly, a three-layer
`a fiberglass reinforced acrylate resin film, fiberglass rein- struc印 rein which a conductive oxide thin film/a metal thin
`forced polycarbonate, transparentpolyimide, a fluorine series film/a conductive oxide thin film are stacked in this order can
`resin, a cyclic polyolefin series resin, a glass, a quartz or the be preferably used.百1emetal thin film layer is preferably as
`like can be used. However, a usable material is not limited to so thin as possible in order that visibility of the display unit is not
`these in the present invention. The above mentioned material interrupted by light reflection or light absorption of the metal
`can be used alone or two or more materials can be stacked as thin film layer. In particular, the thickness of the metal thin
`a composite substrate 1.
`film layer is preferably equal to more than 1 nm and equal or
`When the substrate 1 in the embodiment of the present less than 20 nm.
`invention is an organic film, a transparent gas barrier layer 55 Furthermore, an oxide conductive material such as PEDOT
`(not illustrated) is preferably formed in order to improve (poly(3,4-ethylenedioxythiophene)) or the like can also be
`durability of the thin film transistor. As a material for the gas preferably used.
`barrier film, aluminum oxide (Al203), silicon oxide (Si02),
`When transparency is not required, a metal material having
`silicon nitride (SiN), silicon oxynitride (SiON), silicon Car- a light blocking effect can be used. In particular, the above
`bide (SiC), diamond-like carbon or the like can be used. 60 described metal such as gold (Au), silver (Ag), copper (Cu),
`
`However, a usable material is not limited to these. In addition, cobalt (Co), tantalum (Ta), molybdenum (Mo), chrome (C。，
`
`the gas barrier layer can be used by stacking two or more aluminum (Al), nickelic (Ni), tungsten (W), platinum (Pt) or
`layers of the materials.百1egas barrier layer may be formed titanium (Ti) can be used.
`on only one side or both sides of the substrate formed of an
`In addition, a material having a light blocking effect can be
`organic film. The gas barrier layer can be formed by a vacuum 65 used only forone part of the electrodes and of the wirings. For
`deposition method, an ion plating method, a spu壮ering example, in the image display unit of the present invention,
`method, a laser abrasion method, a plasma CVD (Chemical when the gate and the source are formed in an area other than
`
`11
`
`

`

`US 8,487,308 B2
`
`5
`6
`Furthermore, when there is no necessity for the semicon-
`a display area such as a black matrix area, the gate and the
`source can be formed of the metal material having the light ductor layer to be transparent, as other inorganic materials
`blocking effect.
`which can be used, a silicon semiconductor such as hydroge-
`百1erespective electrodes and the respective wirings may nated amorphous silicon, microcrystal silicon, multicrystal
`be formed of the same material or different materials and may 5 silicon or single crystal silicon can be exemplified.
`have the same stacked structure or different stacked struc-
`The inorganic material such as the above described oxide
`tures. However, the gate-the capacitor, and the source-the semiconductor or the silicon semiconductor can be formed by
`drain are preferably formed of the same material or preferably a CVD method, a sputtering method, a pulsed laser deposition
`have the same stacked structure in order to reduce the number method, a vacuum deposition method or a sol gel method. As
`10 a CVD method, a hot wire CVD method and a plasma CVD
`ofm組 ufacturingprocesses.
`The respective electrodes and wirings can be formed by a method can be exemplified. As a sputtering method, a RF
`vacuum deposition method, an ion plating method, a spu壮er- magnetron sputtering method and a DC sputtering method
`ing method, a laser abrasion method, a plasma CVD method, can be exemplified. As a vacuum deposition method, a heat-
`a photo CVD method, a hot-wire CVD method, a screen ingdeposition, an electron beamdepositionandanionplating
`printing method, a relief printing method, aninkjetmethodor 15 method can be exemplified. However, a usable method is not
`the like. However, a usable method is not limited to these and limited to these.
`heretofore known general methods can be used. Patterning
`In addition, as the semiconductor layer formed of an
`can be carried out, for example, by forming the protective film organic material, a low molecule organic semiconductor such
`on a p副 emformation area by a photolithographic method as tetracene, pentacene, oligothiophene derivatives, phthalo-
`and by removing unnecessary pa出 byetching. However, a 20 cyanine type or perylene derivative or a high molecule
`usable method is also not limited to there and heretofore organic semiconductor such as polyfluorene, polyphenyle-
`known general patterning methods can be used.
`nevinylene or polytriallylamine can be exemplified. How-
`Next, the gate insulating layer 4 is formed so as to cover the ever, a usable material is not limited to these. These materials
`gate electrode. The gate insulating layer 4 can be formed on can be formed and p副 ernedby each printing method such as
`the entire surface of the substrate. As a material for the gate 25 a relief printing method, an off-set printing method, a screen
`insulating layer 4 of the embodiment of the present invention, printing method or an ink-jet method. Further, a thickness of
`an inorganic material such as silicon oxide, silicon nitride, the semiconductor layer 5 is preferably equal to or more than
`silicon oxynitride, aluminum oxide, tantalum oxide, y壮rium 20nm.
`oxide, hafnium oxide, hafnium alminate, zirconium oxide or
`Next, the protective film 6 is formed as shown in FIGS. 2
`titanium oxide, polyacrylate, such as PMMA (polymethyl- 30 and 3. The protective film 6 is formed so as to at least cover the
`methacrylate) or the like, PVA (polyvinyl alcohol), PS (poly- semiconductor layer 5 in order to protect the semiconductor
`styrene), transparent polyimide, polyester, epoxy, polyvi- layer 5 at the time of patterning the source electrode 8 and the
`nylphenol, polyvinyl alcohol or the like can be used. drain electrode 9. The respective electrodes and the semicon-
`However, a usable material is not limited to these. A resistiv- ductor layer 5 are in touch with one another only at opening
`ity of an insulating material is preferably equal to or more 35 sections 7a and 7b. Further, the protective film 6 is formed on
`than 1011 Qcm, more preferably equal to or more than 1014 the entire surface of the substrate 1 and has an opening section
`Qcm in order to control a gate leak current.
`only at a predetermined part such as an opening section 7c.
`The gate insulating film 4 can be arbitrarily formed by a dry Therefore, sealing properties can be improved.
`自lm-formationmethod such as a vacuum deposition method,
`In other words, since the protective film 6 in the embodi-
`an ion plating method, a sputtering method, a laser abrasion 40 ment of the present invention is formed so as to at least cover
`method, a plasma CVD method, a photo CVD method, or a the semiconductor layer 5, the semiconductor layer 5 can be
`hot-wire CVD method or a wet film-formation method such protected from influence of the outside. In particular, the
`as a spin coating method, a dip coating method or a screen protective film 6 is preferably formed on the entire surface of
`printing method or the like depending on a material for the a pixel area and has opening sections only at predetermined
`gate insulating film 4. The gate insulating film 4 can be a 45 parts in order to improve sealing properties. In addition, insu-
`single layer or a multi-layer in which two or more layers are lating properties can be improved by forming a thickness of
`stacked. In addition, the gate insulating film 4 may be a layer the insulating film so as to be substantially thick between the
`which has a composition sloping toward growth direction of gate electrode and the source electrode/the drain electrode.
`the film.
`Thus, a leak current and a parasitic capacity that may occur
`Next, the semiconductor layer 5 is formed on the insulating 50 between the gate electrode and the source electrode/the drain
`film 4 where the gate electrode 2 is formed directly under- electrode can be reduced. Further, when a capacitor electrode
`neath, as shown in FIGS. 1-3.
`3 is a汀 anged,a third opening section 7c may be formed
`As the semiconductor layer 5 in the embodiment of the between the capacitor electrode 3 and the drain electrode 9 in
`present invention, non-single crystal silicon, an organic com- order not to damage an electrostatic capacity.
`pound or metal oxide can be used.
`55 A shape of the protective film 6 is preferably formed such
`As the semiconductor layer 5 in the embodiment of the that the edge parts of opening sections are in a forward
`present invention, an oxide semiconductor material which tapered shape. By forming the edge parts in the forward
`has metal oxide as a main component can be used. As the tapered shape, the edge parts of the opening sections of the
`oxide semiconductor material, zinc oxide (ZnO), indium protective film 6 have a blunt angle. Hence, the source elec-
`oxide (InO), indium zinc oxide (In Zn 0), tin oxide 60 trode and the drain electrode can be formed on uneven parts of
`(SnO), tungsten oxide (WO), indium gallium zinc oxide the edge 戸 市 ofthe opening sections without disconnecting
`(Irト -Ga Znー0)or the like which includes one or more even by a film-formation method having a high linearity.
`elements among zinc (Zn), indium (In), tin (Sn），印ngsten
`In order to form the opening sections of the protective film
`(W), magnesium (Mg) and gallium can be used.
`in the forward tapered shape, when the protective film is
`A Structure of these materials may be single crystal, mul- 65 formed of a resin compound, a material having a thermal
`ticrystal, micro crystal, mixed crystal of crystaνamorphous, reflow property or the like can be used and when the protec-
`tive film is formed of a photosensitive material, a proximity
`nanocrystal sca壮eringamorphous or amorphous.
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`US 8,487,308 B2
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`exposure or the like can be used. By using these materials, the resist for patterning the under protective film 6a can be used
`forward tapered shape can be easily formed. In addition, for the upper protective film 6b as the material is not removed.
`when the protective film 6 is formed of an inorganic material, In particular.，自rst,the under protective film 6a is formed on
`the tapered shape can be controlled by controlling etching the entire surface of the substrate. Then, the upper protective
`conditions by a reactive ion etching method (RIE) or the like. s film 6b is formed and patterned thereon. When the upper
`As a material for the protective film 6 in the embodiment of protective film 6b is patterned, degradation in the semi con-
`the present invention, an inorganic insulating material such as ductor layer caused by a developer used in a photolitho-
`silicon oxide, silicon nitride, silicon oxynitride, aluminum graphic process or etching can be prevented because of the
`oxide, tantalum oxide, y壮rium oxide, hafnium oxide, under protective film 6a. Next, a part of the under protective
`hafnium alminate, zirconium oxide or titanium oxide, poly- 10 film 6a which is not covered with the upper protective film 6b
`acrylate such as PMMA (polymethylmethacrylate ), or an is removed using the protective film 6b as an etching stopper
`organic insulating material such as PVA (polyvinyl alcohol), or a resist. In this case, an organic insulating material which
`PS (polystyrene), transparent polyimide, polyester, epoxy or may be easily patterned is preferably used for the upper
`polyvinylphenol can be used. However, a usable material is protective film 6b. For the under protective film 6a, an inor-
`not limited to these. For example, a material in which an 15 ganic insulating material having an excellent barrier property
`inorganic insulating material is mixed with an organic insu- and a excellent durability, in particular metal oxide (including
`lating material can be used. A resistivity of the protective film oxynitride) or metal nitride, can be preferably used.
`6 is preferably equal to or more than 1011 Qcm, more prefer-
`In addition, in particular, when metal oxide is used for the
`ably equal to or more than 1014 Qcm in order not to electri- semiconductor layer 5, semiconductor properties are signifi-
`cally effect the semiconductor layer of the thin film transistor 20 cantly influenced by a composition of the protective film
`of the present invention.
`which covers the surface of the semiconductor layer. How-
`百1eprotective film 6 can be arbitrarily formed by a dry ever, by separately forming the upper protective film 615 and
`film-formation method such as a vacuum deposition method, the under protective film 6a which is in touch with the semi-
`an ion plating method, a spu壮eringmethod, a laser abrasion conductor layer 5, a forming method and a material for the
`method, a plasma CVD method, a photo CVD method or a 25 upperprotectivefilm6bbecomemoreflexibleandfurther, the
`hot-wire CVD method, or a wet film-formation method such properties of the semiconductor layer can be maintained and
`as a spin-coating method, a dip-coating method or a screen improved because of the under protective film 6a. As the
`printing method depending on its material. The protective under protective film 6a, a metal nitride insulating material
`film 6 may be formed by o manufacturing method or multiple having excellent barrier properties such as silicon nitride or
`manufacturing methods and may have a multilayer structure 30 silicon oxynitride or a metal oxide insulating material having
`in which two or more layers are stacked as described below. an effect of doping a carrier into the semiconductor layer 5
`Since the protective film 6 is formed before the source such as silicon oxide, aluminum oxide, tantalum oxide,
`electrode and the drain electrode, the protective film works as y仕riumoxide, hafnium oxide or silicon oxynitride can be
`an etching stopper. Hence, the source electrode 8 and the exemplified. When the metal oxide insulating material is used
`drain electrode 9 can be formed without damaging a channel 35 for the under protective film 6a which is in touch with the
`part of the semiconductor layer 5. Further, before the source semiconductor layer 5, the TFT properties can be improved
`electrode and the drain electrode are formed, a surface pro- by changing a carrier concentration of the semiconductor
`cessing can be performed on an exposed area of the semicon- layer, as an oxygen concentration in the protective film is
`ductor layer 6. The surface processing is carried out a武erthe controlled by controlling oxygen partial pressure at the time
`opening sections of the protective film 6 are formed and the 40 of forming the film.
`connection parts of the semiconductor layer and the source
`The protective film having a multilayer structure can be
`electrode/the drain electrode are exposed. Therefore, the sur- easily formed by the above described process. As a ma壮erof
`face processing can be performed only on connection parts. course, in this case, the protective film 6b can further be a
`For example, when the semiconductor layer is a silicon semi- multilayer and have a multi-layer structure. For example,
`conductor or the like formed of an inorganic material, a con- 45 when the metal oxide semiconductor is used, the metal oxide
`tact resistance of the semiconductor layer 5 and the source insulating material capable of controlling the semiconductor
`electrode 8/the drain electrode 9 can be reduced by injecting properties may be used for the layer having contact with the
`an ion into a part where the electrodes make contacts. In semiconductor layer 5 and the metal nitride insulating mate-
`addition, when the semiconductor layer 5 is formed of a metal rial having excellent barrier properties may be used for the
`oxide material, conductive properties of the connection parts so layer thereon.
`where the exposed semiconductor layer 5 and the source
`Next, the source and the drain are formed. First, a film of a
`electrode 8/the drain electrode 9 make contacts can be conductive material of a wiring material and an electrode
`improved by irradiating only the connection parts with material is formed on the entire surface of the substrate and
`plasma using a gas such as Ar, He or hydrogen while the covers the substrate including the protective film 6. Then, the
`channel parts of the semiconductor layer 5 are protected. 55 source electrode and the drain electrode are patterned so as to
`Therefore, the contact resistance of the semiconductor respecti