Petitioner Bluehouse Global Ltd.
`Petitioner Bluehouse Global Ltd.
`
`Ex. 1004
`Ex. 1004
`
`

`

`as) United States
`a2) Patent Application Publication 10) Pub. No.: US 2008/0299693 Al
`(43) Pub. Date: Dec. 4, 2008
`
`Toyotaetal.
`
`US 20080299693A1
`
`(54) MANUFACTURING METHOD FOR DISPLAY
`DEVICE
`
`(75)
`
`Inventors:
`
`Yoshiaki Toyota, Hachioji (JP);
`Takeshi Sato, Kokubunji (JP)
`
`Correspondence Address:
`Stanley P. Fisher
`Reed Smith Hazel & Thomas LLP
`Suite 1400, 3110 Fairview Park Drive
`Falls Church, VA 22042-4503 (US)
`
`(73) Assignee:
`
`Hitachi Displays, Ltd.
`
`(21) Appl. No.:
`
`12/155,204
`
`(22)
`
`Filed:
`
`May30, 2008
`
`(30)
`
`Foreign Application Priority Data
`
`May 31, 2007
`
`(JP) oo.eeeeeeeeecteeeeeeteneees 2007-144957
`
`Publication Classification
`
`(51)
`
`Int. Cl.
`(2006.01)
`HOIL 33/00
`(52) US. CMe ieececsessssssssssssneereeeeees 438/34; 257/E33.053
`
`(57)
`
`ABSTRACT
`
`A manufacturing method for a display device having a first
`conductive type thin film transistor and a second conductive
`type thin film transistor, comprising the steps of: in formation
`regions for a first conductive type thin film transistor and a
`second conductive type thin film transistor forming a semi-
`conductorlayer, a first insulating film covering the semicon-
`ductor layer and a gate electrode disposed on the first insu-
`lating film so as to intersect the semiconductor layer, on
`substrate having first conductive type impurity regions on
`both outer sides of a channel region of the semiconductor
`layer below the gate electrode forming a second insulating
`film, in the second insulating film andthefirst insulating film
`forming a contact hole for a drain electrode and a source
`electrode, in the formation region for the second conductive
`type thin film transistor forming electrodes and a second
`conductive type impurity region.
`
`PAS
`
`ST
`
`SUB1
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 1 of 11
`
`US 2008/0299693 Al
`
`
`
`

`

`Patent Application Publication
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`Dec. 4, 2008 Sheet 2 of 11
`
`US 2008/0299693 Al
`
`FIG2
`
`x
`
`SUB1
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 3 of 11
`
`US 2008/0299693 Al
`
`DL
`
`
`
`
`FL <PX)
`
`SUB1
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 4 of 11
`
`US 2008/0299693 Al
`
`(NTFT)
`
`(PTFT)
`
`(PX)
`
`Gl
`
`PS
`
`Gl
`
`PS
`
`Gl
`
`FIG4A
`
`SUB1
`
`FL
`
`SUB1
`
`FL
`
`SUB1
`
`FL
`
`
`
`GI
`
`SUB1
`
`FL
`
`GI
`
`(n+)
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`GT
`GI
`AO
`“(n+) (n+)
`
`AO
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`
`FIGAC
`
`FIG.4D
`
`SUB1
`
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`
`SUB1
`
`FL
`
`SUB1
`
`FL
`
`GI
`
`(n—)
`
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`(n—)
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`
`FL
`
`
`
`SUB1
`
`FL.
`
`GI
`
`SUB1
`
`FL
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 5 of 11
`
`US 2008/0299693 Al
`
`(NTFT)
`
`(PTFT)
`
`GI
`
`(Px)
`
`IN
`
`FL
`
`IN
`
`SUB1
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`SUB1
`
`t GT a
`
`te IN
`
`al
`
`FIGSB
`
`(n+)
`SUB1
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`
`(n+) SUB1(,—
`
`FL
`
`SUB1
`
`FL
`
`eensseel
`FIG5C
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 6 of 11
`
`US 2008/0299693 Al
`
`FIGGA ere OT”
`
`ST
`
`PAS
`
`Px
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 7 of 11
`
`US 2008/0299693 Al
`
`
`
`
`
`CNL2=CNL1 GT
`
`CNL2
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 8 of 11
`
`US 2008/0299693 Al
`
`
`
`SUB1
`
`FL
`
`SUB1
`
`GT
`
`FL
`
`(NTFT)
`
`<PX)
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 9 of 11
`
`US 2008/0299693 Al
`
`
`FL “SD
`
`Ty
`Gl pp GT CH
`
`(NTFT)
`
`(PTFT)
`
`FIG.9B
`IN
`
`PAS
`
`FIG.9C
`CNL(U) IN
`
`DT(U
`
`
`JT(U)
`Na,
`iP JT(D)
`JT(D) ptcp) h
`mlzzin
`ieayo
`
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 10 of 11
`
`US 2008/0299693 Al
`
`(PTFT)
`<NTFT)
`PS (nm) a GPS (n-)¢
`
`
`
`=
`
`FIG.10AsuB1 FL=SUB1 ———
`cu int)
`Gl
`po (nt) (1H
`
`<PX)
`
`SUBT
`
`SUB1
`
`CNL1 CNL2
`
`cnt '\ cnL2
`
`CNL2
`CNL1
`
`LaineADPDREPLIEDELLEDOLEDEREDDEEEE
`
`
`
`FIG.10C SUB1
`
`
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`
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`
`
`IN
`
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`
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`
`FL
`
`(n+)
`
`CNL2
`
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`
`suBt
`
`Gl
`
`

`

`Patent Application Publication
`
`Dec. 4, 2008 Sheet 11 of 11
`
`US 2008/0299693 Al
`
`{PX)
`
`CNL2 ont
`
`(p+) IN GT (p+)
`
`SUB1
`
`IN
`
`CNL2
`
`CNL1
`
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`
`
`
` ST
`
`IN
`
`PAS
`
`IN
`
`PAS
`
`PAS
`
`PX
`
`SUB1
`
`FIG.A1A
`
`FIG.11B
`
`FIG.11C
`
`

`

`US 2008/0299693 Al
`
`Dec. 4, 2008
`
`MANUFACTURING METHOD FOR DISPLAY
`DEVICE
`
`INCORPORATION BY REFERENCE
`
`[0001] The present application claimspriority from Japa-
`nese application JP2007-144957 filed on May 31, 2007, the
`content ofwhich is hereby incorporated by referenceintothis
`application.
`
`BACKGROUND OF THE INVENTION
`
`[0002] The present invention relates to a manufacturing
`method for a display device. More particularly, the present
`invention relates to a manufacturing method for a display
`device including a substrate having formed thereon an
`n-channel type thin film transistor and a p-channel type thin
`film transistor.
`
`[0011] A summary ofrepresentative aspects of the inven-
`tion disclosed in the present application will be described in
`brief as follows:
`
`(1) A manufacturing method for a display device
`[0012]
`according to the present invention, for example, including
`a substrate having formed thereon a first conductive type
`thin film transistor and a second conductive type thin film
`transistor, the method comprising the steps of:
`[0013]
`preparing a substrate having respective formation
`regions for a first conductive type thin film transistor and a
`second conductive type thin film transistor, in which a semi-
`conductorlayer, a first insulating film covering the semicon-
`ductor layer, and a gate electrode disposed onthefirst insu-
`lating film so as to intersect the semiconductor layer are
`formed andfirst conductive type impurity regions are formed
`on both outer sides of a channel region of the semiconductor
`layer below the gate electrode;
`[0014]
`forming a secondinsulating film on the substrate so
`as to also cover the gate electrode, and forming in the second
`insulating film and thefirst insulating film a contact hole used
`for connection between a drain electrode and a source elec-
`
`[0003] A so-called active matrix type display device has a
`structure in which a plurality of matrix-arranged pixels are
`providedonits display so as to sequentially select each pixel
`column by turning on a thin film transistor provided in each
`trode, the contact hole being formed so as not to expose the
`pixel of the pixel column by scanning signals supplied via a
`gate electrode in the formation regionfor the first conductive
`gate signalline and soasto supply videosignals to each ofthe
`type thin film transistor and so asto partially expose each side
`pixel electrodes PX via the drain signal line DL connected in
`of the gate electrode intersecting the semiconductor layer in
`commonto the pixels of another pixel column corresponding
`the formation region for the second conductive type thin film
`to the respective pixels ofthe pixel column in conformity with
`transistor;
`this selection timing.
`[0015]
`forming the drain electrode and the source electrode
`[0004]
`Further, on a substrate having formed thereon the
`using a multilayer conductive layer including an upper con-
`display, a circuit (scanning signal drive circuit) that supplies
`ductive layer and a lower conductive layer an outline ofwhich
`scanning signals to each ofthe gate signal lines and a circuit
`protrudes outward from thatofthe upper conductivelayer, the
`(video signaldrive circuit) that supplies video signals to each
`drain electrode and the source electrode being formed soas to
`of the drain signal lines are formed in the vicinity of the
`cover each of the contact holes in the formation region for the
`display. Any of these circuits are constituted ofa plurality of
`first conductive type thin film transistor and so as to cover a
`CMOScircuits. The CMOScircuit is a circuit formed by
`portion of each of the contact holes facing the gate electrode
`complementarily connecting an n-channel type transistor and
`in the formation region for the second conductive type thin
`a p-channeltype transistor to each other.
`film transistor; and
`[0005]
`In this case, there is knowna circuit having a struc-
`ture in which eachtransistor of each ofthe circuits formed in
`[0016]
`forming by doping second conductive type impuri-
`ties a second conductive type impurity region in the semicon-
`the vicinity of the display is formed by a pair of thin film
`ductorlayer having a portion having formed thereon none of
`transistors and is formed along with the formation of each of
`the electrodes and having a portion having formed thereon
`the pixels.
`only the lower conductivelayer in each ofthe contact holes in
`[0006] The display device having suchastructure is dis-
`the formation region for the second conductive type thin film
`closed, for example, in Japanese Unexamined Patent Appli-
`transistor.
`cation Publication No. 2006-186397.
`
`SUMMARYOF THE INVENTION
`
`[0007] However, when forming the CMOStransistor in a
`display device having the above-described structure,
`it is
`necessary to dope n-type impurities in a semiconductorlayer
`of one thin film transistor to form source and drain regions
`and to dope p-type impurities in a semiconductorlayer of the
`other thin film transistor to form source and drain regions.
`[0008]
`In this case, there is adopted a method of forming
`source and drain regions in the semiconductor layer of one
`thin film transistor, then covering the one thin film transistor
`with a mask made of a photoresist film and doping impurities
`in the semiconductorlayerof the other thin film transistor.
`[0009] Therefore, it is inescapable that a photolithographic
`process for forming the mask is required and the numberof
`man-hours for manufacture increases.
`
`[0010] Accordingly, it is an object of the present invention
`to provide a manufacturing method for a display device in
`which the photolithographic process is reduced.
`
`(2) The manufacturing method for a display device
`[0017]
`according to the present invention is, for example, on the
`premise of the constitution (1), characterized in that the
`semiconductor layer is madeof polysilicon.
`[0018]
`(3) The manufacturing method for a display device
`according to the present invention is, for example, on the
`premise of the constitution (1), characterized in that the
`first conductive type impurity regions formed on both outer
`sides of a channel region ofthe semiconductorlayer below
`the gate electrode include low concentration first conduc-
`tive type impurity regions formed on both outer sides ofthe
`channel region and high concentration first conductive type
`impurity regions formed on an outerside of the respective
`low concentration first conductive type impurity regions.
`[0019]
`(4) The manufacturing method for a display device
`according to the present invention is, for example, on the
`premise ofthe constitution (1), characterized in that each of
`the drain electrode and the source electrode is formed by
`etching using as a mask a photoresist film formed on a
`surface ofa layered product including the lower conductive
`
`

`

`US 2008/0299693 Al
`
`Dec. 4, 2008
`
`layer and the upper conductive layer, and the upper con-
`ductive layer is etched larger than the lower conductive
`layer by side etching with respect to the mask.
`[0020]
`(5) The manufacturing method for a display device
`according to the present invention is, for example, on the
`premise of the constitution (1), characterized in that the
`gate electrode and the lower conductive layer are made of
`the same material.
`
`(6) The manufacturing method for a display device
`[0021]
`according to the present invention is, for example, on the
`premise of the constitution (5), characterized in that the
`gate electrode and the lower conductive layer are made of
`tungsten or a tungsten alloy.
`[0022]
`(7) The manufacturing method for a display device
`according to the present invention is, for example, on the
`premise of the constitution (1), characterized in that a
`plurality of pixels are formedon the substrate, and each of
`the pixels has a thin film transistor turned-on by scanning
`signals from a gate signal line and a pixel electrode to
`which video signals from a drain signal line are supplied
`via the turned-onthin film transistor, the thin film transistor
`being one thin film transistor of the first conductive type
`thin film transistor and the second conductive type thin film
`transistor.
`
`(8) The manufacturing method for a display device
`[0023]
`according to the present invention is, for example, on the
`premise of the constitution (7), characterized in that a
`scanning signal drive circuit that supplies scanning signals
`to each of the gate signal lines and a video signal drive
`circuit that supplies video signals to eachofthe drain signal
`lines are formed on the substrate; and
`[0024]
`the scanning signal drive circuit and the video signal
`drive circuit have thefirst conductive typethin film transistor
`and the second conductive type thin film transistor.
`[0025]
`(9) A manufacturing method for a display device
`according to the present invention, for example, including
`a substrate having formed thereona first conductive type
`thin film transistor and a second conductive type thin film
`transistor, the method comprising the steps of:
`[0026]
`preparing a substrate having respective formation
`regions for a first conductive type thin film transistor and a
`second conductive type thin film transistor, in which a gate
`electrode, a first insulating film covering the gate electrode,
`and a semiconductorlayer disposed on thefirst insulating film
`so as to intersect the gate electrode are formed;
`[0027]
`forming a secondinsulating film on the substrate so
`as to also cover the semiconductor layer, and forming in the
`second insulating film a contact hole used for connection
`between a drain electrode and a source electrode;
`[0028]
`forming a first conductive type impurity region in
`the semiconductor layer by doping a first conductive type
`impurity using the second insulating film as a mask;
`[0029]
`forming a multilayer conductive layer including an
`upper conductive layer and a lower conductive layer an out-
`line of which protrudes outward from that of the upper con-
`ductive layer, on the second insulating film above the gate
`electrode in the formation region for the second conductive
`type thin film transistor, and forming the drain electrode and
`the source electrode using the multilayer conductive layer so
`as to cover each of the contact holes in the formation region
`for the first conductive type thin film transistor and so as to
`cover a portion of each of the contact holes facing the gate
`electrode in the formation region for the second conductive
`type thin film transistor;
`
`forming by doping a second conductive type impu-
`[0030]
`rity of high concentration a second conductive type impurity
`region in the semiconductor layer having a portion having
`formed thereon noneofthe electrodes and having a portion
`having formed thereon only the lower conductive layer in
`each of the contact holes in the formation region for the
`second conductive type thin film transistor; and
`[0031]
`forming in the semiconductorlayer a channel region
`with second conductive type impurities by doping second
`conductive type impurities of low concentration through the
`drain electrode and the source electrode ofthe first conductive
`
`type thin film transistor.
`[0032]
`(10) The manufacturing methodfor a display device
`according to the present invention is, for example, on the
`premise of the constitution (9), characterized in that the
`multilayer conductive layer formed on the secondinsulat-
`ing film abovethegate electrodein the formation region for
`the second conductive type thin film transistor is formed
`such that a side portion of the lower conducive layer inter-
`secting the semiconductorlayer is formed on an innerside
`of a corresponding sidewall surface of the second insulat-
`ing film; and
`[0033]
`the second conductive type impurity of low concen-
`tration is doped to form respective second conductive type
`regions on both outer sides of the channel region of the
`semiconductorlayer.
`[0034]
`(11) The manufacturing methodfor a display device
`according to the present invention is, for example, on the
`premise of the constitution (9), characterized in that a
`plurality of pixels are formed on the substrate, and each of
`the pixels has a thin film transistor turned-on by scanning
`signals from a gate signal line and a pixel electrode to
`which video signals from a drain signal line are supplied
`via the turned-onthin film transistor, the thin film transistor
`being one thin film transistor of the first conductive type
`thin film transistor and the second conductive type thin film
`transistor.
`
`(12) The manufacturing methodfor a display device
`[0035]
`according to the present invention is, for example, on the
`premise of the constitution (11), characterized in that a
`scanning signaldrivecircuit that supplies scanning signals
`to each of the gate signal lines and a video signal drive
`circuit that supplies video signals to each ofthe drain signal
`lines are formedon the substrate; and
`[0036]
`the scanning signal drive circuit and the video signal
`drive circuit have thefirst conductive typethinfilm transistor
`and the second conductive type thin film transistor.
`[0037] Here, the present invention is not limited to the
`above-mentioned constitutions, and various modifications
`are conceivable without departing from the technical concept
`of the invention.
`
`[0038] According to the manufacturing methodfor the thus
`constituted display device, the photolithographic process can
`be reduced.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIGS. 1A to 1C are block diagrams showing one
`[0039]
`embodimentof a CMOStransistor formedin a display device
`to which a manufacturing methodfora display device accord-
`ing to the present invention 1s applied;
`[0040]
`FIG. 2 is an equivalentcircuit diagram showing the
`entire display device to which the manufacturing method for
`a display device accordingto the present invention is applied;
`
`

`

`US 2008/0299693 Al
`
`Dec. 4, 2008
`
`FIGS. 3A to 3C are block diagrams showing one
`[0041]
`embodiment of pixels of the display device to which the
`manufacturing method for a display device according to the
`present invention is applied;
`[0042]
`FIGS. 4A to 4D are step views showing one embodi-
`ment of the manufacturing method for a display device
`according to the present invention, and FIGS. 5A to 5C and
`6A to 6D are views showing the whole steps;
`[0043] FIGS.5A to 5C are step views showing one embodi-
`ment of the manufacturing method for a display device
`according to the present invention, and FIGS. 4A to 4D and
`6A to 6D are views showing the whole steps;
`[0044]
`FIGS. 6A to 6D are step views showing one embodi-
`ment of the manufacturing method for a display device
`according to the present invention, and FIGS. 4A to 4D and
`5A to 5C are views showing the wholesteps;
`[0045]
`FIGS. 7A to 7D are step views showing another
`embodiment of a manufacturing methodfor a display device
`according to the present invention;
`[0046]
`FIGS. 8A to 8C are block diagrams showing another
`embodimentof pixels of a display device to which a manu-
`facturing methodfora display device accordingto the present
`invention is applied;
`[0047]
`FIGS. 9A to 9C are block diagrams showing another
`embodiment of a CMOStransistor formed in the display
`device to which the manufacturing method for a display
`device according to the present invention is applied;
`[0048]
`FIGS. 10A to 10E are step views showing another
`embodiment of the manufacturing method for a display
`device according to the present invention;
`[0049]
`FIGS. 11A to 11C are step views showing another
`embodiment of the manufacturing method for a display
`device according to the present invention; and FIGS. 10A to
`10E and FIGS. 11A to 11E are views showing the whole
`steps.
`
`[0055] Each of the drain signal lines DL is formedsothat,
`for example, its upper end is connectedto a video signal drive
`circuit H and hence, video signals are supplied to the line DL
`by the video signal drive circuit H. This video signal drive
`circuit H is constituted of a large number of CMOSthin film
`transistors CM in which an n-channel type MOStransistor
`and a p-channel type MOStransistor are complementarily
`connected to each other.
`[0056] Arectangulararea (e.g., indicated by a dotted frame
`in the figure) surrounded by adjacent onesof the gate signal
`lines and adjacent ones ofthe drain signal lines is formed as
`an area in which a pixel PIX is formed. The pixel PIX has a
`thin film transistor TFT turned on by scanning signals from
`the gate signal line GL, a pixel electrode PX to which video
`signals from the drain signal line DL are supplied via the
`turned-onthin film transistor TFT, and a capacitance element
`Cstg formed between the pixel electrode PX and a capaci-
`tance signal line CL disposed in parallel with, for example,
`the gate signal line GL.
`[0057] Additionally, the pixel electrode PX is arranged so
`as to generate an electric field with a counter electrode (not
`shown) formed on a liquid-crystal-side surface of the sub-
`strate SUB1 or on a liquid-crystal-side surface of another
`substrate SUB2 different from the substrate SUB1 and so as
`to cause molecules in a liquid crystal LC ofthe pixel to behave
`bythis electric field.
`[0058] The liquid crystal display device having such a
`structure is driven so as to sequentially select each pixel
`column by turning on the thin film transistor TFT formed in
`each ofthe pixels by scanning signals supplied via the com-
`mongate signal line GL, and so as to supply videosignals to
`each of the pixel electrodes PX via the drain signal line DL
`connected in commonto the pixels of another pixel column
`corresponding to the respective pixels of the pixel column in
`conformity with this selection timing.
`
`DETAILED DESCRIPTION OF THE INVENTION
`
`<Construction of Pixel>
`
`Preferred embodiments of a display device accord-
`[0050]
`ing to the present invention will be described below with
`reference to the figures.
`
`First Embodiment
`
`<Entire Equivalent Circuit>
`[0051]
`FIG. 2 is an equivalent circuit diagram showing, as
`aliquid crystal display device, one embodimentofthe display
`device according to the present invention.
`[0052]
`In FIG. 2, a substrate SUB1 madeof, for example,
`glass is shown. This substrate SUB1 is constituted as one
`substrate SUB1 of a pair of substrates disposed opposite each
`other through a liquid crystal interposed therebetween.
`[0053]
`Further, gate signal lines GL which extend in the x
`direction and arejuxtaposed in the y direction and drain signal
`lines DL which extendin the y direction and are juxtaposed in
`the x direction in FIG. 2 are formed on a liquid-crystal-side
`surface of the substrate SUB1.
`
`[0054] Each ofthe gate signallines GL is formedsothat, for
`example, its one end is connected to a scanning signal drive
`circuit V and hence, scanning signals are sequentially sup-
`plied to the line GL by the scanningsignal drive circuit V. This
`scanning signal drive circuit V is constituted of a large num-
`ber of CMOSthinfilm transistors CM in which an n-channel
`type MOStransistor and a p-channel type MOStransistor are
`complementarily connected to each other.
`
`FIG. 3A is a plan view showing one embodimentof
`[0059]
`a construction ofthe pixel, and showsa portion equivalent to
`an area surrounded by a dotted frame of FIG.2.
`[0060]
`Further, FIG. 3B shows a cross-sectional view taken
`along line b-b of FIG. 3A, and FIG. 3C showsa cross-sec-
`tional view taken along line c-c of FIG. 3A.
`[0061] Additionally, this pixel includes a so-called top gate
`type thin film transistor in which a gate electrode is formed on
`the upperlayer of a semiconductorlayer.
`[0062] An undercoat layer FL made of, for example, a
`silicon dioxidefilm is formed on a liquid-crystal-side surface
`of the substrate SUB1. The undercoat layer FL serves as a
`layer for preventing impurities within the substrate SUB1
`from penetrating an after-mentioned semiconductorlayer PS.
`The capacitance signal line CL is formed on a surface of the
`undercoat layer FL, and formedin a pattern partially having
`an extended portion whoseoneside has a relatively wide area.
`The extended portion is formed as one electrode CT of the
`after-mentioned capacitance elementCstg.
`[0063]
`Further, the semiconductor layer PS made ofa poly-
`silicon film is formed close to an electrode CT of the capaci-
`tance signal line CL.
`[0064] This semiconductor layer PS is formed as a semi-
`conductor layer of, for example, an after-mentioned n-chan-
`nel type thin film transistor NTFT.In the semiconductor layer
`PS, low concentration n-type impurity regions are respec-
`tively formed on both outer sides of a channel region CH
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`positioned roughly in its center, and high-concentration
`n-type impurity regions are respectively formed on an outer
`side ofthe low concentration n-type impurity regions. Each of
`the low concentration n-type impurity regions functions as an
`LDDregion,and eachofthe high concentration n-type impu-
`rity regions functions as a drain region DD and a source
`region SD.
`[0065] A source region and a drain region of the thin film
`transistor TFT changes in a state where a bias voltage is
`applied. In this specification, for convenience sake, a part
`connected to the after-mentioned drain signal line DL is des-
`ignated as the drain region DD, and a part connected to the
`pixel electrode PX is designated as the source region SD.
`[0066] On a surface of the substrate SUB1 on which the
`capacitance signal line CL and the semiconductor layer PS
`are thus formed, an insulating film (first insulating film) GI
`madeof, for example, a silicon dioxide film is formedto also
`cover these capacitance signal line CL and semiconductor
`layer PS. This insulating film GI functions as a gate insulating
`film of the n-channeltype thin film transistor NTFT.
`for
`[0067]
`Further,
`the gate signal
`line GL made of,
`example, aluminum is formed on a surface of the insulating
`film GI. This gate signal line GL has an extended portion
`overlapping the channel region CH of the semiconductor
`layer PS and this extended portion functions as the gate elec-
`trode GT ofthe thin film transistor TFT.
`
`[0068] On a surface of the substrate SUB1 on which the
`gate signal line GL is thus formed, an insulating film (second
`insulating film) IN madeof, for example,silicon dioxide film
`is formed.
`
`Further, the drain signal line DL is formed on the
`[0069]
`surface ofthe insulating film IN, and partially has an extended
`portion. The extended portion is formed as a drain electrode
`DTofthe thin film transistor TFT. This drain electrode DT is
`
`connected to a drain region DD ofthe semiconductorlayer PS
`via a contact hole TH formed throughthe insulating films IN
`and GI.
`
`Further, a source electrode ST of the n-channel type
`[0070]
`thin film transistor NTFT is formed during the formation of
`the drain signal line DL. The source electrode ST is connected
`to a source region SD of the semiconductor layer PS via the
`contact hole TH formed through the insulating films IN and
`GI.
`
`[0071] The source electrode ST is formed on the insulating
`film IN so as to overlap the electrode CT of the capacitance
`signal line CL as well as is formed to extend toward the
`central side of the pixel region. A portion of the source elec-
`trode ST overlapping the electrode CT is formed as the
`capacitance element Cstg using the insulating films IN and GI
`as a dielectric film. Further, a portion corresponding to an end
`ofthe extended portion of the source electrode ST serves as a
`connectionportion to the after-mentionedpixel electrode PX.
`[0072] Here, each of the drain signal line DL, the drain
`electrode DT andthe source electrode ST has the two-layered
`structure in which, for example, a conductive layer made of
`tungsten having a thickness of about 30 nm and a conductive
`layer made of aluminum havinga thickness of about 500 nm
`are sequentially stacked. Further, this two-layered structure
`has a structure in which a lower conductive layer protrudes
`outward from an upper conductive layer at the periphery.
`[0073] Therefore, the drain electrode DT includes a lower
`drain electrode DT(D) and an upperdrain electrode DT(U),
`and the lower drain electrode DT(D) is formed to protrude
`outward from the upperdrain electrode DT(U).
`
`the source electrode ST
`In the same manner,
`[0074]
`includes a lower source electrode ST(D) and an upper source
`electrode ST(U), and the lower source electrode ST(D) is
`formed to protrude outward from the uppersource electrode
`ST(U).
`[0075] Additionally, also in the extended endof the source
`electrode ST serving as the connection portion to the pixel
`electrode PX, the lower source electrode ST(D) is formed to
`protrude outward from the upper source electrode ST(U) as
`shown in FIG. 3C.
`
`[0076] On the surface of the substrate SUB1 on which the
`drain signal line DL, the drain electrode DT, and the source
`electrode ST are thus formed, a protective coat PAS madeof,
`for example, resin is formed. Further, on a surface of the
`protective coat PAS, the pixel electrode PX made of, for
`example, an ITO film is formed. This pixel electrode PX is
`connected to the source electrode ST via the contact hole TH
`
`formed in the protective coat PAS.
`
`<CMOSThin Film Transistor>
`
`FIG. 1A is a plan view showing one of the CMOS
`[0077]
`thin film transistors CM formed by being incorporated into
`the scanning signal drive circuit V or the video signal drive
`circuit H. FIG. 1B showsa cross-sectional view taken along
`line b-b ofFIG. 1A, and FIG. 1C shows a cross-sectional view
`taken along line c-c of FIG. 1A.
`[0078] Additionally, this CMOSthin film transistor CM is
`formed along with the formation of the pixel PIX.
`[0079]
`Inthe FIG. 1A, the CMOSthin film transistor CM
`hasa structure in which the n-channeltypethin film transistor
`NTFT and a p-channel type thin film transistor PIFT are
`arranged in parallel with each other, andthe gate electrodes of
`both the transistors are formed in common.
`
`Further, respective electrodesat the right sides in the
`[0080]
`figures ofthe n-channeltype thin film transistor NTFT and the
`p-channel type thin film transistor PTFT are connected to
`each other via a connection electrode JT.
`
`[0081] Thus, in this specification, for convenience’ sake,
`the electrode at the right side in the figure of the n-channel
`type thin film transistor NTFT constitutes the drain electrode
`DT, and the electrode at the right side in the figure of the
`p-channel
`type thin film transistor PTFT constitutes the
`source electrode ST.
`
`[0082] As shown in FIG. 1B, the n-channel type thin film
`transistor NTFT hasthe samestructure as that of the n-chan-
`
`nel type thin film transistor NTFT (refer to FIG. 3B) formed
`in the pixel PIX. Additionally, in FIG. 1B, the electrode
`connected to the source region SD ofthe semiconductor layer
`PS is named the connection electrode JT and therefore, the
`electrode is symbolized as JT(U) and JT(D).
`[0083] Therefore, the structure of the p-channel type thin
`film transistor PTFT will be mainly described in FIGS. 1A to
`1C.
`
`First, the structure of the contact holes TH used for
`[0084]
`connection between respective electrodes equivalent to the
`source/drain electrodesdiffers from thatofthe n-channel type
`thin film transistor PTFT.
`
`[0085] Thecontact hole TH is formedin theinsulatingfilms
`IN and GIafter the semiconductor layer PS, the insulating
`film GI, the gate electrode GT, andthe insulating film IN are
`formed ona surface ofthe undercoat layer FL of the substrate
`SUB1. Additionally, the contact hole TH is formed to expose
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`each side of the gate electrode GT intersecting the semicon-
`ductor layer PS in the p-channel type thin film transistor
`PTIFT.
`
`In formation regions for the contact holes TH, each
`[0086]
`electrode formed in each of the contact holes TH is formed so
`as to cover abouthalf ofa region facing the gate electrode GT.
`Further, each of the electrodes has the two-layered structure
`in which a conductive layer made of tungsten having a thick-
`ness ofabout 30 nm anda conductive layer made of aluminum
`having a thickness of about 500 nm are sequentially stacked.
`This two-layered structure is a structure in which the lower
`conductive layer is formed to protrude outward from the
`upper conductive layer on the periphery of the structure.
`[0087]
`Specifically, the drain electrode DT includes the
`lower drain electrode DT (D) and the upperdrain electrode
`DT (UV), and the lower drain electrode DT (D) is formed to
`protrude outward from the upper drain electrode DT (U). In
`the same manner, the connection electrode JT includes the
`lower connection electrode JT (D) and the upper connection
`electrode JT (U), and the lower connection electrode JT (D) is
`formed to protrude outward from the upper connection elec-
`trode JT (U).
`[0088]
`In the semiconductor layer PS, the channel region
`CH is formed in a region immediately below the gate elec-
`trode GT. In the formation regions for the respective contact
`holes TH, the drain region DD and the source region SD in
`regions immediately below the upper drain electrode DT(U)
`and the upper connection electrode JT(U)are formedas high
`concentration n-type impurity regions.
`[0089]
`Further, in the semicondu