`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`AddIESS. COMMISSIONER FOR PATENTS
`PO Box 1450
`Alexandria, Viigmia 22313-1450
`wwwusptogov
`
`APPLICATION
`NUMBER
`
`FILING or
`371(0) DATE
`
`GRP ART
`UNIT
`
`
`
`
`
`F
`
`61/324,122
`
`04/14/2010
`
`FEE REC'D
`
`220
`
`23696
`QUALCOMM INCORPORATED
`5775 MOREHOUSE DR-
`SAN DIEGO, CA 92121
`
`ATTY.DOCKET.NO
`
`TOT CLAHVIS IND CLAIMS
`
`101660P1
`
`CONFIRMATION NO. 8542
`
`FILING RECEIPT
`
`lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll lllllllllllllllllllllllllll
`00000004 239 92
`
`Date Mailed: 04/26/2010
`
`It will not be examined for patentability and will
`Receipt is acknowledged of this provisional patent application.
`become abandoned not later than twelve months after its filing date. Any correspondence concerning the application
`must include the following identification information: the US. APPLICATION NUMBER, FILING DATE, NAME OF
`APPLICANT, and TITLE OF INVENTION. Fees transmitted by check or draft are subject to collection. Please verify
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`changes noted thereon. If you received a "Notice to File Missing Parts" for this application, please submit
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`to the Notice, the USPTO will generate another Filing Receipt incorporating the requested corrections
`
`Applicant(s)
`
`Nitin Gupta, San Diego, CA;
`Daniel Kim, San Diego, CA;
`Igor Malamant, San Diego, CA;
`Power of Attorney: None
`
`If Required, Foreign Filing License Granted: 04/22/2010
`The country code and number of your priority application, to be used for filing abroad under the Paris Convention,
`is US 61/324,122
`Projected Publication Date: None, application is not eligible for pre-grant publication
`Non-Publication Request: No
`Early Publication Request: No
`Title
`
`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary
`Processor to one or More Secondary Processor in a Multi-Processor System
`
`PROTECTING YOUR INVENTION OUTSIDE THE UNITED STATES
`
`Since the rights granted by a US. patent extend only throughout the territory of the United States and have no
`effect in a foreign country, an inventor who wishes patent protection in another country must apply for a patent
`in a specific country or in regional patent offices. Applicants may wish to consider the filing of an international
`application under the Patent Cooperation Treaty (PCT). An international (PCT) application generally has the same
`effect as a regular national patent application in each PCT-member country. The PCT process simplifies the filing
`of patent applications on the same invention in member countries, but does not result in a grant of "an international
`page 1 of 3
`
`QUALCOMM EXHIBIT 2002
`Intel v. Qualcomm
`IPR2018—01334
`Page 1
`
`QUALCOMM EXHIBIT 2002
`Intel v. Qualcomm
`IPR2018-01334
`Page 1
`
`

`

`patent" and does not eliminate the need of applicants to file additional documents and fees in countries where patent
`protection is desired.
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`Almost every country has its own patent law, and a person desiring a patent in a particular country must make an
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`Applicants also are advised that in the case of inventions made in the United States, the Director of the USPTO must
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`can be viewed on the USPTO website at http://www.uspto.gov/web/offices/pac/doc/general/index.html.
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`For information on preventing theft of your intellectual property (patents, trademarks and copyrights), you may wish
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`
`LICENSE FOR FOREIGN FILING UNDER
`
`Title 35, United States Code, Section 184
`
`Title 37, Code of Federal Regulations, 5.11 & 5.15
`
`GRANTED
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`if the phrase "IF REQUIRED, FOREIGN FILING
`The applicant has been granted a license under 35 U.S.C. 184,
`LICENSE GRANTED" followed by a date appears on this form. Such licenses are issued in all applications where
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`date indicated is the effective date of the license, unless an earlier license of similar scope has been granted under
`37 CFR 5.13 or 5.14.
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`This license is to be retained by the licensee and may be used at any time on or after the effective date thereof unless
`it is revoked. This license is automatically transferred to any related applications(s) filed under 37 CFR 1.53(d). This
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`The grant of a license does not in any way lessen the responsibility of a licensee for the security of the subject matter
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`State (with respect to Arms, Munitions and Implements of War (22 CFR 121-128)); the Bureau of Industry and
`page 2 of 3
`
`Page 2
`
`Page 2
`
`

`

`Security, Department of Commerce (15 CFR parts 730-774); the Office of Foreign AssetsControl, Department of
`Treasury (31 CFR Parts 500+) and the Department of Energy.
`
`NOT GRANTED
`
`No license under 35 U.S.C. 184 has been granted at this time, if the phrase "IF REQUIRED, FOREIGN FILING
`LICENSE GRANTED" DOES NOT appear on this form. Applicant may still petition for a license under 37 CFR 5.12,
`if a license is desired before the expiration of 6 months from the filing date of the application. If 6 months has lapsed
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`U.S.C. 181, the licensee may foreign file the application pursuant to 37 CFR 5.15(b).
`
`page 3 of 3
`
`Page 3
`
`Page 3
`
`

`

`PTOI'SBI‘I 4 (07-07)
`Approved for use through 06/30I'2010. OMB 0651-0032
`US. Patent and Trademark Office; US. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
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`_
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`Appllcatlon Data Sheet 37 CFR 1.76
`
`Application Number
`
`
`Attorney Docket Number
`1D1660P1
`
`
`
`
`
`Title of Invention
`
`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary Processor to
`one or More Secondary Processor in a Multi-Processor System
`
`The application data sheet is part of the provisional or nonprovisional application for which it is being submitted. The following form contains the
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`|:| Portions or all of the application associated with this Application Data Sheet may fall under a Secrecy Order pursuant to
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`
`
`Applicant Information:
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`Applicant 1
`
`Applicant Authority @lnventor OLegal Representative under 35 U_S_C_ 117
`
`OPaIty of Interest under 35 U_S_C_ 118
`
`_——
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`StateIProvince - Country of Residencei
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`
`
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`Citizenship under 37 CFR 1. 41(b)|
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`Mailing Address of Applicant:
`Address 1
`5775 Morehouse Drive
`
`Address 2
`
`Applicant 2
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`
`
`
`
`
`
`
`
`OPaIty of Interest under 35 U.S.C. 118
`Applicant Authority @lnventor OLegal Representative under 35 U.S.C. 117
`Prefix Given Name Suffix Middle Name Family Name
`Daniel
`Kim
`
`
`
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`
`StateIProvince - Country of Residencei Citizenship under 37 CFR 1. 41(b)i
`
`Mailing Address of Applicant:
`Address 1
`5775 Morehouse Drive
`
`Address 2
`
`Applicant 3
`
`OParty of Interest under 35 U.S.C. 118
`Applicant Authority @lnventor OLegal Representative under 35 U.S.C. 117
`
`Prefix Given Name
`Middle Name
`Family Name
`Suffix
`
`Igor
`
`Malamant
`
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`
`
`San DiegoCity StateIProvince | CA | Country of Residencei | US Page4
`
`
`
`EFS Web 2.2.2
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`Page 4
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`

`

`PTOISBI14 (07-07)
`Approved for use through DEE/3012010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
` Attorney Docket Number
`101660P1
`
`Application Data Sheet 37 CFR 1.76
`
`Application Number
`
`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary Processor to
`Title of Invention
`one or More Secondary Processor in a Multi—Processor System
`
`
`Citizenship under 37 CFR 1.41(b) i
`
`IS
`
`Mailing Address of Applicant:
`
`Address 1
`
`Address 2
`
`5775 Morehouse Drive
`
`Postal Code
`
`92121
`
`US
`
`Inventor Information blocks may be
`Inventors Must Be Listed - Additional
`All
`generated within this form by selecting the Add button.
`
`Add
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`Correspondence Information:
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`Enter either Customer Number or complete the Correspondence Information section below.
`For further information see 37 CFR 1.33(a).
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`|:| An Address is being provided for the correspondence Information of this application.
`
`
`AddEman
`
`
`
`Customer Number
`
`Email Address
`
`us—docketing@qualcomm.com
`
`
`
`Email Address
`nc.docketing@qualcomm.com
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`AddEman
`
`
`
`
`
`
`
`
`
`
`
`Application Information:
`
`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary
`Title Of the Invention
`Drnnneenr tn nnn nr Mnrn Rnnnndnnr Drnnneenr in :2 MI Ilti_|3rnnneenr Quetnm
`
`Attorney Docket Number
`101660P1
`I Small Entity Status Claimed
`|:|
`
`Application Type
`Provisional
`
`Subject Matter
`Utility
`
`Suggested Class (if any)
`Sub Class (if any)
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`Suggested Figure for Publication (if any)
`Total Number of Drawing Sheets (if any)
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`|:| Request Early Publication (Fee required at time of Request 37 CFR 1.219)
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`El U.S.C. 12203) and certify that the invention disclosed in the attached application has not and will not be the
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`Representative Information:
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`page 5
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`PTOISBI14 (07-07)
`Approved for use through 06/30r'2010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`
`Application Data Sheet 37 CFR 1.76
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`
`
`
`
`
`
`Title of Invention
`
`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary Processor to
`one or More Secondary Processor in a Multi—Processor System
`
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`Please Select One:
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`@ Customer Number
`0 US Patent Practitioner 0 Limited Recognition (37 CFR 11.9)
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` Customer Number
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`101660P1
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`Organization Name
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`QUALCOMM Incorporated
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`5775 Morehouse Drive
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`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
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`Appllcatlon Data Sheet 37 CFR 1.76
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`Attorney Docket Number
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`101660P1
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`_ Title of Invention
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`Communication Protocol for Efficiently Loading an Executable Software Image From a Primary Processor to
`one or More Secondary Processor in a Multi—Processor System
`
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`EFS Web 2.2.2
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`Page 8
`
`

`

`Communication Device
`
`
`
`Fiie'System -'
`‘ Mirror
`I
`
`1;“Mogiem ":_
`'RunéTI'me
`Data: f
`
`
`'
`
`
`
`Inter-Chip
`Communication Bus
`
` "
`
`«- ModemProce f
`
`Larger Flash Memory (e.g. NAND)
`
`
`Modem File
`System
`
`Figure 1 Example Smartphone Architecture
`
`T‘OO
`
`Page 9
`
`Page 9
`
`

`

`_
`.
`‘
`Hardware Buffer
`Partial Data Segment
`
`
`
`physical Data
`Pipe
`(Le. HS-USB
`
`Cable)
`
`Hardware Transport
`Mechanism
`(i.e. USB Controller)
`'
`
`'
`
`_
`U
`.
`_
`Hardware Buffer
`\
`_
`I I Partial Data segment
`
`
`
`
`
`
`
`Zero Copy Transport Flow
`
`SECONDARY PROCESSOR
`
`9,0 5
`System Memory /
`
`Image Header
`'
`'
`
`
`System'M mory
`-
`
`DataSegmenM
`—
`
`'3
`“ ‘-_ ‘
`- »- ‘— ‘ V‘°'a"'e “Wm
`3
`3 I
`,
`system me
`
`
`
`Image Header
`
`Data-Segment 1
`
`Data Segmentz -‘
`
`. 'Data Segment 3
`
`“ Data Ség'melntft"
`
`Data §egment5 LY
`
`-7 VlDataVSegment 1 :
`
`Data Segment 2
`
`V
`
`'
`
`'
`
`.
`
`V
`
`”a“ Segme” 4
`(still transferring)
`
`
`
`The current system memory location where data is to
`be transferred is passed to the
`controller via
`software (based on the information contained in the
`image header)
`
`Each data segment (although possibly stored contiguously on the host's
`non-volatile memory) can be scattered to non-contiguous target system
`memory locations. The system memory locations and sizes for each
`data segment will be passed in the image header and processed by the
`target processor in order to set the address for the target’s
`controller. This will allow the target to transfer data directly from the
`target hardware buffer to system memory location without copying data
`between system memory locations. Once all the data segments for the
`image has been transferred, the image can be scheduled for execution
`on the target.
`
`
`
`Figure 2 - Zero Copy Transport Flow
`
`Page 10
`
`Page 10
`
`

`

`Command Packet
`{COMMAND ID - PACKET LENGer "r“
`
` Data Packet
`
`
`
`' RAW DATA (arbitrary number ofrbytes’)
`
`\
`
`'
`
`.
`
`" I
`
`Figure 3—1 Exemplary Protocol’s packet structures
`
`Page 11
`
`Page 11
`
`

`

`Packet Flow
`
`H ost
`
`HELLO
`
`Target
`Target initiates protocol by sending
`HELLO packet
`
`Based on the file offset and size
`received in the READ_DATA packet,
`the host sends data from the image file
`
`READ_DATA
`(image ID, 0 offset, size of image
`. header)_
`
`RAW_DATA (size of image header)
`
`READ DATA
`(image ID, segment 0 offset, size of
`segment 0)
`
`RAW_DATA (size of segment 0)
`
`READ_DATA
`(image lD, segment 1 offset, size of
`......_..__
`____ segment, _1_)_ ”WW _>__
`
`RAW_DATA (size of segment 1)
`
`READ_‘DATA
`(image ID, segment N offset, size of
`“segment N)“
`
`Once HELLO response is received,
`target initiates the image transfer
`
`Target initiates transfer of data by first
`requesting the transfer of the image
`header from the host
`
`Target decodes image header to
`retrieve location and size of each data
`
`segment within image file
`
`Once the target receives the data for
`the current segment, the target
`processes the data. If valid data is
`received, the next READ_DATA
`request is sent. If invalid data is
`received, an END_IMAGE_TX is sent
`with an error condition, upon which the
`target waits for RESET and then resets
`
`
`
`
`
`
`
`
`Once host receives successful
`END_lMAGE_TX, host sends DONE DONE
`
`DONE__RESP
`
`Upon successful transfer of all data
`segments, target sends an
`END_lMAGE_TX packet with success
`status
`
`If target has not received all images in
`order to boot, target sends
`IMAGE_TX_PEND1NG status with
`DONE_RESP; otherwise, target sends
`IMAGE__TX_COMPLETE status with
`DONE_RESP and exits
`protocol
`
`-
`
`Figure 4-1 Successful image transfer sequence for Exemplary Protocol
`
`Page 12
`
`Page 12
`
`

`

`State Machine -
`
`Target Side
`
` Send HELLO
`
`WAlT_HELLO__RESP
`
`WAlT_RESET
`
`State
`
`
`
`State
`
`Reset target Error during receive image
`
`HELLQ response recelved;
`
`HELLOresponse received and
`'
`invalid/mismatch protocol
`OR
`I
`I-
`Invalid command ‘
`v
`‘ Send END_lMAGE_TX error
`response
`*
`
`‘
`
`.RESET received
`, Shutdown Pra‘i'otrsl;
`Send RESET_RESP
`
`
`
`Any other command
`received
`0R
`Invalid command reCeived;‘
`Send ENDJMAGE_TX
`error response
`
`
`
`No error
`dufing ;
`
`receive '
`
`image
`
`
`WAIT4DONE
`Slate
`
`
`
`
`
`T
`
`DONE received and NOT all
`images received for boot;
`Send DONE_RESP with
`lMAGE_TX_PENDlNG status
`
`v
`
`
`e
`
`DONE received and all images
`lMAGE_TX_CONIPLETE status
`received for boot;
`'
`-
`'
`Shu‘mw" ””5441
`’
`Send DONE“RESP With
`
`
`Exit and
`
`
`
`_oon'finue
`with boot
`
`
`
`
`
`v
`
`invalid or any other command V
`received;
`Send END IMAGE_TX error
`response
`-
`
`
`
`
`
`i
`
`Figure 4-2 exemplary state machine (target side)
`
`Page 13
`
`Page 13
`
`

`

`
`[Receive _
`
`
`'
`Image
`’
`_ Entry.
`
`Protocol Flow —
`
`Receive Image
`
`DATA__ELF_H DR
`
`State '
`
`
`
`
`
`
`
`
`_
`RAW_DATA received;
`
`. Valid ELF header received;
`' Determine size and location of
`
`program headersIn host"Image;
`'
`'Send READ_DATA
`
`‘
`
`
`
`Valid program headers received;
`
`
`
`Determine location/size of hash .
`table segment in host image;
`
`
`Send READ_DATA
`
`
`
`
`
`DATA__ELF_HASH_TABLE
`
`
`
`
`;
`Based on expected image,
`determine image header size and
`set offset=0 in host imag_;e
`Send READ_DATA
`
`
`
`DATA_BINARY
`State
`
`
`
`~ RAW_DATA received;
`Store image header for
`authentication;
`Determine location/size of dataIn
`hostImage;
`send READ_DATA>
`
`.RAW_DATA received
`_
`for binaryImage;
`Send END_IMAGE_TX success
`response
`
`[Receive
`‘ image,
`:EX“ '
`
`,
`
`
`
`
`I
`
`
`‘..__...._‘_.._______,___..___.._-.~....~-I..w...._._...T.___.._-
`
`InvalId BInary header recered
`- OR ,
`.
`Invalid data received
`.
`OR
`
`Invalid ELF header received
`-
`' OR
`Invalid program headers received
`
`
`HashtableaLItOR
`ica‘tion’failed--
`' ELFsegment aIIthentication failedr.
`SendEND IMAGE?TX error response
`
`
`
`Figure 4—3 exemplary state machine (receive image)
`
`. RAW_DATA received;
`.Valid hash table received;
`
`'
`
`. Not‘ail ELF ;
`Determine location/size of next
`
`
`.
`segments
`ELF segmentIn hos‘t'Image;
`
`
`
`Send READ_DATA
`received
`i
`5
`I
`
`RAW_DATA received;
`Valid data reCeived;
`
`.
`
`
`
`~ All ELF segmentsreceived and
`
`
`:
`aIIthenticated (if applicable);
`Send END_IMAGE_TX success
`
`’
`response
`
`Page 14
`
`Page 14
`
`

`

`State Machine —
`Host Side
`
`HELLO response received and
`invalid/mismatch protocol
`‘ VOR‘,
`,-
`lnvalid command
`Send RESET
`
`HELLO received;
`Compatible protocol received;
`Send HELLO_RESP success
`
`response
`
`
`
`
`
`
`
`
`
`
`
`
`
`WA|T__COMMAND
`
`
`
`READ_DATA' received;
`Based on image ID. file offset,
`' and length received, open file
`and read data:
`'_
`Send RAW__DATA
`
`ENDHIMAGE_TX received with
`success;
`Send DONE
`
`
`
`
`State
`
`
`
`
`
`
`END__IMAGE_TX received with
`’
`error
`'
`OR »
`7
`Any other command received
`OR V
`‘
`*
`invalid command received;
`'
`Send RESET-
`
`
`
`
`
`WAIT_DONE_RESP
`
`State
`
`
`
`
`
`WAlT_RESET_R ESP
`
`State
`
`
`
`
`
`
`
`. DONE’_RESP received and all
`images'sent for‘boot; ,
`
`i
`
`Figure 4-4 exemplary state machine (host side)
`
`Page 15
`
`Page 15
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`

`

`lOl660Pl
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`1/27
`
`COMMUNICATION PROTOCOL FOR EFFICIENTLY LOADING AN
`
`EXECUTABLE SOFTWARE IMAGE FROM A PRIMARY PROCESSOR TO
`
`ONE OR MORE SECONDARY PROCESSOR IN A MULTI-PROCESSOR
`
`SYSTEM
`
`Inventors: Nitin Gupta, Daniel Kim and Igor Malamant
`
`TECHNICAL FIELD
`
`[0001]
`
`The following description relates generally to communication
`
`protocols,
`
`and more specifically to a communication protocol
`
`for efficiently
`
`communicating from a primary processor in a multi—processor system an executable
`
`software image to another processor (referred to herein as a “secondary” processor) in
`
`thc multi-proccssor systcm.
`
`BAC KGRO UN D
`
`[0002]
`
`Processors
`
`generally
`
`execute
`
`software
`
`code
`
`to
`
`perform
`
`operations. Processors generally require some software code, commonly referred to as
`
`boot code, to be executed for booting up.
`
`In a multi-processor system, each processor
`
`may require respective boot code for booting up. As an example, in a smartphone
`
`device that includes an application processor and a modem processor, each of the
`
`processors may have respective boot code for booting up.
`
`[0003]
`
`In many multi-processor systems, non-volatile memory is present
`
`on each processor, and the non—volatile memory of a respective processor stores
`
`executable software to be executed by the respective processor.
`
`For instance, a
`
`processor’s boot code may be stored to the processor’s respective non-volatile memory
`
`(e.g., Flash memory, ROM, etc.), and upon power-up the boot code software is loaded
`
`for execution by the processor from its respective non-volatile memory. Thus, in this
`
`type of architecture the executable software, such as a processor’s boot code, is not
`
`required to be loaded to the processor from another processor in the system.
`
`[0004]
`
`In some multi-processor systems, software may be required to be
`
`loaded to one processor from another processor. For example, suppose a first processor
`
`in a multi-processor system is responsible for storing to its non-volatile memory boot
`
`code for one or more other processors in the system; wherein upon power—up the first
`
`processor is tasked with loading the respective boot code to the other processor(s), as
`
`765172801
`
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`

`lOl660Pl
`
`2/27
`
`opposed to such boot code residing in non-volatile memory of the other processor(s). In
`
`this type of system,
`
`the software (e. g., boot
`
`image) is downloaded from the first
`
`processor to the other processor(s) (e.g., to volatile memory of the other processor(s)),
`
`and thereafter the receiving processor(s) boots with the downloaded image.
`
`[0005]
`
`Often,
`
`the software image to be loaded is a binary multi-
`
`segmented image. For instance, the software image may include a header followed by
`
`multiple segments of code. When software images are loaded from an external device
`
`(e. g., from another processor) onto a target device (e. g., a target processor) there may be
`
`an intermediate step where the binary multi-scgmcntcd image is transferred into the
`
`system memory and then later scattered into target locations by the boot loader.
`
`[0006]
`
`In a system in which the software image is loaded onto a target
`
`“secondary” processor from a first “primary” processor, one way of performing such
`
`loading is to allocate a temporary buffer into which each packet is received, and each
`
`packet would have an associated packet header information along with the payload.
`
`The payload in this case would be the actual image data. From the temporary buffer,
`
`some of the processing may be done over the payload, and then the payload would get
`
`copied over to the final destination. The temporary buffer would be some place in
`
`system memory, such as in internal RAM or DDR, for example.
`
`[0007]
`
`Thus, where an intermediate buffer is used,
`
`the data being
`
`downloaded from a primary processor to a secondary processor is copied into the
`
`intermediate buffer.
`
`In this way, the buffer is used to receive part of the image data
`
`from the primary processor, and from the buffer the image data may be scattered into
`
`the memory (e.g., volatile memory) of the secondary processor.
`
`[0008]
`
`The primary processor and its non-volatile memory that stores the
`
`boot image for a secondary processor may be implemented on a different chip than a
`
`chip on which the secondary processor is implemented. Thus, in order to transfer the
`
`data from the primary processor’s non-volatile memory to the secondary processor (e.g.,
`
`to the secondary processor’s volatile memory), a packet-based communication may be
`
`employed, wherein a packet header is included in each packet communicated to the
`
`secondary processor. The packets are stored in an intermediate buffer, and some
`
`processing of the received packets is then required for that data to be stored where it
`
`needs to go (e.g., within the secondary processor’s volatile memory).
`
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`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0009]
`
`Fo