`Docket No.: 101459
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`IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
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`In re Patent Application of:
`CustomerNo.:
`23696
`Nitin GUPTA
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`Application No.: 13/052,516
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`Art Unit:
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`2116
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`Filed:|March 21, 2011 Conf. No.: 6620
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`For: DIRECT SCATTER LOADING OF||Examiner: Abdelmoniem I. ELAMIN
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`EXECUTABLE SOFTWARE
`IMAGE FROM A PRIMARY
`PROCESSOR TO ONE OR MORE
`SECONDARY PROCESSORIN A
`MULTI-PROCESSOR SYSTEM
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`Mail Stop Amendment
`Commissionerfor Patents
`P.O. Box 1450
`Alexandria, VA 22313-1450
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`DearSir:
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`REPLY UNDER37 C.F.R. 1.111
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`In response to the Office Action dated July 19, 2013, reconsideration and further
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`examination of the above-identified application are respectfully requested based on the
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`following:
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`Amendments to the Claimsare reflected in the listing of claims, which begin on page 2
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`of this paper.
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`Remarks begin on page8 ofthis paper.
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`15929473v.1
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`INTEL 1 005
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`INTEL 1005
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`Docket No. 101459
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`Amendments to the Claims:
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`Thislisting of claims will replace all prior versions, andlistings, of claimsin the
`application:
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`Listing of Claims:
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`1.
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`(Currently Amended) A multi-processor system comprising:
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`a secondary processor comprising:
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`system memory and a hardware buffer for receiving an image header and at least
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`one data segment ateteast a-pertien of an executable software image, the image header
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`and each data segment being received separately, and
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`the-secondary-precesser-comprising a scatter loader controller ferteading
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`configured:
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`to load the image header; and
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`to scatter load each received data segment executable-seftwareimage,
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`based at least in part on the loaded image header, directly from the hardware
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`buffer to the system memory;
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`a primary processor coupled with a memory, the memory storing the executable software
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`image for the secondary processor; and
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`an interface communicatively coupling the primary processor and the secondary
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`processor via which the executable software image is received by the secondary processor.
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`2.
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`(Original) The multi-processor system of claim 1 in whichthe scatter loader
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`controller is configured to load the executable software image directly from the hardware buffer
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`to the system memory of the secondary processor without copying data between system memory
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`locations on the secondary processor.
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`3.
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`(Original) The multi-processor system of claim 1 in which raw image data of the
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`executable software image is received by the secondary processorvia the interface.
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`4,
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`(Cancelled)
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`3
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`(Currently Amended) The multi-processor system of claim [[4]] 1.in which the
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`secondary processor is configured to-recetvethe+mageheaderand process the image headerto
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`determineat least one location within the system memory to store the at least one data segment.
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`6.
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`(Original) The multi-processor system of claim 5 in which the secondary
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`processoris configured to determine, based on the received image header, the at least one
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`location within the system memory to store the at least one data segment before receiving the at
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`least one data segment.
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`Vs
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`(Original) The multi-processor system of claim 1, in which the secondary
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`processor further comprises a non-volatile memory storing a boot loaderthat initiates transfer of
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`the executable software image for the secondary processor.
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`8.
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`(Original) The multi-processor system of claim 1 in which the primary and
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`secondary processorsare located on different chips.
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`9.
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`(Original) The multi-processor system of claim 1 in whichthe portion of the
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`executable software image is loaded into the system memory of the secondary processor without
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`an entire executable software image being stored in the hardware buffer.
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`10.
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`(Original) The multi-processor system of claim 1 integrated into at least one of a
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`mobile phone, a set top box, a music player, a video player, an entertainmentunit, a navigation
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`device, a computer, a hand-held personal communication systems (PCS) unit, a portable data
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`unit, and a fixed location data unit.
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`11.
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`(Currently Amended) A method comprising:
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`receiving at a secondary processor, from a primary processor via an inter-chip
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`communication bus, an image header for an executable software image for the secondary
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`processorthat is stored in memory coupled to the primary processor, the executable software
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`image comprising the image headerandat least one data segment, the image header and each
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`data segment being received separately;
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`processing, by the secondary processor, the image header to determineat least one
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`location within system memory to which the secondary processoris coupled to store the-atteast
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`ene cachdata segment;
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`receiving at the secondary processor, from the primary processorvia the inter-chip
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`communication bus, the-atteastene cachdata segment; and
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`scatterloading, by the secondary processor, the-atleasterne eachdata segmentdirectly to
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`the determinedat least one location within the system memory, and each data segment being
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`scatter loaded based at least in part on the processed image header.
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`12.
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`(Original) The method of claim 11 further comprising booting the secondary
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`processorusing the executable software image.
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`13.
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`(Original) The method of claim 11 further comprising loading the executable
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`software imagedirectly from a hardware buffer to the system memory of the secondary
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`processor without copying data between system memory locations.
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`14.
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`(Original) The method of claim 11 in which the processing occurs prior to the
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`loading.
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`15.|(Original) The method of claim 11 in which the primary and secondary processors
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`are located on different chips.
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`16.
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`(Original) The method of claim 11 further comprising performing the receiving,
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`processing, and loading,in at least one of a mobile phone, a set top box, a music player, a video
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`player, an entertainment unit, a navigation device, a computer, a hand-held personal
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`communication systems (PCS) unit, a portable data unit, and a fixed location data unit.
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`17.
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`(Currently Amended) An apparatus comprising:
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`meansfor receiving at a secondary processor, from a primary processor via an inter-chip
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`communication bus, an image header for an executable software image for the secondary
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`processorthat is stored in memory coupled to the primary processor, the executable software
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`image comprising the image headerandat least one data segment, the image header and each
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`data segment being received separately;
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`meansfor processing, by the secondary processor, the image header to determineatleast
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`one location within system memory to which the secondary processor is coupled to store the-at
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`leastene eachdata segment;
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`meansfor receiving at the secondary processor, from the primary processorvia the inter-
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`chip communication bus, the-atteastene eachdata segment; and
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`meansfor scatter loading, by the secondary processor, the-atteastene eachdata segment
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`directly to the determinedat least one location within the system memory, and each data segment
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`being scatter loaded based at least in part on the processed image header.
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`18.
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`(Original) The apparatus of claim 17 integrated into at least one of a mobile
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`phone,a set top box, a music player, a video player, an entertainmentunit, a navigation device, a
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`computer, a hand-held personal communication systems (PCS) unit, a portable data unit, and a
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`fixed location data unit.
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`19.
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`(Currently Amended) A multi-processor system comprising:
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`a primary processor coupled with a first non-volatile memory,the first non-volatile
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`memory coupled to the primary processorandstoring a file system for the primary processor and
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`executable images for the primary processor and secondary processor;
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`a secondary processor coupled with a second non-volatile memory, the second non-
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`volatile memory coupled to the secondary processor and storing configuration parameters and
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`file system for the secondary processor; and
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`an interface communicatively coupling the primary processor and the secondary
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`processor via which an executable software image is received by the secondary processor, the
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`executable software image comprising an image header andat least one data segment, the image
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`header and each data segment being received separately, and the image header being used to
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`scatter load each received data segment directly to a system memory of the secondary processor.
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`20)
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`(Original) The multi-processor system of claim 19 integrated into at least one of a
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`mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation
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`device, a computer, a hand-held personal communication systems (PCS) unit, a portable data
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`unit, and a fixed location data unit.
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`DM
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`(Currently Amended) A multi-processor system comprising:
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`a primary processor coupled with a first non-volatile memory,the first non-volatile
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`memory coupled to the primary processor and storing executable imagesandfile systems for the
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`primary and secondary processors;
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`a secondary processornot directly coupled to the first non-volatile memory; and
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`an interface communicatively coupling the primary processor and the secondary
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`processor via which an executable software image is received by the secondary processor,the
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`executable software image comprising an image header andat least one data segment, the image
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`header and each data segment being received separately, and the image header being used to
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`scatter load each received data segmentdirectly to a system memory of the secondary processor.
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`22.
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`(Original) The multi-processor system of claim 21 integrated into at least one of a
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`mobile phone, a set top box, a music player, a video player, an entertainment unit, a navigation
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`device, a computer, a hand-held personal communication systems (PCS) unit, a portable data
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`unit, and a fixed location data unit.
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`23.
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`(Currently Amended) A method comprising:
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`sending, from a memory coupled to a primary processor, an executable software image
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`for a secondary processor, via an interface communicatively coupling the primary processor and
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`secondary processor, the executable software image comprising an image header andat least one
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`data segment;
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`receiving, at the secondary processor, the image header and each data segmentof the
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`executable software image, the image header and each data segment being received separately,
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`and the image header being used to scatter load each received data segmentdirectly to a system
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`memory of the secondary processor; and
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`executing, at the secondary processor, the executable software image.
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`24.
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`(Original) The method of claim 23 further comprising performing the sending,
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`receiving, and executing, in at least one of a mobile phone, a set top box, a music player, a video
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`player, an entertainment unit, a navigation device, a computer, a hand-held personal
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`communication systems (PCS) unit, a portable data unit, and a fixed location data unit.
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`REMARKS
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`In response to the Office Action mailed July 19, 2013, the Office Action’s claim
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`rejections have been considered. Claims 1-24 are pending. Claims 1, 5, 11, 17, 19, 21 and 23 are
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`currently amended. Claim 4 has been cancelled without prejudice or disclaimer of the subject
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`matter. No new matter is added. Support for the amendments may be foundat least in, for
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`example, paragraph 52 of the published application (US 2012/0072710). Applicants respectfully
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`traverseall rejections ofall pending claims and earnestly solicit allowance of these claims.
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`Claim Rejections - 35 USC § 102
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`Claims 1-24 are rejected under 35 U.S.C. § 102(b) as allegedly being unpatentable over
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`Svensson (International Publication No. 2006/077068). Claim 4 has been cancelled, thus
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`rendering the rejection of claim 4 moot.
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`As amended, claim 1 incorporates elements similar to those recited in original claim 4.
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`Specifically, claim 1 recites system memory and a hardware buffer for receiving an image header
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`and at least one data segment of an executable software image, the image header and each data
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`segment being received separately. Claim 1 further recites a scatter loader controller configured
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`to load the image header andto scatter load each received data segment, based at least in part on
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`the loaded image header, directly from the hardware buffer to the system memory.
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`For claim 4, page 3 of the Office Action states that FIG. 3 of Svensson discloses that the
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`executable software comprises an image headerandat least one data segment. Applicants
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`provide the following remarks.
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`FIG. 3 of Svensson arguably discloses that the software includes a header and a data
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`segment. Asdisclosed in col. 8 lines 10-19 of Svensson, each code and/or data to be transferred
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`includes a header.
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`In contrast to Svensson, claim | recites that the image header and each data segmentare
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`received separately. Applicants submit that separately receiving the image header and each data
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`segment, as recited in claim 1, is patentably distinguishable from receiving the data and the
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`associated header, as disclosed in Svensson. Therefore, because Svensson expressly discloses
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`that each code and/or data to be transferred includes a headerandfails to disclose that the image
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`header and each data segmentare received separately, applicants submit that Svensson cannot
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`teach or suggest “the image header and each data segment are received separately,” as recited in
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`claim 1.
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`Moreover,the cited portions of Svensson disclose that several blocks(e.g., data blocks
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`with headers) are concatenated in the intermediate storage area (ISA). Specifically, the data
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`blocks are concatenated in the intermediate storage area prior to being transferred to the memory
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`(see Svensson, step 220). In contrast, claim | recites that each data segmentis scatter loaded
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`basedat least in part on the loaded image header. Thatis, the individual data segments of claim
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`1 are not concatenated with the headerfiles. Rather, the image headerfile is loaded into memory
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`to scatter load each data segment directly from the hardware buffer to the system memory.
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`Applicants submit that loading each data segmentdirectly from the hardware buffer to
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`the system memory,as recited in claim 1, is patentably distinguishable from concatenating the
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`data blocks and headers in the intermediate storage area and then transferring the concatenated
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`data to the memory,as recited in Svensson. Thus, because Svensson fails to teach or suggest
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`scatter loading each data segment directly from the hardware buffer to the system memory,
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`applicants submit that Svensson cannotteach or suggest “a scatter loader controller configured to
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`load the image headerandto scatter load each received data segment directly from the hardware
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`buffer to the system memory,” as recited in claim 1.
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`Applicants have demonstrated above that Svensson fails to teach or suggest various
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`elements recited in claim 1. Therefore, claim | is believed to be allowable over the cited
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`reference. Furthermore, the independent claims 11, 17, 19, 21, and 23 also recite separately
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`receiving the image header and each data segmentand scatter loading each received data
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`segmentdirectly from the hardware buffer to the system memory. Therefore, the other rejected
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`independentclaimsare also believed to be allowable. Finally, dependent claims2, 3, 5-10, 12-
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`16, 18, 20, 22, and 24 are allowable at least by virtue of their dependenceon an allowable base
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`claim, in addition to reasonsrelated to their ownrecitations.
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`CONCLUSION
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`The absence ofa reply to a specific rejection, issue, or comment does not signify
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`agreement with or concession ofthat rejection, issue, or comment. In addition, because the
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`arguments above may not be exhaustive, there may be other reasons for patentability of any or
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`all claims that have not been expressed. Finally, nothing in this paper should be construed as
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`evidencing intent to concede any issue with regard to any claim, except as specifically stated in
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`this paper, and the amendmentor cancellation of any claim does not necessarily signify
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`concession of unpatentability of the claim prior to its amendmentor cancellation.
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`In light of the amendments and remarks, applicants submit that the claimsare in
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`condition for allowance and respectfully request a notice to this effect. Should the Examiner
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`have any questions, please call the undersigned at the phone numberlisted below.
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`To the extent necessary, a petition for an extension of time under 37 C.F.R. § 1.136 is
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`submitted. Please charge any shortage in fees due in connection withthefiling of this paper,
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`including extension of time fees, to Deposit Account 17-0026 and please credit any excess fees
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`to such deposit account.
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`Dated: October 17, 2013
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`Respectfully submitted,
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`By:
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`/Peter Kamarchik/
`Peter Kamarchik, Reg. No. 63,529
`Attorney for Applicants
`QUALCOMM INCORPORATED
`5775 Morehouse Drive
`San Diego, CA 92121
`(919) 297-3170
`Email: pnk@qualcomm.com
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