Digital Design
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`i-x’fit:
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`Principles and Practices
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`Fourth Edition '
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`ii.
`'-'- 1:4:
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`‘ iii!
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`John F. Wakerly
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`Exhibit 1024
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`Apple v. Qualcomm
`|PR2018—01315
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`1
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`Exhibit 1024
`Apple v. Qualcomm
`IPR2018-01315
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`

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`DIGITAL DESIGN
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`Principles and Practices
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`Fourth Edition
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`
` John F. Wakerly
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`Cisoo Systems, Inc.
`Stanford University
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`Hall
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`PEARSON
`,--""—'--—.._
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`' Prentice
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`Upper Saddle River, New Jersey 07458
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`2
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`Wakerly, John F.
`Digital design: principles and practices/ John F. Wakerly.--4th ed.
`p. cm.
`Includes index
`ISBN 0-13-186389-4
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`1. Digital integrated circuits-Design and construction. I. Title
`TK7874.65,W34 2005
`621.39’5—d022
`
`2005048710
`
`Vice President and Editorial Director, ECS: Marcia Horton
`Editorial Assistant: Richard Virginia
`Executive Managing Editor: Vince O 'Brien
`Managing Editor: David A. George
`Production Editor: Scott Disanna
`Director of Creative Services: Paul Belfanti
`Art Director: Kenny Beck
`Cover Designer: Bruce Kenselaar
`Art Editor: Xiaoliong Zlm
`Manufacturing Manager: Alexis Heydr—Long
`Manufacturing Buyer: Lisa McDowell
`Senior Marketing Manager: Holly Stark
`About the Cover: Original cover artwork © 200] Ken Bakeman, www.kennyzen.com
`
`© 2006, 2000, I994, 1990 by Pearson Education, Inc.
`P EA RSO N
`A Pearson Prentice Hall
`Prentice
`Pearson Education Inc.
`Hall
`
`Upper Saddle River, NJ 07458
`
`Pearson Prentice l-IallTM is a trademark of Pearson Education Inc.
`
`The author and publisher of this book have used their best efforts in preparing this book. These efforts include the develop-
`ment, research, and testing of the theories and programs to determine their effectiveness. The author and publisher shall not
`be liable in any event for incidental or consequential damages with, or arising out of, the furnishing, performance, or use of
`these programs.
`
`Verilog is a trademark of Cadence Design Systems, Inc. Silos is a trademark of Simucad Inc. Synopsys, and Foundation
`Express are trademarks of Synopsys, Inc. Xilinx® is a registered trademark of Xilinx Corp. Aldec is a trademark of Aldec.
`
`ISBN 0-13-186389-4
`
`111213141516171819 20 V0921817l615
`
`Pearson Education Ltd., London
`Pearson Education Australia Pty., Ltd., Sydney
`
`Pearson Education Singapore, Pte. Ltd.
`
`Pearson Education North Asia Ltd., Hong Kong
`
`Pearson Education Canada, Inc., Toronto
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`Pearson Educacién de Mexico, SA. de CV.
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`Pearson Education—Japan, Tokyo
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`Pearson Education Malaysia, Pte. Ltd.
`
`Pearson Education, Inc., Upper Saddle River, New Jersey
`
`
`3
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`

`

`CONTENTS
`
`PREFACE
`
`xv
`
`1
`
`INTRODUCTION
`
`1
`
`1
`3
`
`About Digital Design
`1.1
`1.2 Analog versus Digital
`1.3
`Digital Devices
`6
`1.4
`Electronic Aspects of Digital Design
`1.5
`Software Aspects of Digital Design
`1.6
`integrated Circuits
`11
`1.7
`Programmable Logic Devices
`1.8 Application-Specific ICs
`16
`1.9
`Printed-Circuit Boards
`17
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`14
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`7
`8
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`1.10 Digital-Design Levels
`1.11 The Name of the Game
`
`18
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`22
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`1.12 Going Forward
`Drill Problems
`23
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`23
`
`2
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`NUMBER SYSTEMS AND CODES
`
`25
`
`26
`Positional Number Systems
`2.1
`2.2 Octal and Hexadecimal Numbers
`
`27
`
`2.3 General Positional-Number-System Conversions
`2.4 Addition and Subtraction of Nondecimal Numbers
`
`29
`32
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`34
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`2.5.2 Cmnplement Number Systems
`
`2.5 Representation of Negative Numbers
`2.5.] Signed—Magnitude Representation.
`2.5.3 Radix-Complement Representation.
`2.5.4 Two ’s-Complernent Representation
`2.5.5 Diminished Radix-Complement Representation
`2.5.6 Ones’-C0mplement Representation.
`2.5.7 Excess Representations
`Two’s-Complement Addition and Subtraction
`39
`2.6.3 Overflow
`2.6.] Addition. Rules
`2.6.2 A Graphical View
`2.6.4 Subtraction. Rules
`2.6.5 Two‘s-Complementand Unsigned Binary Numbers
`2.7 Ones’-Complement Addition and Subtraction
`44
`2.8
`Binary Multiplication
`45
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`2.6
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`vii
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`4
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`Contents
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`
`47
`Binary Division
`Binary Codes for Decimal Numbers
`Gray Code
`51
`Character Codes
`
`53
`
`48
`
`Codes for Actions, Conditions, and States
`n—Cubes and Distance
`57
`
`53
`
`58
`
`2.9
`2.10
`2.11
`2.12
`2.13
`2.14
`2.15
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`2.16
`
`Codes for Detecting and Correcting Errors
`2.15.1 Error-Detecting Codes
`2.15.2 Error-Correcting and Multiple-Error-Detecting Codes
`2.15.3 Hamming Codes
`2.15.4 CRC Codes
`2.15.5 Two-Dimensional Codes
`2.15.6 Checksum Codes
`2.15.7 m-out-of-n Codes
`69
`Codes for Serial Data Transmission and Storage
`2.16.1 Parallel and Serial Data
`2.16.2 Serial Line Codes
`References
`73
`Drill Problems
`Exercises
`76
`
`74
`
`DIGITAL CIRCUITS
`3.1
`3.2
`3.3
`
`79
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`80
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`3.3.5 Fan-In
`
`Logic Signals and Gates
`Logic Families
`84
`CMOS Logic
`86
`3.3.2 MOS Transistors
`3.3.1 CMOS Logic Levels
`3.3.3 Basic CMOS Inverter Circuit
`3.3.4 CMOS NAND and NOFI Gates
`3.3.6 Noninverting Gates
`3.3.7 CMOS AND-OFI-INVERT and OH-AND-INVEFIT Gates
`Electrical Behavior of CMOS Circuits
`96
`3.4.1 Overview
`3.4.2 Data Sheets and Specifications
`CMOS Static Electrical Behavior
`101
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`3.4
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`3.5
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`3.6
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`3.7
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`3. 5.] Logic Levels and Noise Margins
`3.5.2 Circuit Behavior with Resistive Loads
`3.5.4 Fanaut
`3.5.3 Circuit Behavior with Nonideal Inputs
`3.5.5 Eflects of Loading
`3.5.6 Unused Inputs
`3.5.7 How to Destroy a CMOS Device
`114
`CMOS Dynamic Electrical Behavior
`3.6.1 Transition Time
`3.6.2 Propagation. Delay
`3.6.3 Power Consumption
`3.6.4 Current Spikes and Decoupling Capacitors
`3.6.5 Inductive Efiects
`3.6.6 Simultaneous Switching and Ground Bounce
`Other CMOS Input and Output Structures
`129
`3. 7.] Transmission Gates
`3.7.2 Schmitt-Trigger Inputs
`3.7.3 Three-State Outputs
`3.7.4 Open-Drain Outputs
`3.7.5 Driving LEDs
`3.7.6 Multisource Buses
`3.7.7 Wired Logic
`3.7.8 Pull-Up Resistors
`
`
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`5
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`

`

`Contents
`
`ix
`
`3.8
`
`3.9
`
`3.10
`
`141
`CMOS Logic Families
`3.8.2 AHC andAI-ICT
`3.8.1 HC and HCT
`3.8.3 HC. HCT, AHC. andAHCT Electrical Characteristics
`3.8.4 AC andACT
`3.8.5 FCT and FCT-T
`3.8.6 FCT-T Electrical Characteristics
`151
`Low-Voltage CMOS Logic and Interfacing
`3.9.2 5- V Tolerant Inputs
`3.9.1 3.3-VLVTTL and LVCMOS Logic
`3.9.3 5-V Tolerant Outputs
`3.9.4 TTL/LVTTL Interfacing Summary
`3.9.5 Logic Levels Less Than. 3.3 V
`Bipolar Logic
`155
`3.10.2 Bipolar Junction Transistors
`3.10.1 Diode Logic
`3. I 0.3 Transistor-Transistor Logic
`3.10.5 TTL Fanout
`3.10.4 TTL Logic Levels and Noise Margins
`3.10.6 TTL Families
`3.10.7 A TTL Data Sheet
`
`3.10.8 CMOS/ITL Interfacing
`References
`174
`Drill Problems
`175
`Exercises
`179
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`3.10.9 Emitter-Coupled Logic
`
`COMBINATIONAL LOGIC DESIGN PRINCIPLES
`4.1
`
`183
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`184
`Switching Algebra
`4.1.1 Axioms
`4.1.2 Single—Variable Theorems
`4.1.3 Two- and Three-Variable Theorems
`4.1.4 n-Variable Theorems
`4.1.5 Duality
`4.1.6 Standard Representations of Logic Functions
`Combinational-CircuitAnalysis
`199
`CombinationaI-Circuit Synthesis
`205
`4.3.2 Circuit Manipulations
`4.3.1 Circuit Descriptions and Designs
`4.3.4 Karnaugh Maps
`4.3.3 Combinetional—Circuit Minimization
`4.3.5 Minimizing Sums of Products
`4.3.6 Other Minimization Topics
`4.3.7 Programmed Minimization Methods
`Timing Hazards
`224
`4.4.1 Static Hazards
`4.4.3 Dynamic Hazards
`References
`229
`Drill Problems
`230
`Exercises
`232
`
`
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`4.2
`4.3
`
`4.4
`
`4.4.2 Finding Static Hazards Using Maps
`4.4.4 Designing Hazard—Free Circuits
`
`5.2
`
`:1 Logic
`
`HARDWARE DESCRIPTION LANGUAGES
`5.1
`
`237
`
`238
`HDL-Based Digital Design
`5.1.1 WhyHDLs.7
`5.1.2 HDL Tool Suites
`5.1.3 HDL-Based Design Flow
`243
`The ABEL Hardware Description Language
`5.2.1 ABEL Program Structure
`5.2.2 ABEL Compiler Operation
`5.2.3 WHEN Statements and Equation Blocks
`5.2.4 Truth Tables
`5.2.5 Ranges, Sets, and Relations
`5.2.6 Test Vectors
`5.2.7 Additional ABEL Features
`
`6
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`Contents
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`5.4
`
`256
`5.3 The VHDL Hardware Description Language
`5.3.1 Program Structure
`5.3.2 Trims. (.‘onsirnns. and .-‘trrays
`5.3.3 ie'nm‘timn' and Procedures
`5.3.4 Libraries and Packages
`5.3.5 Structural Design Elt'HJ‘L-‘lifl'
`5.5.6 Duntllmi‘ Design Elements
`5.3.7 Behavioral Design Elements
`5.3.8 The Time Dimension
`5.3.9 Simulation
`5.3.10 'i‘rsr Ht‘nciit’s
`5.3.1] VHDL Features for Sequential Logic Design
`The Verilog Hardware Description Language
`290
`5.4.] Program Structure
`5.4.2 Logic System. Nets, Variables. and Constants
`5.4.3 ir'ectnrs'and()pc‘ruiors
`5.4.4 Arm‘iw
`5.4.5 Logical Operators and Expressions
`5.4.6 Compiler Dirc'rtives
`5.4.7 Structrn'ril Design Elements
`5.4.8 Datailma' Design Elements
`5.4.9 Behavioral Design Elements (Pracedural Code)
`5.4.10 Functions and Tasks
`5.4.11 The Time Dimension
`5.4.12 Simulation
`5.4.13 Test Benches
`5.4.14 Verilog Featuresfor Sequential Logic Design
`References
`335
`Drill Problems
`337
`Exercises
`338
`
`5.3.12 Synthesis
`
`5.4.15 Synthesis
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`341
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`6.2.2 Propagation Delay
`6.2.4 Timing Analysis
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`6.2
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`6.3
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`6.4
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`6.5
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`COMBINATIONAL LOGIC DESIGN PRACTICES
`342
`6.1
`Documentation Standards
`6.1.2 Gate Symbols
`6.1.] Bloceriagrams
`6.1.4 Active Levelsfor Pins
`6.1.3 Signal Names and Active Levels
`6.1.5 Bubble—to-Bnbble Logic Design
`6.1.? Drawing Layout
`6.1.6 .S‘immlNaming in HM. Programs
`6.1.8 Bust-2r
`6.1.9 r‘ll’l‘illlltflii‘ll Schematic ltrfhrnmtirm
`Circuit Timing
`362
`6.2.] Timing Diagrams
`6.2.3 Timing Specifications
`6.2.5 Timing Analysis Tools
`Combinationai PLDs
`370
`6.3.] Programmable Logic Arrays
`6.3.2 Programmable Array Logic Devices
`6.3.3 Generic Array Logic Devices
`6.3.4 (“i-1mm“ Programmable Logic Devices iC‘PLDsi
`6.3.5 (MOS PLD Circuits
`6.3.6 Device Programming and Testing
`Decoders
`384
`6.4.1 Binary Decoders
`6.4.2 Logic Symbols for Longer-Scale Elements
`6.4.3 The Hrl38 3-to-8 Dermiur
`6.4.4 Cascading Binary Decoders
`6.4.5 Decoders in ABEL and PLDs
`6.4.6 Decoders in VHDL
`6.4.7 Decoders in Verilog
`6.4.8 Seven-Segment Decoders
`Encoders
`408
`6.5.2 The 74x1 431' Priority Encmlcr
`6.5.] Priority Encmlrrs
`6.5.4 Encoders in I-"l-ll_')L
`6.5.3 Encoders in ABEL and PLDs
`6.5.5 Encoders in Verilog
`
`
`
`7
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`

`

`'ll.lS
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`tliesis
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`etives
`en ts
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`.‘ntltesis
`
`Pins
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`'esting
`
`ecoders
`
`6.6
`
`Three-State Devices
`
`418
`
`Contents
`
`Xi
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`6.7
`
`6.8
`
`6.9
`
`6.10
`
`6.11
`
`6.6.2 Standard MSI Three-State Bufi'ers
`6.6.1 Three-State Buffers
`6. 6.3 Three-State Outputs in. ABEL and PLDs
`6.6.4 Three—State Outputs in. VHDL
`6.6.5 Three-State Outputs in Verilog
`Multiplexers
`432
`6.7.2 Expanding Multiplexers
`6.7.1 Standard MS! Multiplexers
`6.7.3 Multiplexers, Demultipiexers, and Buses
`6.7.4 Multiplexers in ABEL and PLDs
`6.7.5 Multiplexers in VHDL
`6.7.6 Multiplexers in Verilog
`447
`Exclusive-OR Gates and Parity Circuits
`6. 8.1 Exclusive-OH and Exclusive—NOR Gates
`6. 8.3 The 74x280 9-Bit Parity Generator
`6.8.4 Parity-Checking Applications
`6.8.5 Exclusive-OF! Gates and Parity Circuits in. ABEL and PLDs
`6. 8.6 Exclusive—OH Gates and Parity Circuits in VHDL
`6.8.7 Exclusive-OR Gates and Parity Circuits in. Verilog
`Comparators
`458
`6.9.2 Iterative Circuits
`6.9.1 Comparator Structure
`6. 9.3 An Iterative Comparator Circuit
`6.9.4 Standard MS! Magnitude Comparators
`6.9.5 Comparators in HDLs
`6.9.6 Comparators in ABEL and PLDs
`6.9.7 Comparators in. VHDL
`6.9.8 Comparators in. Veriiog
`Adders, Subtractors, and ALUs
`474
`6.10.2 Ripple Adders
`6.10.1 Half'Adders and Full Adders
`6. 10. 3 Subtractors
`6. 10. 4 Carry—Loolraheacl Adde rs
`6.10.5 MS] Adders
`6.10.6 MSIAritltmetic and Logic Units
`6.10.7 Group-CarryLookaltead
`6.10.8 Adders in ABEL and PLDs
`6.10.9 Adders in VHDL
`6.10.10 Adders in Verilog
`Combinational Multipliers
`494
`6.11.1 Combinational Multiplier Structures
`6.11.2 Multiplication. in. ABEL and PLDs
`6.11.4 Multiplication in Verilog
`References
`508
`Drill Problems
`509
`Exercises
`51 1
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`6.8.2 Parity Circuits
`
`
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`6.11.3 Multiplication in VHDL
`
`SEQUENTIAL LOGIC DESIGN PRINCIPLES
`7.1
`Bistable Elements
`523
`
`521
`
`7.1.1 DigitalAnalvsis
`7.1.3 Metastable Behavior
`
`7.1.2 Analog Analysis
`
`7.2
`
`526
`Latches and Flip-Flops
`7.2.] 3-1? Latch
`7.2.2 5‘71? Late/i
`
`7.2.3 8-H Late/t wit/z Enable
`
`7.2.5 Edge-Triggered D Flip-Flop
`7.2.4 0 Latch
`7.2.6 Edge-Triggered D Flip-Flop wit/1 Enable
`7.2.7 Scan. Flip-Flop
`7.2.8 Master/Slave S-Fl Flip-Flop
`7.2.9 Master/Slave J-K Flip-Flop
`7.2.10 Edge—Triggered J-K Flip-Flop
`7.2.11 T Flip-Flop
`
`
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`8
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`

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`7.4
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`7.7
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`7.8
`7.9
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`7.5
`7.6
`
`Contents
`xii
`
`
`7.3
`Clocked Synchronous State-Machine Analysis
`542
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`7.3.1 State-Machine Structure
`7.3.2 Output Logic
`
`7.3.3 Characteristic Equations
`
`7.3.4 Analysis affiliate Machines with D Flip-Flops
`
`Clocked Synchronous State-Machine Design
`553
`
`7.4.1 State-Table Design Example
`7.4.2 State Minimization
`7.4.3 State Assignment
`7.4.4 Synthesis Using D Flip-Flops
`
`7.4.5 Synthesis Using J-K Nip-Flops
`
`7.4.6 More Design Examples Using D Flip-Flops
`
`570
`Designing State Machines Using State Diagrams
`
`577
`State-Machine Synthesis Using Transition Lists
`
`7.6.1 Transition Equations
`7.6.2 Excitation Equations
`
`7.6.3 Variations on the Scheme
`7.6.4 Realizing the State Machine
`Another State-Machine Design Example
`580
`
`7. 7.1 The Guessing Game
`7.7.2 Unused States
`
`7.7.3 Output-Coded State Assignment
`
`7. 7.4 “Don’t—Care” State Codings
`
`587
`Decomposing State Machines
`
`Feedback Sequential-Circuit Analysis
`
`7.9.1 Basic Analysis
`
`7.9.2 Analyzing Circuits with Multiple Feedback Loops
`
`7.9.3 Races
`7.9.4 State Tables and Flow Tables
`7.9.5 Cit-105 D Hip-Flop Analysis
`
`601
`7.10 Feedback Sequential-Circuit Design
`
`7.10.1 Latches
`7.10.2 Designing Fundamental-Mode Flow Table
`
`7.10.3 Flow-Table Minimization
`7.10.4 Race-Free State Assignment
`
`7.10.5 Excitation Equations
`7.10.6 Essential Hazards
`7.10.7 Summary
`
`612
`7.11 ABEL Sequential-Circuit Design Features
`
`7.11.] Registered Outputs
`7.11.2 State Diagrams
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`7.11.3 External State Memory
`7.11.4 Specifying Moore Outputs
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`7.11.5 Specifying Mealy and Pipelined Outputs with WITH
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`7.11.6 Test Vectors
`625
`7.12 Sequential-Circuit Design with VHDL
`
`7.12.1 Clocked Circuits
`7.12.2 State-Machine Design with VHDL
`7.12.3 A VHDL State-Machine Example
`
`7.12.4 Stale- Assigrnnent in l-"1-11')L
`7.12.5 Pipelined Outputs in VHDL
`
`7.12.6 Direct VHDL Coding Without a State Table
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`7.12.7 More VHDL State-Machine Examples
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`7.12.8 Specifying Flip-Flops in VHDL
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`7.12.9 VHDL State-Machine Test Benches
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`7.12.10 Feedback Sequential Circuits
`
`646
`7.13 Sequential-Circuit Design with Verilog
`
`7.13.1 Clocked Circuits
`7.13.2 State-Machine Design with Verilog
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`7.13.3 A Verilog State-Machine Example
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`7.13.4 Pipelined Outputs in Verilog
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`7.13.5 Direct Verilog Curling l-l'irhuut a State Table
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`7.13.6 More Verilog .S‘ttrtt--il-incitine Examples
`
`
`590
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`9
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`

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`Contents
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`xiii
`
`7.13.7 Specifying Flip-Flops in Verilog
`7.13.8 Verilog State-Machine Test Benches
`7.13.9 Feedback Sequential Circuits
`References
`663
`Drill Problems
`664
`Exercises
`669
`
`SEQUENTIAL LOGIC DESIGN PRACTICES
`
`679
`
`8.1
`
`8.2
`
`8.3
`
`680
`Sequential-Circuit Documentation Standards
`8.1.1 General Requirements
`8.1.2 Logic Syinbois
`81.3 Stare-Mach inc Descriptions
`8.1.4 Timing Diagrams and Specifications
`Latches and Flip-Flops
`686
`8.2.1 SS] Latches and Flip-Flops
`8.2.3 The Simplest Switch Debouncer
`8.2.5 Multibit Registers and Latches
`8.2.6 Registers and Latches in ABEL and PLDs
`8.2.7 Registers and Latches in VHDL
`8.2.8 Registers and Latches in Verilog
`Sequential PLDs
`703
`8.3.] Sequential GAL Devices
`8.4 Counters
`710
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`8.2.2 Switch Debouncing
`8.2.4 Bus Holder Circuit
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`8.3.2 PLD Timing Specifications
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`8.5
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`8.6
`8.7
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`8.8
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`8.9
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`8.4.2 S_wrchronous Counters
`8.4.1 Ripple Counters
`8.4.3 MS] Counters and Applications
`8.4.4 Decoding Binary-Counter States
`8.4.5 Counters in ABEL and PLDs
`8.4.7 Counters in Veri/og
`Shift Registers
`727
`8.5.2 MS] Shift Registers
`8.5.] Shift-Register Structure
`8.5.4 Ring Counters
`8.5.3 Shift-Register Counters
`8.5.5 Johnson Counters
`8.5.6 Linear Feedback Shift-Register Counters
`8.5.7 Shift Registers in ABEL and PLDs
`8.5.8 Shift Registers in VHDL
`8.5.9 Shift Registers in Verilog
`752
`Iterative versus Sequential Circuits
`Synchronous Design Methodology
`8. 7.1 Synchronous System Structure
`762
`Impediments to Synchronous Design
`8.8.1 CIUCI\ Skew
`8.8.2 Gating the Clock
`8. 8.3 Asynchronous Inputs
`769
`Synchronizer Failure and Metastability
`8.9.1 Sync/nonizer Failure
`8.9.2 Metastability Resolution Time
`8.9.3 Reliable Synchronizer Design
`8. 9.4 Analysis anetastab/e Timing
`8.9.6 Other Synchronizer Designs
`8.9.7 Synchronizing High-Speed Data Transfers
`References
`788
`Drill Problems
`790
`Exercises
`792
`
`8.4.6 Counters in VHDL
`
`756
`758
`
`8.9.5 Better Synchronize/s
`
`
`
`IIL’
`
`'Jle
`nnlcrlt
`
`lS
`
`IDL
`
`r VHDL
`
`:Jrilog
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`
`
`10
`
`

`

`9.2
`9.3
`
`9.4
`
`9.5
`
`9.6
`
`9.4.2 SDRAM Timing
`
`840
`
`9.5.4 Switch Matrix
`
`9.1.6 ROM Applications
`
`xiv
`Contents
`
`799
`
`9
`MEMORY, CPLDS, AND FPGAS
`9.1
`Read-Only Memory
`800
`
`9.1.1 Uxmg RfM-i'xfi'n' "Random" (‘mnbimntonal Logic Functions
`
`9.1.2 internal ROM .S‘rrm-tm-cr
`9. Lt "I'm:—l)i.-m'n.\-r'rmni Decoding
`9.1.4 Commercial ROM Types
`
`9.1.5 ROM Control Inputs and Timing
`
`Read/Write Memory
`821
`
`Static RAM
`822
`
`9.3.1 Static-RAM Inputs and Outputs
`
`9.3.2 Static—RAM Internal Structure
`
`9.3.3 Static—RAM Timing
`9.3.4 Standard Static RAMs
`
`9.3.5 Synchronous SRAM
`
`Dynamic RAM 833
`9.4.1 Dynamic-16.4111 Structure
`
`9.4.3 DDR SDRAMs
`
`Complex Programmable Logic Devices
`
`95.] Xilinx XC9500 CPLD Family
`
`9.5.2 Function-Block Architecture
`
`9.5.3 Input/Output-Block Architecture
`
`Field-Programmable Gate Arrays
`850
`
`9.6.1 Xilinx XC.‘400:1 FPGA Family
`9.6.2 Configurable Logic Block
`
`9.6.3 Input/Output Block
`9.6.4 Programmable Interconnect
`
`859
`References
`
`859
`Drill Probiems
`
`860
`Exercises
`
`
`lNDEX
`
`863
`
`
`
`11
`
`

`

`
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`chapter
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`
`uaoccan.unn-nuance-nuuuuluaecqon-I
`
`elcome to the world of digital design. Perhaps you’re a com—
`puter science student who knows all about computer software
`and programming, but you’re still trying to figure out how all
`that fancy hardware could possibly work. Or perhaps you’re
`an electrical engineering student who already knows
`something about analog electronics and circuit design, but you wouldn’t
`know a bit if it bit you. No matter. Starting from a fairly basic level, this book
`will show you how to design digital circuits and subsystems.
`We’ll give you the basic principles that you need to figure things out,
`and we’ll give you lots of examples. Along with principles, we’ll try to
`convey the flavor of real-world digital design by discussing current,
`practical considerations whenever possible. And I, the author, will often
`refer to myself as “we” in the hope that you’ ll be drawn in and feel that we’re
`walking through the learning process together.
`
`1.1 About Digital Design
`
`Some people call it “logic design.” That’s OK, but ultimately the goal of
`design is to build systems. To that end, we’ll cover a whole lot more in this
`text than logic equations and theorems.
`This book claims to be about principles and practices. Most of the
`principles that we present will continue to be important years from now;
`
`
`
`
`ooucup-u-n-u-ocuo-a-n-
`
`
`
`12
`
`

`

`
`
`
`
`
`Introduction
`Chapter 1
`
`some may be applied in ways that have not even been discovered yet. As for
`practices, they may be a little different from what’s presented here by the time
`you start working in the field, and they will certainly continue to change
`throughout your career. So you should treat the “practices” material in this book
`as a way to reinforce principles, and as a way to learn design methods by
`example.
`One of the book’s goals is to present enough about basic principles for you
`to know what’s happening when you use software tools to “turn the crank” for
`you. The same basic principles can help you get to the root of problems when the
`tools happen to get in your way.
`Listed in the box on this page are several key points that you should learn
`through your studies with this text. Most of these items probably make no sense
`to you right now, but you should come back and review them later.
`Digital design is engineering, and engineering means “problem solving.”
`My experience is that only 5%—lO% of digital design is “the fun stuff"—the
`creative part of design, the flash of insight, the invention of a new approach.
`Much of the rest is just “turning the crank.” To be sure, turning the crank is much
`easier now than it was 25 or even 10 years ago, but you still can’t spend 100% or
`even 50% of your time on the fun stuff.
`
`
`
`
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`
`IMPORTANT
`THEMES IN
`DIGITAL DESIGN
`
`' Good tools do not guarantee good design, but they help a lot by taking the pain
`out of doing things right.
`
`' Use consistent coding. organizational, and documentation styles in your HDL—
`based designs, following your company's guidelines.
`’ Understand and use standard functional building blocks.
`
`' Stale—machine design is like programming; approach it that way.
`Design for minimum cost at the system level. including your own engineering
`effort as part of the cost.
`
`' Design for testability and manul’acturability.
`° Use programmable logic to simplify designs, reduce cost, and accommodate last-
`minute modifications.
`
`' Avoid asynchronous design. Practice synchronous design until a better method—
`ology comes along (ifevcr).
`' Pinpoint the unavoidable asynchronous interfaces between different subsystems
`and the outside world, and provide reliable synchronizcrs.
`
`' Digital circuits have analog characteristics.
`' Know when to worry and when not to worry about the analog aspects of digital
`design.
`' Always document your designs to make them understandable to yourself and to
`others.
`
`
`
`
`
`13
`
`

`

`12 Analog versus Digital
`
`3
`
`et. As for
`
`y the time
`to change
`I this book
`
`.ethods by
`
`les for you
`crank” for
`s when the
`
`iould learn
`re no sense
`
`n solving.”
`stuff”—the
`
`' approach.
`ink is much
`r1d 100% or
`
`—I
`
`g the pain
`
`of digital
`
`.elf and to
`
`our HDL-
`
`'
`
`l
`
`|
`
`:
`
`Besides the fun stuff and turning the crank, there are many other areas in
`which a successful digital designer must be competent, including the following:
`
`' Debugging. It’s next to impossible to be a good designer without being a
`good troubleshooter. Successful debugging takes planning, a systematic
`approach, patience, and logic: if you can’t discover where a problem is,
`find out where it is not!
`
`- Business requirements and practices. A digital designer’s work is affected
`by a lot of nonengineering factors, including documentation standards,
`component availability,
`feature definitions,
`target specifications,
`task
`scheduling, office politics, and going to lunch with vendors.
`
`- Risk—raking. When you begin a design project you must carefully balance
`risks against potential rewards and consequences, in areas ranging from
`component selection (will it be available when I’m ready to build the first
`prototype?) to schedule commitments (will I still have a job if I'm late?).
`
`- Communication. Eventually, you’ll hand off your successful designs to
`other engineers, other departments, and customers. Without good commu-
`nication skills, you’ll never complete this step successfully. Keep in mind
`that communication includes not just transmitting but also receiving; learn
`to be a good listener!
`
`In the rest of this chapter, and throughout the text, I’ll continue to state
`some opinions about what’s important and what is not. I think I’m entitled to do
`so as a moderately successful practitioner of digital design.
`Additional materials related to this book, such as supplemental chapter
`sections, selected exercise solutions, and downloadable source code for all
`programs, can be found at Ltijfliizuhu: (via WWW - ddpp - com; SEC the P11313106)-
`
`1.2 Analog versus Digital
`
`
`
`analog
`digital
`
`()
`
`ngineering
`
`rodate last—
`
`er method-
`
`Analog devices and systems process time-varying signals that can take on any
`value across a continuous range of voltage, current, or other metric. So do digital
`circuits and systems; the difference is that we can pretend that they don’t! A
`digital signal is modeled as taking on, at any time, only one of two discrete
`values, which we call 0 and I (or LOW and HIGH, FALSE and TRUE, negated
`and asserted, Frank and Teri, or whatever).
`
`Digital computers have been around since the 1940s and have been in
`widespread commercial use since the 19605. Yet only in the past 10 to 20 years
`has the “digital revolution” spread to many other aspects of life. Examples of
`once-analog systems that have now “gone digital” include the following:
`
`' Still pictures. Ten years ago, the majority of cameras still used silver-halide
`film to record images. Today, inexpensive digital cameras record a picture
`as at 1024x768 or larger array of pixels, where each pixel stores the inten—
`
`subsystems
`
`
`14
`
`

`

` Chapter 1
`
`Introduction
`
`
`
`
`
`
`
`
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`
`
`
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`
`sities of its red, green, and blue color components as 8 or more bits each.
`This data, over 18 million bits in this example, is processed and compressed
`in JPEG format down to as few as 5% of the original number of bits. So,
`digital cameras rely on both digital storage and digital processing.
`
`Video recordings. A digital versatile disc (DVD) stores video in a highly
`compressed digital format called MPEG-2. This standard encodes a small
`
`fraction of the individual video frames in a compressed format similar to
`JPEG, and encodes each other frame as the difference between it and the
`
`previous one. The capacity of a single—layer, single-sided DVD is about 35
`billion bits, sufficient for about 2 hours of high-quality video, and a two—
`layer, double-sided disc has four times that capacity.
`
`Audio recordings. Once made exclusively by impressing analog wave-
`forms onto vinyl or magnetic tape, audio recordings now commonly use
`digital compact discs (CDs). A CD stores music as a sequence of 16-bit
`numbers corresponding to samples of the original analog waveform, one
`sample per stereo channel every 22.7 microseconds. A full-length CD
`recording (73 minutes) contains over 6 billion bits of information.
`
`Automobile carburetors. Once controlled strictly by mechanical linkages
`(including clever “analog” mechanical devices that sensed temperature,
`pressure, etc.), automobile engines are now controlled by embedded
`microprocessors. Various electronic and electromechanical sensors con-
`
`vert engine conditions into numbers that the microprocessor can examine
`to determine how to control the flow of fuel and oxygen to the engine. The
`microprocessor’s output
`is a time-varying sequence of numbers that
`operate electromechanical actuators which, in turn, control the engine.
`
`The telephone system. It started out over a hundred years ago with analog
`microphones and receivers connected to the ends of a pair of copper wires
`(or was it string?). Even today, most homes still use analog telephones,
`which transmit analog signals to the phone company’s central office (CO).
`However, in the majority of COS, these analog signals are converted into a
`digital format before they are routed to their destinations, be they in the
`same CO or across the world. For many years the private branch exchanges
`(PBXs) used by businesses have carried the digital format all the way to the
`desktop. Now many businesses, COS, and traditional telephony service
`providers are converting to integrated systems that combine digital voice
`with data traffic over a single IP (Internet Protocol) network.
`
`Trqfiic lights. Stop lights used to be controlled by electromechanical timers
`that would give the green light to each direction for a predetermined
`amount of time. Later, relays were used in controllers that could activate
`the lights according to the pattern of traffic detected by sensors embedded
`in the pavement. Today’s controllers use microprocessors and can control
`
`
`
`15
`
`

`

`1.2 Analog versus Digital
`
`5
`
`bits each.
`mpressed
`fbits. So,
`
`5'
`i a highly
`es a small
`Similar to
`it and the
`S about 35
`md a tWO_
`
`log wave-
`:03?1:16:15;
`:form, one
`length CD
`on.
`
`a1 linkages
`mperature,
`embedded
`:ns0rs con—
`an examine
`:ngine. The
`mbers that
`engine.
`with analog
`opper wires
`telephones,
`sffice (CO).
`xerted into a
`they in the
`h exchanges
`:6 way to the
`tony service
`digital voice
`
`anical timers
`edetermined
`sold activate
`rs embedded
`i can control
`
`the lights in ways that maximize vehicle throughput or, in Sunnyvale,
`California, frustrate drivers with all kinds of perverse behavior.
`
`- Movie efiects. Special effects used to be created exclusively with miniature
`clay models, stop action, trick photography, and numerous overlays of film
`on a frame-by-frame basis. Today, spaceships, bugs, otherworldly scenes,
`and even babies from hell (in Pixar’s animated short Tin Toy) are synthe—
`sized entirely using digital computers. Might the stunt man or woman
`someday no longer be needed, either?
`The electronics revolution has been going on for quite some time now, and
`the “solid-state” revolution began with analog devices and applications like
`transistors and transistor radios. So why has there now been a digital revolution?
`There are in fact many reasons to favor digital circuits over analog ones:
`«- Reproducibility of results. Given the same set of inputs (in both value and
`time sequence), a properly designed digital circuit always produces exactly
`the same results. The outputs of an analog circuit vary with temperature,
`power-supply voltage, component aging, and other factors.
`Ease of design. Digital design, often called “logic design,” is logical. No
`special math skills are needed, and the behavior of small logic circuits can
`_
`.
`'
`.
`_
`_
`_
`be Visuahzed mentally w1thout any specral 1ns1ghts about the operation of
`capacitors, transistors, or other devices that require calculus to model.
`Flexibility and functionality. Once a problem has been reduced to digital
`form, it can be solved using a set of logical steps in space and time. For
`example, you can design a digital circuit that scrambles your recorded
`voice so that it is absolutely indecipherable by anyone who does not have
`your “key” (password), but it can be heardIVirt‘ually undistorted by anyone
`who does. Try domg that w1th an analog Clrcuit.
`Programmability. You’re probably already quite familiar with digital com—
`puters and the ease with which you can design, write, and debug programs
`for them. Well, guess what? Much of digital design is carried out today by
`writing programs, too, in hardware description languages (HDLs). These
`languages allow both structure and function of a digital circuit to be
`specified or modeled. Besides a compiler, a typical HDL also comes with
`simulation and synthesis programs. These software tools are used to test
`the hardware model’s behavior before any real hardware is built, and then
`to synthesize the model into a circuit in a particular component technology.
`
`Speed. Today’s digital devices are very fast. Individual transistors in the
`fastest integrated circuits can switch in less than 10 picoseconds, and a
`COmplete, complex device built from these transistors can examine its
`Inputs and produce an output in less than a nanosecond. This means that
`such a device can produce a billion or more results per second.
`
`llttl‘t/H'tll‘t' llt‘AYJFl/illon
`Iaugmlgt' (HUN
`haw/wary Him/(‘l
`
`
`
`16
`
`

`

`6
`
`Chapter 1
`
`Introduction
`
`
`
`
`SHORT TIMES
`[0'3 second, and a microsecond (as) is HT“ second. A I
`A millisecond (ms) is
`nanosecond (MS)
`is just 10'9 second, and a picosecond ([73) is l0”'2 second. In a
`'
`vacuum, light travels about a foot in a nanosecond, and an inch in 85 picoseconds.
`
`With individual transistors in the fastest integrated circuits now switching in less
`than IO picoseconds,
`the speed-of-light delay between these transistors across a
`hall-inch-squarc silicon chip has become a limiting factor in circuit design.
`
`Il
`
`
`
`
`
`
`
`
`
`
`'
`
`~ Economy. Digital circuits can provide a lot of functionality in a small
`space. Circuits that are used repetitively can be “integrated“ into a single
`"chip" and mass-produced at very low cost. making possible throw-away
`items like calculators. digital Watches. and singing birthday cards. [You
`“Is this such a good thing?" Never mind!)
`may ask,
`Sicurt’ilv advancing tetrhurilogit. When you design a digital system, you
`almost always know that there will be a faster, cheaper, or otherwise better
`technology for it in a few years. Clever designers can accommodate these
`expected advances during the. initial design of a system. to forestall system
`obsolescence and to add value for customers. For example, desktop com-
`puters often have “expansion sockets” to accommodate faster processors
`or larger memories than are available at
`the time of the computer’s
`introduction.
`
`So, that’s enough of a sales pitch on digit
`give you a bit more technical background
`
`al design. The rest of this chapter will
`to prepare you for the rest of the book.
`
`I
`
`I
`|
`I
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`re