Digital Design
`
`Principles and Practices
`Fourth Edition:
`—
`
`see|os
`
`SSSae
`
`IPR2018-01315
`
`ae
`eo-e\
`|ooeeSUOQ2a
`GisbYey|
`Sear(eCaS '
`
`relate F. Wakerly
`
`Exhibit 1024
`Apple v. Qualcomm
`
`1
`
`Exhibit 1024
`Apple v. Qualcomm
`IPR2018-01315
`
`

`

`DIGITAL DESIGN
`Principles and Practices
`
`Fourth Edition
`
`
`
`
`John F. Wakerly
`Cisco Systems, Inc.
`Stanford University
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`PEARSON
`
`Sev
`
`| Prentice
`
`
`Upper Saddle River, New Jersey 07458
`
`2
`
`

`

`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Wakerly, John F.
`Digital design: principles and practices/ John F, Wakerly.--4th ed.
`p.cm.
`Includes index
`ISBN 0-13-186389-4
`1. Digital integrated circuits--Design and construction.I. Title
`TK7874.65,W34 2005
`621.39°5-de22
`
`2005048710
`
`Vice President and Editorial Director, ECS: Marcia Horton
`Editorial Assistant: Richard Virginia
`Executive Managing Editor: Vince O’Brien
`Managing Editor: David A. George
`Production Editor: Scott Disanno
`Director of Creative Services: Paul Belfanti
`Art Director: Kenny Beck
`Cover Designer: Bruce Kenselaar
`Art Editor: Xiaohong Zhu
`Manufacturing Manager: Alexis Heydt-Long
`Manufacturing Buyer: Lisa McDowell
`Senior Marketing Manager: Holly Stark
`About the Cover: Original cover artwork © 2001 Ken Bakeman, www.kennyzen.com
`
`PEARSON © 2006, 2000, 1994, 1990 by Pearson Education, Inc.
`pega Pearson Prentice Hall
`Prentice
`Pearson Education Inc.
`teil
`
`Upper Saddle River, NJ 07458
`
`Pearson Prentice Hall™is a trademark of Pearson Education Inc.
`
`The author and publisherofthis book have usedtheir best efforts in preparing this book. Theseefforts include the develop-
`ment,research, and testing of the theories and programsto determine their effectiveness. The author and publisher shall not
`be liable in any eventfor incidental or consequential damages with, or arising out of, the furnishing, performance, or use of
`these programs.
`
`Verilog is a trademark of Cadence Design Systems, Inc. Silos is a trademark of Simucad Inc. Synopsys, and Foundation
`Express are trademarksof Synopsys, Inc. Xilinx® is a registered trademark of Xilinx Corp. Aldec is a trademark of Aldec.
`
`ISBN 0-13-186389-4
`
`11 12 13 14 15 16 17 18 19 20 VO92 18 17 16 15
`
`
`
`Pearson Education Ltd., London
`Pearson Education Australia Pty., Ltd., Sydney
`
`Pearson Education Singapore, Pte. Ltd.
`
`Pearson Education North Asia Ltd., Hong Kong
`
`Pearson Education Canada, Inc., Toronto
`
`Pearson Educacién de Mexico, S.A. de C.V.
`
`Pearson Education—Japan, Tokyo
`
`Pearson Education Malaysia, Pte. Ltd.
`
`Pearson Education, Inc., Upper Saddle River, New Jersey
`
`
`3
`
`

`

`CONTENTS
`
`PREFACE
`
`xv
`
`1
`
`INTRODUCTION
`
`1
`
`1
`3
`
`About Digital Design
`1.1.
`1.2 Analog versus Digital
`1.3 DigitalDevices
`6
`1.4.
`Electronic Aspects of Digital Design
`1.5
`Software Aspects of Digital Design
`1.6
`Integrated Circuits
`11
`1.7.
`Programmable Logic Devices
`1.8
` Application-Specific ICs
`16
`1.9
`Printed-Circuit Boards
`17
`
`14
`
`7
`8
`
`1.10 Digital-Design Levels
`1.141 The Name ofthe Game
`
`18
`
`22
`
`1.12 Going Forward
`Drill Problems
`23
`
`23
`
`2
`
`NUMBER SYSTEMS AND CODES
`
`25
`
`26
`Positional Number Systems
`2.1
`27
`2.2 Octal and Hexadecimal Numbers
`29
`2.3 General Positional-Number-System Conversions
`2.4 Addition and Subtraction of Nondecimal Numbers=32
`2.5 Representation of Negative Numbers
`34
`2.5.1 Signed-Magnitude Representation
`2.5.3 Radix-Complement Representation
`2.5.4 Two’s-Complement Representation
`2.5.5 Diminished Radix-Complement Representation
`2.5.6 Ones’-Complement Representation
`2.5.7 Excess Representations
`Two’s-Complement Addition and Subtraction
`39
`2.6.3 Overflow
`2.6.1 Addition Rules
`2.6.2 A Graphical View
`2.6.4 Subtraction Rules
`2.6.5 Two’s-Complement and Unsigned Binary Numbers
`2.7 Ones’-Complement Addition and Subtraction
`44
`2.8
`Binary Multiplication
`45
`
`2.5.2. Complement Number Systems
`
`vii
`
`2.6
`
`
`
`
`4
`
`

`

`viii
`
`Contents
`
`2.9
`2.10
`2.11
`2.12
`2.13
`2.14
`2.15
`
`2.16
`
`47
`Binary Division
`Binary Codes for Decimal Numbers
`Gray Code
`51
`Character Codes
`
`53
`
`48
`
`53
`
`58
`
`74
`
`DIGITAL CIRCUITS
`3.1
`3.2
`3.3
`
`79
`
`80
`
`3.3.5 Fan-In
`
`Logic Signals and Gates
`Logic Families
`84
`CMOS Logic
`86
`3.3.2 MOSTransistors
`3.3.1 CMOSLogic Levels
`3.3.3 Basic CMOS Inverter Circuit
`3.3.4 CMOS NAND and NOR Gates
`3.3.6 Noninverting Gates
`3.3.7 CMOS AND-OR-INVERT and OR-AND-INVERT Gates
`Electrical Behavior of CMOSCircuits
`96
`3.4.1 Overview
`3.4.2 Data Sheets and Specifications
`CMOS Static Electrical Behavior
`101
`
`Codesfor Actions, Conditions, and States
`n-Cubes and Distance
`57
`Codes for Detecting and Correcting Errors
`2.15.1 Error-Detecting Codes
`2.15.2 Error-Correcting and Multiple-Error-Detecting Codes
`2.15.3 Hamming Codes
`2.15.4 CRC Codes
`2.15.5 Two-Dimensional Codes
`2.15.6 Checksum Codes
`2.15.7 m-out-of-n Codes
`69
`Codesfor Serial Data Transmission and Storage
`2.16.2 Serial Line Codes
`2.16.1 Parallel and Serial Data
`73
`References
`Drill Problems
`76
`Exercises
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`3.4
`
`3.5
`
`3.6
`
`3.7
`
`3.5.1 Logic Levels and Noise Margins
`3.5,2 Circuit Behavior with Resistive Loads
`3.5.4 Fanout
`3.5.3 Circuit Behavior with Nonideal Inputs
`3.5.5 Effects of Loading
`3.5.6 Unused Inputs
`3.5.7 How to Destroy a CMOS Device
`CMOSDynamic Electrical Behavior
`3.6.1 Transition Time
`3.6.2 Propagation Delay
`
`114
`
`3.6.3 Power Consumption
`3.6.4 Current Spikes and Decoupling Capacitors
`3.6.5 Inductive Effects
`3.6.6 Simultaneous Switching and Ground Bounce
`Other CMOSInput and Output Structures
`129
`3.7.1 Transmission Gates
`3.7.2 Schmitt-Trigger Inputs
`3.7.3 Three-State Outputs
`3.7.4 Open-Drain Outputs
`3.7.5 Driving LEDs
`3.7.6 Multisource Buses
`3.7.7 Wired Logic
`3.7.8 Pull-Up Resistors
`
`
`
`5
`
`

`

`Contents
`
`ix
`
`3.8
`
`3.9
`
`141
`CMOS Logic Families
`3.8.2 AHC and AHCT
`3.8.1 HC and HCT
`3.8.3 HC, HCT, AHC, and AHCTElectrical Characteristics
`3.8.4 AC and ACT
`3.8.5 FCT and FCT-T
`3.8.6 FCT-T Electrical Characteristics
`151
`Low-Voltage CMOS Logic and Interfacing
`3.9.2 5-V Tolerant Inputs
`3.9.1 3.3-V LVTTL and LVCMOSLogic
`3.9.3 5-V Tolerant Outputs
`3.9.4 TTL/LVTTL Interfacing Summary
`3.9.5 Logic Levels Less Than3.3 V
`Bipolar Logic
`155
`3.10.2 Bipolar Junction Transistors
`3.10.1 Diode Logic
`3.10.3 Transistor-Transistor Logic
`3.10.5 TTL Fanout
`3.10.4 TTL Logic Levels and Noise Margins
`3.10.6 TTL Families
`3.10.7 A TTL Data Sheet
`3.10.8 CMOS/TTL Interfacing
`3.10.9 Emitter-Coupled Logic
`References
`174
`Drill Problems
`175
`Exercises
`179
`
`3.10
`
`COMBINATIONAL LOGIC DESIGN PRINCIPLES
`4.1
`
`183
`
`184
`Switching Algebra
`4.1.1 Axioms
`4.1.2 Single-Variable Theorems
`4.1.3 Two- and Three-Variable Theorems
`4.1.4 n-Variable Theorems
`4.1.5 Duality
`4.1.6 Standard Representations of Logic Functions
`Combinational-Circuit Analysis
`199
`Combinational-Circuit Synthesis
`205
`4.3.2 Circuit Manipulations
`4.3.1 Circuit Descriptions and Designs
`4.3.4 Karnaugh Maps
`4.3.3 Combinational-Circuit Minimization
`4.3.5 Minimizing Sums of Products
`4.3.6 Other Minimization Topics
`4.3.7 Programmed Minimization Methods
`Timing Hazards
`224
`4.4.1 Static Hazards
`4.4.3, Dynamic Hazards
`References
`229
`Drill Problems
`230
`Exercises
`232
`
`
`
`
`
`4.2
`4.3
`
`4.4
`
`4.4.2 Finding Static Hazards Using Maps
`4.4.4 Designing Hazard-Free Circuits
`
`HARDWARE DESCRIPTION LANGUAGES—237
`5.1
`
`5.2
`
`d Logic
`
`238
`HDL-Based Digital Design
`5.1.1 Why HDLs?
`5.1.2 HDL Tool Suites
`5.13 HDL-Based Design Flow
`243
`The ABEL Hardware Description Language
`5.2.) ABEL ProgramStructure
`5.2.2 ABEL Compiler Operation
`5.2.3 WHEN Statements and Equation Blocks
`5.2.4 Truth Tables
`5.2.5 Ranges, Sets, and Relations
`5.2.6 Test Vectors
`5.2.7 Additional ABEL Features
`
`6
`
`

`

`
`
`Contents
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`5.4
`
`5.3.12 Synthesis
`
`256
`5.3 The VHDL Hardware Description Language
`5.3.1 Program Structive
`5.3.2 Types, Constants, and Arrays
`5.3.3 Functions and Procedures
`5.3.4 Libraries and Packages
`53.5 Structural Design Elements
`§.3.6 Dataflow Design Elements
`5.3.7 Behavioral Design Elements
`5.3.8 The Time Dimension
`5.3.9 Simulation
`5.3.10 Test Benches
`5.3.11 VHDLFeatures for Sequential Logic Design
`The Verilog Hardware Description Language
`290
`5.4.1 Program Structure
`5.4.2 Logic System, Nets, Variables, and Constants
`5.4.3 Vectors and Operators
`5.4.4 Arrays
`5.4.5 Logical Operators and Expressions
`5.4.6 Compiler Directives
`5.4.7 Structural Design Elements
`5.4.8 Dataflow Design Elements
`5.4.9 Behavioral Design Elements (Procedural Code)
`5.4.10 Functions and Tasks
`5.4.11 The Time Dimension
`5.4.12 Simulation
`5.4.13 Test Benches
`5.4.14 Verilog Featuresfor Sequential Logic Design
`References
`335
`Drill Problems
`337
`Exercises
`338
`
`5.4.15 Synthesis
`
`
`
`
`
`6 COMBINATIONAL LOGIC DESIGN PRACTICES=341
`6.1.
`Documentation Standards
`342
`
`6.1.1 Block Diagrams
`6.1.2 Gate Symbols
`
`6.1.3 Signal Namesand Active Levels
`6.14 Active Levels for Pins
`
`6.1.5 Bubble-to-Bubble Logic Design
`
`6.1.7 Drawing Layout
`6.1.6 Signal Naming in HDL Programs
`
`6.1.8 Buses
`6.1.9 Additional Schematic Information
`
`6.2 Circuit Timing
`362
`
`6.2.1 Timing Diagrams
`
`6.2.3 Timing Specifications
`
`6.2.5 Timing Analysis Tools
`
`6.3 Combinational PLDs
`370
`
`6.3.1 Programmable Logic Arrays
`
`6.3.2 Programmable Array Logic Devices
`
`6.3.3 Generic Array Logic Devices
`
`6.3.4 Complex Programmable Logic Devices (CPLDs)
`
`6.3.5 CMOSPLD Circuits
`6.3.6 Device Programming and Testing
`
`6.4 Decoders
`384
`
`
`6.4.1 Binary Decoders
`6.4.2 Logic Symbols for Larger-Scale Elements
`
`6.4.3 The 74x138 3-to-8 Decoder
`6.4.4 Cascading Binary Decoders
`
`6.4,5 Decoders in ABEL and PLDs
`6.4.6 Decoders in VHDL
`
`6.4.7 Decoders in Verilog
`6.4.8 Seven-Segment Decoders
`
`Encoders
`408
`
`6.5.2 The 74x148Priority Encoder
`6.5.1 Priority Encoders
`
`6.5.3 Encoders inABEL and PLDs
`6.5.4 Encoders in VADL
`
`6.5.5 Encoders in Verilog
`
`6.2.2 Propagation Delay
`6.2.4 Timing Analysis
`
`6.5
`
`
`
`7
`
`

`

`6.6
`
`Three-State Devices
`
`418
`
`Contents
`
`xi
`
`ES
`
`thesis
`
`ctives
`ents
`
`snthesis
`
`Pins
`
`6.7
`
`6.8
`
`6.9
`
`6.10
`
`6.14
`
`6.6.2 Standard MSI Three-State Buffers
`6.6.1 Three-State Buffers
`6.6.3 Three-State Outputs in ABEL and PLDs
`6.6.4 Three-State Outputs in VHDL
`6.6.5 Three-State Outputs in Verilog
`Multiplexers
`432
`6.7.2 Expanding Multiplexers
`6.7.1 Standard MSI Multiplexers
`6.7.3 Multiplexers, Demultiplexers, and Buses
`6.7.4 Multiplexers in ABEL and PLDs
`6.7.5 Multiplexers in VADL
`6.7.6 Multiplexers in Verilog
`447
`Exclusive-OR Gates and Parity Circuits
`6.8.) Exclusive-OR and Exctusive-NOR Gates
`6.8.3 The 74x280 9-Bit Purity Generator
`6.8.4 Parity-Checking Applications
`6.8.5 Exclusive-OR Gates and Parity Circuits in ABEL and PLDs
`6.8.6 Exclusive-OR Gates and Parity Circuits in VADL
`6.8.7 Exciusive-OR Gates and Parity Circtits in Verilog
`Comparators
`458
`6.9.2 fterative Circuits
`6.9.) Comparator Structure
`6.9.3 AnIterative Comparator Circuit
`6.9.4 Standard MSI Magnitude Comparators
`6.9.5 Comparators in HDLs
`6.9.6 Comparators in ABEL and PLDs
`6.9.7 Comparators in VHDL
`6.9.8 Comparators in Verilog
`Adders, Subtractors, and ALUs
`474
`6.10.2 Ripple Adders
`6.10.1 Half Adders and Full Adders
`6.10.3 Subtractors
`6.10.4 Carry-Lookahead Adders
`6.10.5 MSI Adders
`6.10.6 MSI Arithmetic and Logic Units
`6.10.7 Group-Carry Lookahead
`6.10.8 Adders in ABEL and PLDs
`6.10.9 Adders in VHDL
`6.10.10 Addersin Verilog
`Combinational Multipliers
`494
`6.11.1 Combinational Multiplier Structures
`6.11.2 Multiplication in ABEL and PLDs
`6.11.4 Multiplication in Verilog
`References
`508
`Drill Problems
`509
`Exercises
`511
`
`0.8.2 Parity Circuits
`
`6.41.3 Multiplication in VHDL
`
`
`
`esting
`SEQUENTIAL LOGIC DESIGN PRINCIPLES—521
`7.1
`Bistable Elements
`523
`
`ecoders
`
`7.1.1 Digital Analysis
`7.1.3 Metastable Behavior
`
`7.1.2 Analog Analysis
`
`7.2
`
`526
`Latches and Flip-Flops
`7.2.1 8-R Latch
`7.2.2 3-R Latch
`
`7.2.3 S-R Latch with Enable
`
`7.2.5 Edge-Triggered D Flip-Flop
`7.2.4 D Latch
`7.2.6 Edge-Triggered D Flip-Flop with Enable
`7.2.7 Scan Flip-Flop
`7.2.8 Master/Slave S-R Flip-Flop
`7.2.9 Master/Slave J-K Flip-Flop
`7.2.10 Edge-Triggered J-K Flip-Flop
`7.2.11 T Flip-Flop
`
`
`
`8
`
`

`

`7.4
`
`7.5
`7.6
`
`77
`
`7.8
`7.9
`
`590
`
`
`Contents
`xil
`
`Clocked Synchronous State-Machine Analysis
`542
`7.3
`
`7.3.1 State-Machine Structure
`7.3.2 Output Logic
`
`7.3.3 Characteristic Equations
`
`7,3.4 Analysis of State Machines with D Flip-Flops
`
`Clocked Synchronous State-Machine Design
`553
`
`7.4.1 State-Table Design Example
`7.4.2 State Minimization
`7.4.3 State Assignment
`7.4.4 Synthesis Using D Flip-Flops
`
`7.4.5 Synthesis Using J-K Flip- Flops
`
`7.4.6 More Design Examples Using D Flip-Flops
`
`570
`Designing State Machines Using State Diagrams
`
`577
`State-Machine Synthesis Using Transition Lists
`
`7.6.1 Transition Equations
`7.6.2 Excitation Equations
`
`7.6.3 Variations on the Scheme
`7.6.4 Realizing the State Machine
`Another State-Machine Design Example
`580
`
`7.7.1 The Guessing Game
`7.7.2 Unused States
`
`7.7.3. Output-Coded State Assignment
`
`7.7.4 “Don’t-Care” State Codings
`
`587
`Decomposing State Machines
`
`Feedback Sequential-Circuit Analysis
`
`7,9,1 Basic Analysis
`
`7.9.2 Analyzing Circuits with Multiple Feedback Loops
`
`7.9.3 Races
`7.9.4 State Tables and Flow Tables
`
`7.9.5 CMOSD Flip-Flop Analysis
`
`601
`Feedback Sequential-Circuit Design
`
`7.10.1 Latches
`7.10.2 Designing F'undamental-Mode Flow Table
`
`7.10.3 Flow-Table Minimization
`7.10.4 Race-Free State Assignment
`
`7.10.5 Excitation Equations
`7.10.6 Essential Hazards
`
`
`7.10.7 Summary
`612
`ABEL Sequential-Circuit Design Features
`
`7.11.1 Registered Outputs
`7.11.2 State Diagrams
`
`7.11.3 External State Memory
`7.11.4 Specifying Moore Outputs
`
`7.11.5 Specifying Mealy and Pipelined Outputs with WI.TH
`
`7.11.6 Test Vectors
`
`625
`Sequential-Circuit Design with VHDL
`
`7.12.1 Clocked Circuits
`7.12.2 State-Machine Design with VHDL
`7.12.3 A VHDL State-Machine Example
`
`7.12.4 State Assignmentin VHDL
`7.12.5 Pipelined Outputs in VADL
`
`7.12.6 Direct VADL Coding Without a State Table
`
`7.12.7 More VHDL State-Machine Examples
`
`7.12.8 Specifying Flip-Flops in VHDL
`
`7,12,9 VHDL State-Machine Test Benches
`
`7.12.10 Feedback Sequential Circuits
`
`646
`Sequential-Circuit Design with Verilog
`
`7.13.1 Clocked Circuits
`7.13.2 State-Machine Design with Verilog
`
`7.13.3 A Verilog State-Machine Example
`
`7.13.4 Pipelined Outputs in Verilog
`
`7.13.5 Direct Verilog Coding Without a State Table
`
`7.13.6 More Verilog State-Machine Examples
`
`
`
`7.10
`
`7.14
`
`7.12
`
`7.13
`
`9
`
`

`

`7.13.7 Specifying Flip-Flops in Verilog
`7.13.8 Verilog State-Machine Test Benches
`7.13.9 Feedback Sequential Circuits
`References
`663
`Drill Problems
`664
`Exercises
`669
`
`Contents
`
`xiii
`
`
`
`8 SEQUENTIAL LOGIC DESIGN PRACTICES—679
`
`
`
`}
`
`|
`
`|
`
`||
`
`|
`
`ne
`
`ble
`ntent
`
`r
`
`IDL
`
`; VHDL
`
`srilog
`
`8.1
`
`8.2
`
`8.3
`
`8.5
`
`8.6
`8.7
`
`8.8
`
`8.9
`
`680
`Sequential-Circuit Documentation Standards
`8.1.1 General Requirements
`8.1.2 Logic Symbols
`8.1.3 State-Machine Descriptions
`8.1.4 Timing Diagrams and Specifications
`Latches and Flip-Flops
`686
`8.2.1 SSI Latches and Flip-Flops
`8.2.3 The Simplest Switch Debouncer
`8.2.5 Multibit Registers and Latches
`8.2.6 Registers and Latches in ABEL and PLDs
`8.2.7 Registers and Latches in VHDL
`8.2.8 Registers and Latches in Verilog
`Sequential PLDs
`703
`8.3.1 Sequential GAL Devices
`8.4 Counters
`710
`
`8.2.2 Switch Debouncing
`8.2.4 Bus Holder Circttit
`
`83.2 PLD Timing Specifications
`
`84.6 Counters in VHDL
`
`8.4.2 Synchronous Counters
`8.4.1 Ripple Counters
`8.4.3 MSI Counters and Applications
`8.4.4 Decoding Binary-Counter States
`84.5 Counters in ABEL and PLDs
`84.7 Counters in Verilog
`Shift Registers
`727
`85,2 MSI Shift Registers
`8.5.1 Shift-Register Structure
`8.5.4 Ring Counters
`8.5.3 Shift-Register Counters
`6.5.5 Johnson Counters
`8.5.6 Linear Feedback Shifi-Register Counters
`8.5.7 Shift Registers in ABEL and PLDs
`8.5.8 Shift Registers in VADL
`8.5.9 Shift Registers in Verilog
`752
`Iterative versus Sequential Circuits
`Synchronous Design Methodology
`8.7.1 Svachronous System Structure
`
`Impediments to Synchronous Design
`
`756
`758
`
`762
`
`8.8.2 Gating the Clock
`&.8.1 Clock Skew
`8.8.3 Asyachronous Inputs
`769
`Synchronizer Failure and Metastability
`8.9.1 Synchronizer Failure
`§.9.2 Metastability Resolution Time
`8.9.3 Reliable Synchronizer Design
`&.9.4 Analysis of Metastable Timing
`8.9.6 Other Synchronizer Designs
`
`8.9.5 Better Synchronisers
`
`8.9.7 Syachronizing High-Speed Data Transfers
`References
`788
`Drill Problems
`790
`Exercises
`792
`
`
`
`10
`
`

`

`xiv
`
`Contents
`
`—=s799
`
`9.2
`9.3
`
`9.1.6 ROM Applications
`
`9.4
`
`9.5
`
`9.6
`
`9.4.2 SDRAM Timing
`
`840
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`MEMORY, CPLDS, AND FPGAS
`9.1
`Read-Only Memory
`800
`9.1.1 Using ROMs for “Random” Combinational Logic Functions
`9.1.2 Internal ROM Structure
`9.1.3 Two-Dimensional Deceding
`9.1.4 Commercial ROM Types
`9.1.5 ROM Control Inputs and Timing
`Read/Write Memory
`821
`Static RAM
`822
`9.3.1 Static-RAM Inputs and Outputs
`9.3.2 Static-RAM Internal Structure
`9.3.3 Static-RAM Timing
`9.3.4 Standard Static RAMs
`9.3.5 Synchronous SRAM
`Dynamic RAM 833
`9.4.1 Dynamie-RAMStructure
`9.4.3 DDR SDRAMs
`Complex Programmable Logic Devices
`9.5.1 Xilinx XC9500 CPLD Family
`9.5.2 Function-Block Architecture
`9.5.3 Input/Output-Block Architecture
`Field-Programmable Gate Arrays
`850
`9.6.1 Xilinx XC4000 FPGA Family
`9.6.2 Configurable Logic Block
`9.6.3 Input/Output Block
`9.6.4 Programmable Interconnect
`References
`859
`Drill Problems
`859
`Exercises
`860
`
`9.5.4 Switch Matrix
`
`INDEX
`
`863
`
`
`
`11
`
`

`

`
`
`
`
`chapter
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`eeeeeeeeeweeseeeeeeeeeeeeoeeeeeeOe
`
`
`
`eoemnecrsoeseecentenaen
`
`
`
`elcome to the world of digital design, Perhaps you’re a com-
`puter science student who knowsall about computer software
`and programming, but you’re still trying to figure out how all
`that fancy hardware could possibly work. Or perhaps you’re
`an electrical engineering student who already knows
`something about analog electronics and circuit design, but you wouldn’t
`knowa bit if it bit you. No matter, Starting fromafairly basic level, this book
`will show you how to design digital circuits and subsystems.
`We’ll give you the basic principles that you need to figure things out,
`and we’ll give you lots of examples. Along with principles, we’ll try to
`convey the flavor of real-world digital design by discussing current,
`practical considerations whenever possible. And1, the author, will often
`refer to myself as “we”in the hope that you’ I] be drawnin andfeel that we’re
`walking through the learning process together.
`
`
`
`
`
`
`
`
`
`1.1 About Digital Design
`Somepeople call it “logic design.” That’s OK, but ultimately the goal of
`design is to build systems. To that end, we’ll cover a whole lot morein this
`text than logic equations and theorems.
`This book claims to be about principles and practices. Most of the
`principles that we present will continue to be important years from now,
`
`12
`
`

`

`
`
`|
`
`Chapter 1
`
`Introduction
`
`some may be applied in ways that have not even been discovered yet. As for
`practices, they may bea little different from what’s presented here by the time
`you start working in the field, and they will certainly continue to change
`throughout yourcareer. So you should treat the “practices” material in this book
`as a way to reinforce principles, and as a way to learn design methods by
`example.
`Oneofthe book’s goals is to present enough aboutbasic principles for you
`to know what’s happening when you use software tools to “turn the crank”for
`you. The samebasic principles can help youget to the root of problems whenthe
`tools happen to get in your way.
`Listed in the box on this page are several key points that you should learn
`through yourstudies with this text. Most of these items probably make no sense
`to youright now, but you should come back and review them later.
`Digital design is engineering, and engineering means “problem solving.”
`Myexperience is that only 5%-10% of digital design is “the fun stuff’—the
`creative part of design, the flash of insight, the invention of a new approach.
`Muchoftherest is just “turning the crank.” To be sure, turning the crank ismuch
`easier now than it was 25 or even 10 years ago, but youstill can’t spend 100%or
`even 50% of yourtime on the funstuff.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`IMPORTANT
`THEMESIN
`DIGITAL DESIGN
`
`* Good tools do not guarantee good design, but they help a lot by taking the pain
`out of doing things right.
`° Digital circuits have analog characteristics.
`* Know when to worry and when not to worry about the analog aspects of digital
`design.
`* Always document your designs to make them understandable to yourself and to
`others.
`© Use consistent coding, organizational, and documentation styles in your HDL-
`based designs, following your company’s guidelines.
`* Understand and use standard functional building blocks.
`* State-machinedesign is like programming; approach it that way.
`Design for minimum cost at the system level, including your own engineering
`effort as part of the cost.
`© Design for testability and manufacturability.
`* Use programmablelogic to simplify designs, reduce cost, and accommodate last-
`minute modifications.
`* Avoid asynchronousdesign. Practice synchronous design until a better method-
`ology comesalong (if ever).
`* Pinpoint the unavoidable asynchronousinterfaces between different subsystems
`and the outside world, and provide reliable synchronizers.
`
`
`
`
`
`13
`
`

`

`et. As for
`y the time
`Est change
`1 this book
`.ethods by
`
`Besides the fun stuff and turning the crank, there are many otherareas in
`which a successfuldigital designer must be competent,including the following:
`* Debugging. It’s next to impossible to be a good designer without being a
`good troubleshooter. Successful debugging takes planning, a systematic
`approach, patience, and logic: if you can’t discover where a problem is,
`find out where it is not!
`
`1.2 Analog versus Digital
`
`3
`
`les for you
`crank” for
`s when the
`
`sould Sanh
`ce no sense
`
`
`
`= aaa]
`the pain
`
`elt
`
`|
`
`|
`
`|
`
`ngineering
`
`|
`
`0)
`/
`
`« Business requirements andpractices. A digital designer’s workis affected
`by a lot of nonengineering factors, including documentation standards,
`component availability,
`feature definitions,
`target specifications,
`task
`scheduling,office politics, and going to lunch with vendors.
`¢ Risk-taking. When you begin a design project you must carefully balance
`risks against potential rewards and consequences, in areas ranging from
`componentselection (will it be available when I’m ready to build the first
`n solving.”
`
`stuff’—the prototype?) to schedule commitments(willIstill have a job if I’m late?).
`* approach.
`* Communication. Eventually, you’!] hand off your successful designs to
`ink is much
`other engineers, other departments, and customers. Without good commu-
`nd 100% or
`nication skills, you’ll never complete this step successfully. Keep in mind
`that communication includesnot just transmitting but also receiving; learn
`to be a goodlistener!
`In the rest of this chapter, and throughout the text, I’ll continue to state
`some opinions about what’s important and whatis not. I think I’m entitled to do
`s0 as a moderately successful practitioner of digital design.
`Additional materials related to this book, such as supplemental chapter
`of digital
`sections, selected exercise solutions, and downloadable source code for all
`programs, can be found at DDPPoniine (via www. ddpp . com;see the Preface).
`Pe:
`an
`1.2 Analog versusDigital
`|
`our HDL-
`Analog devices and systems process time-varying signals that can take on any=awiclog
`value across a continuousrangeof voltage, current, or other metric. So do digital
`digital
`circuits and systems; the difference is that we can pretend that they don’t! A
`digital signal is modeled as taking on, at any time, only one of two discrete
`values, which we call 0 and / (or LOW and HIGH, FALSE and TRUE, negated
`and asserted, Frank and Teri, or whatever).
`Digital computers have been around since the 1940s and have been in
`widespread commercial use since the 1960s. Yet only in the past 10 to 20 years
`has the “digital revolution” spread to many other aspects of life. Examples of
`once-analog systemsthat have now “gonedigital” include the following:
`* Still pictures. Ten years ago, the majority of camerasstill used silver-halide
`film to record images. Today, inexpensive digital cameras record a picture
`as a 1024768 or larger array of pixels, where each pixel stores the inten-
`
`1odate last-
`
`er method-
`
`subsystems
`
`
`
`
`14
`
`

`

` Chapter 1
`
`
`Introduction
`
`
`sities of its red, green, and blue color components as 8 or more bits each.
`This data, over 18 million bits in this example,is processed and compressed
`
`in JPEG format down to as few as 5% of the original numberofbits. So,
`
`digital cameras rely on both digital storage and digital processing.
`
`
`Video recordings. A digital versatile disc (DVD) stores video in a highly
`compressed digital format called MPEG-2. This standard encodes a small
`
`fraction of the individual video frames in a compressed format similar to
`
`JPEG, and encodes each other frame as the difference between it and the
`
`previous one. The capacity ofa single-layer, single-sided DVDis about 35
`
`billion bits, sufficient for about 2 hours of high-quality video, and a two-
`
`layer, double-sided disc has four times that capacity.
`
`
`Audio recordings. Once made exclusively by impressing analog wave-
`forms onto vinyl or magnetic tape, audio recordings now commonly use
`
`digital compact discs (CDs). A CD stores music as a sequence of 16-bit
`
`numbers corresponding to samples of the original analog waveform, one
`
`sample per stereo channel every 22.7 microseconds. A full-length CD
`
`recording (73 minutes) contains over6 billion bits of information.
`
`
`Automobile carburetors. Once controlled strictly by mechanical linkages
`(including clever “analog” mechanical devices that sensed temperature,
`
`pressure, etc.), automobile engines are now controlled by embedded
`
`microprocessors. Various electronic and electromechanical sensors con-
`
`vert engine conditions into numbers that the microprocessor can examine
`
`to determine howto controlthe flow of fuel and oxygen to the engine. The
`
`microprocessor’s output
`is a time-varying sequence of numbers that
`
`operate electromechanical actuators which,in turn, control the engine.
`
`
`The telephonesystem.It started out over a hundred years ago with analog
`microphonesandreceivers connected to the endsofa pair of copper wires
`
`(or was it string?). Even today, most homesstill use analog telephones,
`
`which transmit analogsignals to the phone company’s centraloffice (CO).
`
`However, in the majority of COs, these analog signals are converted into a
`
`digital format before they are routedto their destinations, be they in the
`
`same COoracrossthe world. For manyyears the private branch exchanges
`
`(PBXs) used by businesses havecarried the digital formatall the way to the
`
`desktop. Now many businesses, COs, and traditional telephony service
`
`providers are converting to integrated systems that combinedigital voice
`
`with data traffic over a single IP (Internet Protocol) network.
`
`
`Traffic lights, Stop lights used to be controlled by electromechanicaltimers
`that would give the green light to each direction for a predetermined
`
`amountof time. Later, relays were used in controllers that could activate
`the lights according to the pattern oftraffic detected by sensors embedded
`
`
`
`in the pavement. Today’s controllers use microprocessors and can control
`
`15
`
`

`

`bits each.
`mpressed
`f bits. So,
`3°
`1a highly
`es a small
`similar to
`it and the
`s about 35
`ind a two-
`
`log wave-
`monly use
`e of 76-bit
`forim: BH
`length CD
`on
`al linkages
`
`ee
`|wansmcone
`an examine
`sngine. The
`mbers that
`engine.
`with analog
`opperwires
`telephones,
`office (CO).
`verted into a
`they in the
`h exchanges
`ie way to the
`iony service
`digital voice
`
`anical timers
`edetermined
`ould activate
`rs embedded
`{ can control
`
`1.2 Analog versus Digital
`
`5
`
`the lights in ways that maximize vehicle throughput or, in Sunnyvale,
`California, frustrate drivers with all kinds of perverse behavior.
`* Movie effects. Special effects used to be created exclusively with miniature
`clay models, stop action,trick photography, and numerousoverlays of film
`on a frame-by-frame basis. Today, spaceships, bugs, otherworldly
`scenes,
`y
`Y,
`Sp
`P
`g
`y
`and even babies from hell (in Pixar’s animated short Tin Toy) are synthe-
`;
`iy
`sized entirely using digital computers. Might the stunt man or woman
`someday no longer be needed,either?
`.
`.
`.
`.
`;
`quite some time now, and
`The electronics revolution has been going on for
`q
`going
`the “solid-state” revolution began with analog devices and applications like
`transistors andtransistor radios. So why has there now beena digital revolution?
`There are in fact many reasonsto favor digital circuits over analog ones:
`/
`.
`;
`.
`« Reproducibility of results. Given the sameset of inputs (in both value and
`time sequence), a properly designed digital circuit always produces exactly
`the same results. The outputs of an analog circuit vary with temperature,
`power-supply voltage, componentaging, andotherfactors.
`Ease of design. Digital design, often called “logic design,” is logical. No
`special math skills are needed, and the behaviorof small logic circuits can
`be visualized mentally without any special insights about the operation of
`capacitors, transistors, or other devices that require calculus to model.
`Flexibility and functionality, Once a problem has been reducedto digital
`form, it can be solved using a set of logical steps in space and time. For
`example, you can design a digital circuit that scrambles your recorded
`voice so thatit is absolutely indecipherable by anyone who does not have
`your “key” (password), but it can be heardvirtually undistorted by anyone
`who does. Try doing that with an analog circuit.
`Programmability, You’re probably already quite familiar with digital com-
`puters and the ease with which you can design, write, and debug programs
`for them. Well, guess what? Muchofdigital design is carried out today by
`hardware description
`writing programs,too, in hardware description languages (HDLs). These
`language (HDL)
`languages allow both structure and function of a digital circuit to be
`specified or modeled. Besides a compiler, a typical HDL also comes with Hardware niodel
`simulation and synthesis programs. These software tools are usedto test
`the hardware model’s behavior before any real hardwareis built, and then
`to synthesize the modelinto a circuit in a particular componenttechnology.
`Speed, Today’s digital devices are very fast. Individual transistors in the
`fastest integrated circuits can switch in less than 10 picoseconds, and a
`complete, complex device built from these transistors can examine its
`inputs and produce an output in less than a nanosecond. This meansthat
`such a device can produce a billion or more results per second.
`
`
`
`16
`
`

`

`
`
`Chapter 1 Introduction
`
`
`cond (us) is 108 second, A |
`
`SHORT TIMES
`A millisecond (ms) is 10-3 second, and a microse
`nanosecond (ns) is just 10-2 second, and a picosecond (ps) is 1071? second. Ina
`|
`vacuum,light travels aboul a foot in a nanosecond,and an inch in 85 picoseconds.
`With individual transistors in the fastest integrated circuits now switching in less
`than 10 picoscconds,
`the speed-of-light delay between these transistors across a
`half-inch-squaresilicon chip has becomea limiting factorin circuit design,
`
`|
`
`|
`
`|
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ide a lot of functionality in a small
`* Economy. Digital circuits can prov
`space. Circuits that are used repetitively can be “integrated” intoa single
`“chip” and mass-producedat very low cost, making possible throw-away
`items like calculators, digital watches, and singing birthday ecards. (You
`may ask, “Is this such a good thing?” Never mind!)
`» Steadily advancing technology. When you design a digital system, you
`almost always know that there will be a faster, cheaper, or otherwise better
`technology forit in a few years. Clever designers can accommodate these
`expectedadvances during theinitial design of a system,to forestall system
`obsolescence and to add value for customers. For example, desktop com-
`“expansion sockets” to accommodate faster processors
`puters often have
`e time of the computer's
`or larger memories than are available at
`th
`introduction.
`So, that’s enoughofa sales pitch on digital design. Therest ofthis chapter will
`give you a bit more technical background to prepare you for the rest ofthe book.
`1.3 Digital Devices
`The mostbasic digital devices are called gates, and no, they were not named
`after the founder ofa large software company. Gates originally got their name
`from their function of allowing or retarding (“gating”) the flow of digital
`information. In general, a gate has one or more inputs and produces an output
`that is a function of the current input value(s). Wh