`
`(12) United States Patent
`(10) Patent N0.:
`US 7,518,155 B2
`Ishidu et a1.
`(45) Date of Patent:
`Apr. 14, 2009
`
`(54) LIGHT EMITTING ELEMENT MOUNTING
`MEMBER, AND SEMICONDUCTOR DEVICE
`USING THE SAME
`
`(56)
`
`References Cited
`US. PATENT DOCUMENTS
`
`(75)
`
`Inventors: Sadamu Ishidu, Itami (JP); Kenjiro
`Higaki, Itami (JP); Takashi Ishii, Itami
`(JP); Yasushi Tsuzuki, Itami (JP)
`
`(73) Assignee: Sumitomo Electric Industries, Ltd.,
`Osaka (JP)
`
`(*) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 15403) by 19 days.
`
`(21) Appl.No.:
`
`1 0/546,777
`
`(22)
`
`PCT Filed:
`
`Mar. 15, 2004
`
`(86)
`
`PCT No.:
`
`PCT/JP2004/003443
`
`§ 371 (0)0),
`(2), (4) Date:
`
`Aug. 24., 2005
`
`(87)
`
`PCT Pub. No.: W02004/084319
`
`PCT Pub. Date: Sep. 30, 2004
`
`Prior Publication Data
`
`US 2006/0198162 A1
`
`Sep. 7, 2006
`
`Foreign Application Priority Data
`
`(65)
`
`(30)
`
`Mar. 18, 2003
`
`(JP)
`
`............................. 2003-074036
`
`(51)
`
`Int. Cl.
`(2006.01)
`H01L 33/00
`(52) US. Cl.
`.............................. 257/98; 257/79; 257/99
`(58) Field of Classification Search ................... 257/79,
`257/94799; 372/4301, 50.23; 362/613,
`362/623, 341, 345, 3477350, 800
`See application file for complete search history.
`
`5,760,479 A *
`
`6/1998 Yang et a1.
`
`.................. 257/778
`
`(Continued)
`
`FOREIGN PATENT DOCUMENTS
`02-056955 B2
`2/1990
`
`JP
`
`(Continued)
`OTHER PUBLICATIONS
`
`International Search Report for PCT/JP 2004/003443 mailed Jun. 15,
`2004.
`
`(Continued)
`
`Primary ExamineriM. Wilczewski
`Assistant ExamineriPaul E Patton
`(74) Attorney, Agent, or FirmiDarby & Darby PC.
`
`(57)
`
`ABSTRACT
`
`Ihc objcct of thc present invention is to provide a light-
`emit‘ting element motmting member and a semiconductor
`device using the same that is easy to process and that allows
`adequate heat dissipation.
`
`A light-emitting element mounting member 200 includes: a
`substrate 2 including an element mounting surface 211 mount-
`ing a semiconductor light—emitting element 1 and first and
`second conductive regions 21, 22 disposed on the element
`mounting surface 2a and connected to the semiconductor
`light-emitting element 1; a reflective member 6 including a
`reflective surface 6a defining an internal space 6b for housing
`the semiconductor light—emitting element 1 and containing a
`metal disposed 011 the element mounting surface 1a; and a
`metal layer 13 disposed on the reflective surface 6a. The
`reflective surface 6a is sloped relative to the element mount-
`ing surface 2a so that a diameter of the internal space 6b is
`greater away from the element mounting surface 2a.
`
`14 Claims, 6 Drawing Sheets
`
`
`
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`9
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`
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`
`33
`
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`
`3d
`
`22
`
`200
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US 7,518,155 B2
`
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`12/2002 lshinaga ...................... 257/99
`6,495,861 B1 *
`
`.. 257/211
`8/2004 Lieberetal.
`6,781,166 132*
`
`3/2006 Suenaga
`257/99
`7,019,335 132*
`
`1/2007 Palmleer eta.
`, 257/98
`7,157,744 B2 *
`.................. 257/79
`7/2002 Tamaietal.
`2002/0084462 A1*
`8/2002 Schliep et a1.
`2002/0105268 A1
`6/2003 Song etal.
`2003/0116769 A1
`..................... 257/79
`3/2004 Yuri et a1.
`2004/0041159 A1 *
`2004/0183081 AH 9/2004 Shishov etal.
`................ 257/79
`2004/0211970 A1 *
`10/2004 Hayashimoto et a1.
`257/98
`2005/0093116 A1 *
`5/2005 Palmteer et al. ............. 257/676
`FOREIGN PATENT DOCUMENTS
`11-345999 A
`12/1999
`
`JP
`
`JP
`
`j:
`JP
`JP
`W9
`W0
`
`2002-232017 A
`_
`5
`2288730081711: A
`9
`’7
`20034613 A
`2004434699 A
`“’0-01/45180 A1
`02/089219 A1
`
`8/2002
`/
`$83:
`2/
`~20“
`4/2004
`”001
`11/2002
`
`OTHER PUBLICATIONS
`
`PCT Notification of Transmittal of Copies of Translation of the
`International Preliminary Report on Patentability (Chapter I or Chap-
`ter H of the Patent Cooperation Treaty) mailed Nov. 17, 2005.
`
`* cited by examiner
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 1 of6
`
`US 7,518,155 B2
`
`FIG. 1A
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`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 2 of6
`
`US 7,518,155 B2
`
`FIG. 2
`
`
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 3 of6
`
`US 7,518,155 B2
`
`
`
`FIG. 3B1
`
`FIG. 3B2
`
`FIG. 3B3
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`
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`FIG. 3B5
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`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 4 of6
`
`US 7,518,155 B2
`
`FIG. 4
`
`204
`
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`
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 5 of6
`
`US 7,518,155 B2
`
`m
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US. Patent
`
`Apr. 14, 2009
`
`Sheet 6 of6
`
`US 7,518,155 B2
`
`FIG. 11
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`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US 7,518,155 B2
`
`1
`LIGHT EMITTING ELEMENT MOUNTING
`MEMBER, AND SEMICONDUCTOR DEVICE
`USING THE SAME
`
`CROSS-RI 1.1"] IR] INCH 'I'() PRIOR APPLICATION
`
`This is a U.S. National Phase application under 35 U.S.C.
`§371 of International Patent Application No. PCT/JP2004/
`003443 filed Mar. 15, 2004, and claims the benefit of Japa—
`nese Patent Application No. 2003-074036, filed March 18,
`2003, both ofwhich are incorporated by reference herein. The
`lntcrnational Application was publishcd in Japancsc on Scp.
`30, 2004 as WO 2004/084319 A1 under PCT Article 21(2).
`
`TECHNICAL FIELD
`
`The present invention relates to a light-emitting element
`mounting mcmbcr and a semiconductor device using the
`same. More specifically, the present invention relates to a
`light—emitting mounting element for mounting a light—emit—
`ting diode, a semiconductor laser, or the like and a semicon-
`ductor device using the same.
`
`BACKGROUN D AR1'
`
`An example of a conventional member for mounting semi—
`conductor light-emitting elements is described in Japanese
`Laid—Open Patent Publication Number 2002—232017.
`In the semiconductor mounting member described in this
`publication, a substrate and a ceramic window frame sur-
`rounding a light-emitting element is formed from a ceramic
`having as its main component aluminum oxide, aluminum
`nitride, or the like.
`With the increase in output in light-emitting elements in
`recent years, there has also been an increase in heat generated
`by semiconductor light-emitting elements. When a ceramic
`having aluminum oxide as its main component (hereinafter
`referred to also as altmiina) is used in the substrate and the
`window frame, adequate heat dissipation is not possible, lead-
`ing to increased temperature.
`Furthermore, if aluminum nitride, which has high thermal
`conductivity, is used, the raw material is more expensive and
`harder to process than alumina. Furthermore, ifa metallized
`layer is formed on the surface, a metallized layer having W or
`Mo must generally be formed first. In such cases, a method is
`used in which a metal paste having W or Mo as its main
`component is first applied to a green sheet and then this is
`fired together with the main aluminum nitride ceramic unit
`(co-fired metallizing). With this method, however, thermal
`deformation and the like take place during firing, making it
`difficult to precisely form a metallized layer with a fine pat-
`tern, e.g., of less than 100 microns.
`
`
`
`DISCLOSURE OF INVENTION
`
`The object of the present invention is to overcome the
`problems described above and to provide a light—emitting
`element mounting member and semiconductor device that
`uses the same that has high thermal conductivity and that is
`easy to process.
`The present inventors performed various investigations
`regarding light-emitting element mounting members that
`adequately dissipate heat generated by semiconductor light-
`emitting elements and that are easy to process. As a result, it
`was found that preferable characteristics can be obtained by
`using a mounting member with high thermal conductivity by
`including metal in a reflective member.
`
`2
`In order to achieve the object described above, a light-
`emit‘ting element mounting member according to the present
`invention includes: a substrate including an element mount-
`ing surface mounting a semiconductor light—emitting element
`and first and second conductive regions disposed on the ele-
`ment mounting surface and connected to the semiconductor
`light—emitting element; a reflective member including a
`reflective surface defining an internal space for housing the
`semiconductor light—emitting element and containing a metal
`disposed on the element mounting surface; and a metal layer
`disposed on the reflective surface. The reflective surface is
`slopcd rclativc to thc clcmcnt mounting surface so that a
`diameter of the internal space is greater away from the ele-
`ment mounting surface.
`In a light-emitting element mounting member formed in
`this manner, the substrate serves as a high thermal conduc-
`tivity mcmbcr, thus allowing adcquatc dissipation ofthc hcat
`generated by the semiconductor light-emitting element. Fur-
`thermore, since the reflective member contains metal, pro—
`cessing is made easier compared to a structure in which the
`reflective member is formed from ceramic. This makes it
`possible to provide a light-emitting clcmcnt mounting mem-
`ber that is easier to process.
`Also, since the reflective member contains metal, the bond
`with the metal layer disposed on the reflective surface of the
`reflective member improves. As a result, a light-emitting ele-
`ment mounting mcmbcr that is casy to producc can bc pro-
`vided.
`It would be preferable for the light—emitting element
`mounting member to further include a bonding layer bonding
`the element mounting surface and the reflective member. A
`heat rcsistancc tcmpcraturc ofthe bonding layer is at least 300
`deg C. The bonding layer rnelts at a temperature of no more
`than 700 deg C. and bonds the element mounting surface and
`the reflective member. In this case, since the bonding layer
`has a heat resistance temperature of at least 300 deg C., the
`bonding layer can prevent peeling of the substrate and the
`reflective member and is practical even if the temperature
`when the semiconductor light—emitting element is mounted
`on the light-emitting element mounting member is 250-300
`deg C. Thus, a highly reliable light-emitting element mount-
`ing mcmbcr can bc obtaincd. Furthcrmorc, sincc the bonding
`temperature is no more than 700 deg C ., ifmetallized patterns
`formed from Au, Ag orAl or the like are formed on the surface
`ofthe substrate, degradation oftlie metallized patterns can be
`prevented. Since the heat resistance temperature of these
`mctallizcd pattcms arc gcncrally no more than 700 dcg C., thc
`bonding can be performed without degradation of the metal-
`lized patterns by bonding at a temperature of no more than
`700 deg C.
`More preferably, the substrate is insulative, first and second
`through-holes arc fomicd on the substratc, thc first conductor
`region is formed at the first through-hole, and the second
`conductor region is formed at the second through—hole. In this
`case, since the first and second conductor regions extend from
`the surface of the substrate on which the element mounting
`surface is formed to the opposite surface, electrical power can
`be supplied to the first and the second conductor regions from
`the opposite surface. More preferably, a minimum formation
`dimension of metal film patterns ofthe first and/or the second
`conductor region is at least 5 microns and less than 100
`microns. As a result, light-emitting elements can be mounted
`using the flip-chip method. More preferably, the dimension is
`less than 50 microns. The minimum formation dimension of
`patterns here refers to the minimum widths, minimum dis-
`tances between patterns, and the like in the metallized pat-
`tems.
`
`5
`
`10
`
`15
`
`20
`
`25
`
`30
`
`'55
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US 7,518,155 B2
`
`3
`A semiconductor device according to the present invention
`includes a light—emitting element mounting member as
`described in any of the above; and a semiconductor light-
`emitting element mounted on the element mounting surface.
`The semiconductor light-emitting element includes a main
`surface facing the element mounting surface and the substrate
`includes a bottom surface positioned opposite from the ele—
`ment mounting surface. A ratio H/L between a distance H
`from the bottom surface to the element mounting surface and
`a distance I. along a direction of a long side of the main
`surface ofthe semiconductor light-emitting element is at least
`0.3.
`In this case, since the ratio H/L between the long-side
`length L and the distance H from the bottom surface to the
`element mounting surface is optimized, a semiconductor
`device with high heat dissipation can be obtained. Ifthe ratio
`H/L between the long-side length L and the distance H from
`the bottom surface to the element mounting surface is less
`than 0.3. the distance H from the bottom surface to the ele—
`ment mounting surface becomes too small relative to the
`long-side length L, preventing adequate heat dissipation.
`It wouldbe preferable for an electrode to be disposed on the
`main surface side of the semiconductor light-emitting ele-
`ment and electrically connected to the first and/or the second
`conductor region. In this case, since the electrode is disposed
`on the main surface side and the electrode is directly con-
`nected electrically to the first and/or the second conductor
`region, the heat generated by the light-emis sion layer, which
`is the section of the semiconductor light—emitting element
`that especially generates heat, is transmitted directly to the
`substrate by way of the electrode. As a result. the heat gener-
`ated by the light-emission layer is efliciently dissipated to the
`substrate, providing a light-emitting element mounting mem-
`ber with superior cooling properties. It would also be prefer—
`able for the main surface to have an area of at least I mmz.
`
`
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 shows cross-section drawings of a light-emitting
`element according to a first embodiment ofthe present inven—
`tion and a cross-section drawing of a semiconductor device
`using the same. FIG. 1A is a cross-section drawing of a
`semiconductor device according to one aspect. FIG. 1B is a
`cross-section drawing of a semiconductor device according to
`another aspect.
`3IG. 2 is a perspective drawing of a light-emitting element
`mounting member and semiconductor device shown in FIG.
`1.
`
`31G. 3A is a perspective drawing of the semiconductor
`light—emitting element shown in FIG. 1. FIG. 3B shows
`sample outlines shapes of a main surface of the element.
`3IG. 4 is a flowchart for the purpose ofdescribing a method
`for making the semiconductor device shown in FIG. 1.
`31G. 5 is a cross-section drawing showing a first step of the
`method for making the semiconductor device shown in FIG.
`1 tirough FIG. 3.
`31G. 6 is a cross—section drawing showing a second step of
`the method for making the semiconductor device shown in
`FIG. 1 through FIG. 3.
`:1G. 7 is a plan drawing of a substrate as seen from the
`direction indicated by the arrow VII in FIG. 6.
`:1G. 8 is a cross—section drawing showing a third step ofthe
`method for making the semiconductor device shown in FIG.
`1 tirough FIG. 3.
`3IG. 9 is a cross-section drawing showing a fourth step of
`the method for making the semiconductor device shown in
`FIG. 1 through FIG. 3.
`
`
`
`4
`FIG. 10 is a cross-section drawing showing a fifth step of
`the method for making the semiconductor device shown in
`FIG. 1 through FIG. 3.
`FIG. 11 is a cross—section drawing showing a sixth step of
`the method for making the semiconductor device shown in
`FIG. 1 through FIG. 3.
`FIG. 12 is a cross—section drawing showing a seventh step
`ofthe method for making the semiconductor device shown in
`FIG. 1 through FIG. 3.
`FIG. 13 is a cross-section drawing ofa light-emitting ele-
`ment mounting member and semiconductor device using the
`same according to a second embodiment ofthe present inven-
`tion.
`
`BEST MODE FOR CARRYING OUT THE
`INVENTION
`
`invention will be
`The embodiments of the present
`described, with references to the figures. In the embodiments
`below, identical or similar elements will be assigned like
`numerals and overlapping descriptions will be omitted,
`
`First Embodiment
`
`FIG. 1 is a cross—section drawing of a light—emitting ele—
`ment mounting member according to a first embodiment of
`the present invention and a semiconductor device using the
`same. FIG. 1A is a cross-section drawing of a semiconductor
`device according to one aspect. FIG. 1B is a cross-section
`drawing of a semiconductor device according to another
`aspect, FIG. 2 is a perspective drawing of the semiconductor
`device shown in FIG. 1A. FIG. 3 is a perspective drawing of
`the semiconductor light-emitting element shown in FIG. 1A.
`As shown in FIG. 1A, FIG. 2, and FIG. 3, a semiconductor
`device 100 according to the first embodiment of the present
`invention includes: a 1ight-emitting element mounting mem-
`ber 200; and a semiconductor light-emitting element 1
`motmted on an element mounting surface 2a. The semicon-
`ductor light-emitting element 1 includes a main surface 1a
`facing the element mounting surface 2a. In this example. the
`main surface la is formed as a rectangle including a longer
`first side 11 and a shorter second side 12. A substrate 2
`includes a bottom surface 219 opposite from the element
`mounting surface 2a. A distance H from the bottom surface
`219 to the element mounting surface 2a and a length L of the
`first side 11 have a ratio H/L of at least 0.3.
`The light—emitting element mounting member 200
`includes the substrate 2 and a reflective surface Ga and is
`equipped with a reflective member 6 and a metal layer 13. The
`substrate 2 includes: the mounting surface 2a for mounting a
`semiconductor light-emitting element 1; and first and second
`conductor regions 21, 22 disposed on the element mounting
`surface 2a and connected to the semiconductor light-emitting
`element 1. The reflective surface 6a defines an inner space 6b
`which houses the semiconductor light-emitting element 1.
`The reflective member 6 is disposed on the element mounting
`surface 2a and contains metal. The metal layer 13 is disposed
`on the reflective surface 6a. The reflective surface 611 is sloped
`relative to the element mounting surface 2a so that the diam-
`eter of the inner space 619 is larger away from the element
`mounting surface 20.
`The light-emitting element 200 is further equipped with a
`bonding layer 9 that joins the element mounting surface 2a
`and the reflective member 6. The bonding layer 9 has a tem—
`perature rating of at least 300 deg C., and the bonding layer 9
`melts at a temperature of no more than 700 deg C. to bond the
`element mounting surface 2a and the reflective member 6.
`
`10
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US 7,518,155 B2
`
`5
`The substrate 2 is insulative and is formed with first and
`second through—holes 2h, 21'. The first conductor region 21 is
`disposed on the first through-hole 217, and the second conduc-
`tor region 22 is disposed on the second through—hole 21'. Also,
`as described above, in the semiconductor device, the mini-
`mum pattern width and the minimum distance between pat-
`terns for the metal film formed on the element mounting
`surface at the first and/or second conductor regions 21, 22 are
`kept within the range of at least 5 microns and less than 10
`microns. This allows flip-chip light-emitting elements andthe
`like to be mounted. A range of at least 10 microns and less
`than 50 microns is prcfcrablc. In particular, smallcr distanccs
`are preferable between patterns in the first and second corr-
`ductor regions 21, 22 as long as bad connections are avoided.
`The reason forthis is that reflection efficiency improves when
`a larger area is metallized. At less than 5 microns, bad con-
`ncctions tcnd to form.
` Electrode layers 1b and if are disposed on the main surface
`1a of the semiconductor light-emitting element 1 and are
`cormected to the first and second conductor regions 21, 22.
`The area of the main surface la is at least 1 1111112.
`
`The substrate 2 is electrically insulative and formed from a
`material with good heat conductivity. The material can be
`selected based on the usage environment. llor example, the
`material can be ceramics having as the main component alu-
`minum nitridc (AlN), silicon nitridc (Si3N4), aluminum oxide
`(A1203), boron nitride (BN), silicon carbide (SiC), or the like.
`Altematively, a material that has as the main component
`electrically insulative silicon (Si), or a composite material or
`a combination of the above can be used.
`
`The substrate 2 acts as a heat sink that dissipates heat. Thus,
`higher heat conduction is preferable, and a heat conduction
`rate of at least 140 W/m~K would be preferable, with a rate of
`at least 170 W/n1~K being more preferable. If a periodic table
`group III-V compound semiconductor light-emitting element
`or a group II-VI compound semiconductor light-emitting ele-
`mcnt is to bc uscd for thc scmiconductor light-cmitting clc-
`ment 1,
`it would be preferable for the thermal expansion
`coefficient (linear expansivity) to be at least 3.0x10’6/K and
`no more than 10x10'6/K in order to match the thermal expan-
`sion coefficient of the light-emitting element.
`Au films 3a, 3b, 3 are formed on the element mounting
`surface 2a. 'lheAu film 3 serves to improve the bond between
`the bonding layer 9 and the substrate 2. For this reason, the Au
`fihn 3 is formed from a material that improves the bond
`between the bonding layer 9 and the substrate 2. The Au film
`3 is used since, in this embodiment, nitride aluminum. a
`ceramic, is used for the substrate 2, and Au4Ge is used for
`the bonding layer 9. Ifthe material used in the bonding layer
`is changed, then it would be possible to form the Au films 3,
`3a, 3b as layers having aluminum as the main component or
`silver as the main component. The Au films 3, 3a, 3b are
`formed by plating, vapor deposition, or the like. It would also
`be possible to interpose an intermediate layer to improve the
`bond, e.g., a titanium layer or a platinum layer, between the
`Au films 3, 3a, 3b and the element mounting surface 2a.
` Examples of intermediate layers disposed between the ele-
`ment mounting surface 2a and the Au films 3, 3a, 317 include
`Ni, Ni4r, NiiP, NiiB, and NiCo, These can be formed
`by plating, vapor deposition, or the like. Ifvapor deposition is
`to be performed, materials such as Ti, V, Cr, Ni, NiCr alloy, Zr,
`Nb, Ta can be used. It would also be possible to stack plated
`layers and/or vapor deposition layers. It would be preferable
`for the thickness of the intermediate layer to be at least 0.01
`mm and no more than 5 mm, and more preferably at least 0.1
`mm and no more than 1 mm.
`
`10
`
`15
`
`20
`
`25
`
`30
`
`'55
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`6
`In this example, it would also be possible to form an inter-
`mediate layer, e.g., formed from a Ti/Pt layered film, between
`the substrate 2 and the Au films 3, 3a, 3b. The film containing
`Ti in this stacked film serves as a bonding layer to improve
`bonding with the substrate 2 and is formed so that it comes
`into contact with the upper surface of the substrate 2. The
`material for the bonding layer does not need to be titanium
`and can be, for example, vanadium (V), chrome (Cr), nickel-
`chrome alloy (NiCr), zirconium (Zr), niobium mb). tantalum
`(Ta), or a compound ofthereof.
`Also, the platinum (Pt) film in the Ti/Pt stacked fihn is a
`diffusion barrier layer and is formed on the upper surface of
`the Ti film. The material does not need to be platinum (Pt), and
`can be palladium (Pd), nickel-chrome alloy (NiCr), nickel
`(Ni), molybdenum (Mo), copper (Cu), or the like.
`The Ti/Pt stacked film and theAu films described above are
`collectively referred to as a metallized film. The metallized
`film can be formed using conventional film-forming methods
`described above. For example, vapor deposition, sputtering,
`orplating can bc uscd. Thc pattcming ofthe Ti/Pt stackcd film
`and the Au films can be performed using metal masking, dry
`etching, chemical etching, or lift—off involving photolithog—
`raphy. These methods are suitable when forming fine patterns
`restricted to less than 100 microns or less than 50 microns.
`
`It would be preferable for the thickness of the titanium (Ti)
`film in thc Ti/Pt stackcd film to bc at least 0.01 mm and no
`more than 1.0 mm, and the thickness of the platinum (Pt) film
`to be at least 0.01 mm and no more than 1.5 mm.
`The thickness of the substrate 2, i.e., the distance H from
`the bottom surface 21) to the element mounting surface 211, can
`be set up according to the dimensions of the semiconductor
`element 1, but, as an example, the distance H can be set to at
`lea st 0.3 mm and no more than 10 mm.
`
`The semiconductorlight-emitting element 1 is disposed so
`that it comes into contact with the Au films 3a, 3b. The
`scmiconductor light-cmitting clcmcnt 1 can bc formcd from a
`group II-VI compound semiconductor light-emitting element
`or a group III—V compound semiconductor light—emitting ele—
`ment. The group II elements here include Zinc (7.11) and cad-
`mium (Cd). The group III elements include boron (B), alu-
`minum (Al), gallium (Ga), and indium (In). The group V
`elements include nitrogen (N), phosphorous (P), arsenic (As),
`and antimony (Sb). The group VI elements include oxygen
`(0), sulfur (S), selenium (Se), and tellurium (Te). The semi-
`conductor light-emitting element 1 can be formed as a com-
`pound scmiconductor that is GaAs-bascd, InP-bascd, GaN-
`based, or the like.
`Through-holes 2h, 21' are formed as via holes 011 the sub-
`strate 2. The conductors used to fill the through—holes 2h. 21'
`form the first and second conductor regions 21, 22. The main
`component for the conductor (via fill) is preferably a metal
`with a high melting point, particularly tungsten (W) or
`molybdenum (Mo). It would also be possible to further
`include a transitional metal such as titanium (Ti) or a glass
`component or substrate material
`(e.g., aluminum nitride
`(AlN)). Also, the through-holes 212, 21' do not need to be filled
`with conductor if the imrer surfaces thereof are metallized by
`plating or the like.
`The surface roughness ofthe element mounting surface 211
`is preferably no more than 1 micron Ra and more preferably
`no more than 0.1 micron Ra. The flatness is preferably no
`more than 5 microns and more preferably 1 micron. If the Ra
`exceeds 1 micron or the flatness exceeds 5 microns, gaps tend
`to form between the semiconductor light-emitting element 1
`and the substrate 2 during bonding, leading to reduced cool-
`ing of the semiconductor light-emitting element. Surface
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1012
`
`
`
`US 7,518,155 B2
`
`
`
`7
`roughness Ra and the flatness are defined according to .113
`standards (JIS B0601 and 118 B0621, respectively).
`The compound semiconductors described above are
`examples of materials for the semiconductor light—emitting
`element 1 of the present invention, but it would also be pos-
`sible to stack these layers or bulks on a substrate such as a
`sapphire substrate. The light-emitting section can be at either
`he top surface or the bottom surface. In this embodiment, the
`ight—emitting layer 10 is disposed on the substrate side. Since
`he light-emitting layer 1c, which is the heat-generating sec-
`ion, is disposed closer to the substrate, heat dissipation for
`he semiconductor element can be improved.
`A metallized layer, e.g., an electrode layer and insulation
`ayer formed from silicon oxide film (SiOz) can be formed on
`he surface of the semiconductor light—emitting element 1
`disposed on the substrate 2. It would be preferable for the
`hickness of the gold (Au) serving as the electrode layer to be
`at least 0.1 microns and no more than 10 microns.
`
`The semiconductor light—emitting element 1 includes: a
`Jase unit 1e formed from sapphire or the like; a semiconduc-
`or layer 1d in contact with the base unit 1e; a light-emitting
`ayer 1c in contact with a section of the semiconductor layer
`1d: a semiconductor layer 1g in contact with the light—emit—
`ing layer 10; an electrode layer 117 in contact with the semi-
`conductor layer 1g; and an electrode layer 1]”in contact with
`he semiconductor layer 1d.
`The structure of the semiconductor light-emitting element
`1 is not restricted to what is shown in FIG. 1A. For example,
`it would also be possible to have a structure as shown in FIG.
`1B in which the electrode layer 1f, the semiconductor layer
`1d, the light—emitting layer 1c, the semiconductor layer 1g,
`and the electrode layer 1b are stacked. In this case, electrodes
`are present on both the front and back of the semiconductor
`light-emitting element 1, and the electrode layer 1b is con-
`nected by anAu bonding line 71 to the Au film 3b. In FIG. IE,
`only the first conductor region is directly bonded to the semi—
`conductor light-emitting element 1.
`As shown in FIG. 3A, of the sides that form the main
`surface 1a, the first side 11 is the long side and the second side
`12 is the short side. However, it would also be possible to have
`the first side 11 be the short side and the second side 12 be the
`long side. In this example, the main surface of the semicon—
`ductor light-emitting element is rectangular, so the long side
`corresponds to the length L along the direction of the long
`side. The first side 11 extends roughly perpendicular to the
`direction in which the light-emitting layer 10 extends. The
`second side 12 extends roughly parallel to the light—emitting
`layer 1C. Also, the first side 11 and the second side 12 can be
`roughly the same length. If the first side 11 and the second
`side 12 are roughly the same length, the first side 11 is treated
`as the long side. Furthermore, if the main surface 1a is not
`rectangular, e.g., if the corners are rounded, the long side is
`defined based on an approximation ofthe main surface 1a to
`a rectangle. Also, while this applies to other embodiments of
`the present invention, if the main surface 1a is rectangular as
`in this example,
`the opposite surface will generally be
`roughly the same shape, but this does not need to be the case.
`Also, as shown in the examples ofmain surface shapes in FIG.
`3B, the main surface can be non-rectangular. The length along
`the direction of the long side of the main surface of the
`semiconductor element of the present invention is measured
`from the outline of the image projected in a direction perpen—
`dicular to the main surface. FIG. 3B1 through FIG. 3B5 are
`examples of this, and the indicated lengths L are the lengths
`along the direction of the long side. For example, if the shape
`
`8
`is a circle or a square, the length would be the diameter or one
`of the sides, respectively. If the shape is an ellipse, the length
`of the major axis is used.
`In this example, the long—side length L of the semiconduc—
`tor light-emitting element 1 corresponds to the length of the
`first side 11. It would be preferable for the ratio H/L between
`this length and the distance H from the bottom surface 2b to
`the element mounting surface 2a to be at lea st 0.3. It would be
`more preferable for the ratio H/L to be at least 4.5 and no more
`than 1 .5. It would be even more preferable for the ratio H/L to
`be at least 0.5 and no more than 1.25.
`
`The reflective member 6 is disposed so that it surrounds the
`semiconductor light—emitting element 1. A material having a
`thermal coeflicient close to the aluminum nitride forming the
`substrate 2 is used. For example, the reflective m