111111
`
`1111111111111111111111111111111111111111111111111111111111111111111111111111
`US 20060198162Al
`
`(19) United States
`c12) Patent Application Publication
`Ishidu et al.
`
`(10) Pub. No.: US 2006/0198162 A1
`Sep. 7, 2006
`(43) Pub. Date:
`
`(54) LIGHT EMITTING ELEMENT MOUNTING
`MEMBER, AND SEMICONDUCTOR DEVICE
`USING THE SAME
`
`(75)
`
`Inventors: Sadamu Ishidu, Hyogo (JP); Kenjiro
`Higaki, Hyogo (JP); Takashi Ishii,
`Hyogo (JP); Yasushi Tsuzuki, Hyogo
`(JP)
`
`Correspondence Address:
`DARBY & DARBY P.C.
`P. 0. BOX 5257
`NEW YORK, NY 10150-5257 (US)
`
`(73)
`
`Assignee: Sumitomo Electric Industries,
`Osaka (JP)
`
`Ltd.,
`
`(21)
`
`Appl. No.:
`
`10/546,777
`
`(22)
`
`PCT Filed:
`
`Mar. 15, 2004
`
`(86)
`
`PCTNo.:
`
`PCT I JP04/03443
`
`(30)
`
`Foreign Application Priority Data
`
`Mar. 18, 2003
`
`(JP) ...................................... 2003-074036
`
`Publication Classification
`
`(51)
`
`Int. Cl.
`(2006.01)
`F21V 7104
`(2006.01)
`HOJJ 1162
`(2006.01)
`HOJL 33100
`(52) U.S. Cl. ............................ 362/623; 313/498; 257/79;
`257/98
`
`(57)
`ABSTRACT
`The object of the present invention is to provide a light(cid:173)
`emitting element mounting member and a semiconductor
`device using the same that is easy to process and that allows
`adequate heat dissipation.
`
`A light-emitting element mounting member 200 includes: a
`substrate 2 including an element mounting surface 2a
`mounting a semiconductor light-emitting element 1 and first
`and second conductive regions 21, 22 disposed on the
`element mounting surface 2a and connected to the semicon(cid:173)
`ductor light-emitting element 1; a reflective member 6
`including a reflective surface 6a defining an internal space
`6b for housing the semiconductor light-emitting element 1
`and containing a metal disposed on the element mounting
`surface 1a; and a metal layer 13 disposed on the reflective
`surface 6a. The reflective surface 6a is sloped relative to the
`element mounting surface 2a so that a diameter of the
`internal space 6b is greater away from the element mounting
`surface 2a.
`
`100
`
`j
`
`6
`7
`9
`
`}
`
`3
`
`3a
`
`3
`
`200
`
`6
`
`7
`9
`
`2
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`Patent Application Publication Sep. 7, 2006 Sheet 1 of 5
`
`US 2006/0198162 A1
`
`FIG. lA
`
`13
`
`6
`
`100
`
`I
`
`13
`
`~51
`
`~=~~~~~~~~~~~~~~ii~~~~~~~~~~~
`
`2
`
`.3
`
`3a
`
`3
`
`200
`
`FIG. lB
`
`13
`
`100
`
`j
`
`13
`
`3a
`
`200
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`Patent Application Publication Sep. 7, 2006 Sheet 2 of 5
`
`US 2006/0198162 A1
`
`FIG. 2
`
`100
`
`I
`
`\ 200
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`Patent Application Publication Sep. 7, 2006 Sheet 3 of 5
`
`US 2006/0198162 A1
`
`FIG. 3A
`
`1
`
`\
`
`la
`
`11
`
`lc
`1g
`lb
`
`12
`
`1e
`
`1d
`
`1f
`
`FIG. 3Bl
`
`FIG. 3B2
`
`FIG. 3B3
`
`~--L---
`
`FIG. 3B4
`
`FIG. 3B5
`
`~ L ------+-1
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`Patent Application Publication Sep. 7, 2006 Sheet 4 of 5
`
`US 2006/0198162 A1
`
`FIG. 4
`
`Process
`
`Plate, vapor deposition
`
`203
`
`Bond
`
`206
`
`Plate, vapor deposition
`
`207
`
`Mount semiconductor
`light·emitting element
`
`208
`
`FIG. 5
`
`2
`
`FIG. 6
`
`2a
`
`2h
`
`2i
`
`2b
`
`21
`
`22
`
`3
`
`3a 3b
`
`3
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`Patent Application Publication Sep. 7, 2006 Sheet 5 of 5
`
`US 2006/0198162 A1
`
`FIG. 7
`
`2a
`
`3
`}
`I
`
`ll.lrJ
`
`3a 3b
`
`FIG. 8
`
`6~
`
`FIG. 9
`
`6a
`
`6a
`
`6~ 6b I ~6
`
`FIG. 10
`
`6
`
`7
`
`6a
`
`6a
`
`6b
`
`I
`
`6
`
`7
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`US 2006/0198162 AI
`
`Sep. 7,2006
`
`1
`
`LIGHT EMITTING ELEMENT MOUNTING
`MEMBER, AND SEMICONDUCTOR DEVICE
`USING THE SAME
`
`TECHNICAL FIELD
`
`[0001] The present invention relates to a light-emitting
`element mounting member and a semiconductor device
`using the same. More specifically, the present invention
`relates to a light-emitting mounting element for mounting a
`light-emitting diode, a semiconductor laser, or the like and
`a semiconductor device using the same.
`
`BACKGROUND ART
`
`[0002] An example of a conventional member for mount(cid:173)
`ing semiconductor light-emitting elements is described in
`Japanese Laid-Open Patent Publication Number 2002-
`232017.
`
`[0003]
`In the semiconductor mounting member described
`in this publication, a substrate and a ceramic window frame
`surrounding a light-emitting element is formed from a
`ceramic having as its main component aluminum oxide,
`aluminum nitride, or the like.
`
`[0004] With the increase in output in light-emitting ele(cid:173)
`ments in recent years, there has also been an increase in heat
`generated by semiconductor light-emitting elements. When
`a ceramic having aluminum oxide as its main component
`(hereinafter referred to also as alumina) is used in the
`substrate and the window frame, adequate heat dissipation is
`not possible, leading to increased temperature.
`
`[0005] Furthermore, if aluminum nitride, which has high
`thermal conductivity, is used, the raw material is more
`expensive and harder to process than alumina. Furthermore,
`if a metallized layer is formed on the surface, a metallized
`layer having W or Mo must generally be formed first. In
`such cases, a method is used in which a metal paste having
`W or Mo as its main component is first applied to a green
`sheet and then this is fired together with the main aluminum
`nitride ceramic unit (co-fired metallizing). With this method,
`however, thermal deformation and the like take place during
`firing, making it difficult to precisely form a metallized layer
`with a fine pattern, e.g., of less than 100 microns.
`
`DISCLOSURE OF INVENTION
`
`[0006] The object of the present invention is to overcome
`the problems described above and to provide a light-emitting
`element mounting member and semiconductor device that
`uses the same that has high thermal conductivity and that is
`easy to process.
`
`[0007] The present inventors performed various investi(cid:173)
`gations regarding light-emitting element mounting members
`that adequately dissipate heat generated by semiconductor
`light-emitting elements and that are easy to process. As a
`result, it was found that preferable characteristics can be
`obtained by using a mounting member with high thermal
`conductivity by including metal in a reflective member.
`
`[0008]
`In order to achieve the object described above, a
`light-emitting element mounting member according to the
`present invention includes: a substrate including an element
`mounting surface mounting a semiconductor light-emitting
`element and first and second conductive regions disposed on
`
`the element mounting surface and connected to the semi(cid:173)
`conductor light-emitting element; a reflective member
`including a reflective surface defining an internal space for
`housing the semiconductor light-emitting element and con(cid:173)
`taining a metal disposed on the element mounting surface;
`and a metal layer disposed on the reflective surface. The
`reflective surface is sloped relative to the element mounting
`surface so that a diameter of the internal space is greater
`away from the element mounting surface.
`
`[0009]
`In a light-emitting element mounting member
`formed in this manner, the substrate serves as a high thermal
`conductivity member, thus allowing adequate dissipation of
`the heat generated by the semiconductor light-emitting ele(cid:173)
`ment. Furthermore, since the reflective member contains
`metal, processing is made easier compared to a structure in
`which the reflective member is formed from ceramic. This
`makes it possible to provide a light-emitting element mount(cid:173)
`ing member that is easier to process.
`
`[0010] Also, since the reflective member contains metal,
`the bond with the metal layer disposed on the reflective
`surface of the reflective member improves. As a result, a
`light-emitting element mounting member that is easy to
`produce can be provided.
`
`[0011]
`It would be preferable for the light-emitting ele(cid:173)
`ment mounting member to further include a bonding layer
`bonding the element mounting surface and the reflective
`member. A heat resistance temperature of the bonding layer
`is at least 300 deg C. The bonding layer melts at a tempera(cid:173)
`ture of no more than 700 deg C. and bonds the element
`mounting surface and the reflective member. In this case,
`since the bonding layer has a heat resistance temperature of
`at least 300 deg C., the bonding layer can prevent peeling of
`the substrate and the reflective member and is practical even
`if the temperature when the semiconductor light-emitting
`element is mounted on the light-emitting element mounting
`member is 250-300 deg C. Thus, a highly reliable light(cid:173)
`emitting element mounting member can be obtained. Fur(cid:173)
`thermore, since the bonding temperature is no more than 700
`deg C., if metallized patterns formed from Au, Ag or AI or
`the like are formed on the surface of the substrate, degra(cid:173)
`dation of the metallized patterns can be prevented. Since the
`heat resistance temperature of these metallized patterns are
`generally no more than 700 deg C., the bonding can be
`performed without degradation of the metallized patterns by
`bonding at a temperature of no more than 700 deg C.
`
`[0012] More preferably, the substrate is insulative, first
`and second through-holes are formed on the substrate, the
`first conductor region is formed at the first through-hole, and
`the second conductor region is formed at the second
`through-hole. In this case, since the first and second con(cid:173)
`ductor regions extend from the surface of the substrate on
`which the element mounting surface is formed to the oppo(cid:173)
`site surface, electrical power can be supplied to the first and
`the second conductor regions from the opposite surface.
`More preferably, a minimum formation dimension of metal
`film patterns of the first and/or the second conductor region
`is at least 5 microns and less than 100 microns. As a result,
`light-emitting elements can be mounted using the flip-chip
`method. More preferably, the dimension is less than 50
`microns. The minimum formation dimension of patterns
`here refers to the minimum widths, minimum distances
`between patterns, and the like in the metallized patterns.
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`US 2006/0198162 AI
`
`Sep. 7,2006
`
`2
`
`[0013] A semiconductor device according to the present
`invention includes a light-emitting element mounting mem(cid:173)
`ber as described in any of the above; and a semiconductor
`light-emitting element mounted on the element mounting
`surface. The semiconductor light-emitting element includes
`a main surface facing the element mounting surface and the
`substrate includes a bottom surface positioned opposite from
`the element mounting surface. A ratio H/L between a dis(cid:173)
`tance H from the bottom surface to the element mounting
`surface and a distance L along a direction of a long side of
`the main surface of the semiconductor light-emitting ele(cid:173)
`ment is at least 0.3.
`
`[0014]
`In this case, since the ratio H/L between the long(cid:173)
`side length L and the distance H from the bottom surface to
`the element mounting surface is optimized, a semiconductor
`device with high heat dissipation can be obtained. If the ratio
`H/L between the long-side length Land the distance H from
`the bottom surface to the element mounting surface is less
`than 0.3, the distance H from the bottom surface to the
`element mounting surface becomes too small relative to the
`long-side length L, preventing adequate heat dissipation.
`
`[0015]
`It would be preferable for an electrode to be
`disposed on the main surface side of the semiconductor
`light-emitting element and electrically connected to the first
`and/or the second conductor region. In this case, since the
`electrode is disposed on the main surface side and the
`electrode is directly connected electrically to the first and/or
`the second conductor region, the heat generated by the
`light-emission layer, which is the section of the semicon(cid:173)
`ductor light-emitting element that especially generates heat,
`is transmitted directly to the substrate by way of the elec(cid:173)
`trode. As a result, the heat generated by the light-emission
`layer is efficiently dissipated to the substrate, providing a
`light-emitting element mounting member with superior
`cooling properties. It would also be preferable for the main
`surface to have an area of at least 1 mm2
`.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`[0016] FIG. 1 shows cross-section drawings of a light(cid:173)
`emitting element according to a first embodiment of the
`present invention and a cross-section drawing of a semicon(cid:173)
`ductor device using the same. FIG. 1A is a cross-section
`drawing of a semiconductor device according to one aspect.
`FIG. 1B is a cross-section drawing of a semiconductor
`device according to another aspect.
`
`[0017] FIG. 2 is a perspective drawing of a light-emitting
`element mounting member and semiconductor device
`shown in FIG. 1.
`
`[0018] FIG. 3A is a perspective drawing of the semicon(cid:173)
`ductor light-emitting element shown in FIG. 1. FIG. 3B
`shows sample outlines shapes of a main surface of the
`element.
`
`[0019] FIG. 4 is a flowchart for the purpose of describing
`a method for making the semiconductor device shown in
`FIG. 1.
`
`[0020] FIG. 5 is a cross-section drawing showing a first
`step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0021] FIG. 6 is a cross-section drawing showing a sec(cid:173)
`ond step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0022] FIG. 7 is a plan drawing of a substrate as seen from
`the direction indicated by the arrow VII in FIG. 6.
`
`[0023] FIG. 8 is a cross-section drawing showing a third
`step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0024] FIG. 9 is a cross-section drawing showing a fourth
`step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0025] FIG. 10 is a cross-section drawing showing a fifth
`step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0026] FIG. 11 is a cross-section drawing showing a sixth
`step of the method for making the semiconductor device
`shown in FIG. 1 through FIG. 3.
`
`[0027] FIG. 12 is a cross-section drawing showing a
`seventh step of the method for making the semiconductor
`device shown in FIG. 1 through FIG. 3.
`
`[0028] FIG. 13 is a cross-section drawing of a light(cid:173)
`emitting element mounting member and semiconductor
`device using the same according to a second embodiment of
`the present invention.
`
`BEST MODE FOR CARRYING OUT THE
`INVENTION
`
`[0029] The embodiments of the present invention will be
`described, with references to the figures. In the embodiments
`below, identical or similar elements will be assigned like
`numerals and overlapping descriptions will be omitted.
`
`First Embodiment
`
`[0030] FIG. 1 is a cross-section drawing of a light(cid:173)
`emitting element mounting member according to a first
`embodiment of the present invention and a semiconductor
`device using the same. FIG. 1A is a cross-section drawing
`of a semiconductor device according to one aspect. FIG. 1B
`is a cross-section drawing of a semiconductor device accord(cid:173)
`ing to another aspect. FIG. 2 is a perspective drawing of the
`semiconductor device shown in FIG. 1A. FIG. 3 is a
`perspective drawing of the semiconductor light-emitting
`element shown in FIG. 1A. As shown in FIG. 1A, FIG. 2,
`and FIG. 3, a semiconductor device 100 according to the
`first embodiment of the present invention includes: a light(cid:173)
`emitting element mounting member 200; and a semiconduc(cid:173)
`tor light-emitting element 1 mounted on an element mount(cid:173)
`ing surface 2a. The semiconductor light-emitting element 1
`includes a main surface 1a facing the element mounting
`surface 2a. In this example, the main surface 1a is formed
`as a rectangle including a longer first side 11 and a shorter
`second side 12. A substrate 2 includes a bottom surface 2b
`opposite from the element mounting surface 2a. A distance
`H from the bottom surface 2b to the element mounting
`surface 2a and a length L of the first side 11 have a ratio H/L
`of at least 0.3.
`
`[0031] The light-emitting element mounting member 200
`includes the substrate 2 and a reflective surface 6a and is
`equipped with a reflective member 6 and a metal layer 13.
`The substrate 2 includes: the mounting surface 2a for
`mounting a semiconductor light-emitting element 1; and
`first and second conductor regions 21, 22 disposed on the
`element mounting surface 2a and connected to the semicon-
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`US 2006/0198162 AI
`
`Sep. 7,2006
`
`3
`
`ductor light-emitting element 1. The reflective surface 6a
`defines an inner space 6b which houses the semiconductor
`light-emitting element 1. The reflective member 6 is dis(cid:173)
`posed on the element mounting surface 2a and contains
`metal. The metal layer 13 is disposed on the reflective
`surface 6a. The reflective surface 6a is sloped relative to the
`element mounting surface 2a so that the diameter of the
`inner space 6b is larger away from the element mounting
`surface 2a.
`
`[0032] The light-emitting element 200 is further equipped
`with a bonding layer 9 that joins the element mounting
`surface 2a and the reflective member 6. The bonding layer
`9 has a temperature rating of at least 300 deg C., and the
`bonding layer 9 melts at a temperature of no more than 700
`deg C. to bond the element mounting surface 2a and the
`reflective member 6.
`
`[0033] The substrate 2 is insulative and is formed with first
`and second through-holes 2h, 2i. The first conductor region
`21 is disposed on the first through-hole 2h, and the second
`conductor region 22 is disposed on the second through-hole
`2i. Also, as described above, in the semiconductor device,
`the minimum pattern width and the minimum distance
`between patterns for the metal film formed on the element
`mounting surface at the first and/or second conductor
`regions 21, 22 are kept within the range of at least 5 microns
`and less than 10 microns. This allows flip-chip light-emitting
`elements and the like to be mounted. A range of at least 10
`microns and less than 50 microns is preferable. In particular,
`smaller distances are preferable between patterns in the first
`and second conductor regions 21, 22 as long as bad con(cid:173)
`nections are avoided. The reason for this is that reflection
`efficiency improves when a larger area is metallized. At less
`than 5 microns, bad connections tend to form.
`
`[0034] Electrode layers 1b and if are disposed on the main
`surface 1a of the semiconductor light-emitting element 1
`and are connected to the first and second conductor regions
`21, 22. The area of the main surface 1a is at least 1 mm2
`.
`
`[0035] The substrate 2 is electrically insulative and formed
`from a material with good heat conductivity. The material
`can be selected based on the usage environment. For
`example, the material can be ceramics having as the main
`component aluminum nitride (AlN), silicon nitride (Si3 N4 ),
`aluminum oxide (Al2 0 3 ), boron nitride (BN), silicon carbide
`(SiC), or the like. Alternatively, a material that has as the
`main component electrically insulative silicon (Si), or a
`composite material or a combination of the above can be
`used.
`
`[0036] The substrate 2 acts as a heat sink that dissipates
`heat. Thus, higher heat conduction is preferable, and a heat
`conduction rate of at least 140 W/m·K would be preferable,
`with a rate of at least 170 W/m-K being more preferable. If
`a periodic table group III-V compound semiconductor light(cid:173)
`emitting element or a group II-VI compound semiconductor
`light-emitting element is to be used for the semiconductor
`light-emitting element 1, it would be preferable for the
`thermal expansion coefficient (linear expansivity) to be at
`least 3.0x10- 6/K and no more than 10x10- 6/K in order to
`match the thermal expansion coefficient of the light-emitting
`element.
`
`[0037] Au films 3a, 3b, 3 are formed on the element
`mounting surface 2a. The Au film 3 serves to improve the
`
`bond between the bonding layer 9 and the substrate 2. For
`this reason, the Au film 3 is formed from a material that
`improves the bond between the bonding layer 9 and the
`substrate 2. The Au film 3 is used since, in this embodiment,
`nitride aluminum, a ceramic, is used for the substrate 2, and
`Au---Ge is used for the bonding layer 9. If the material used
`in the bonding layer is changed, then it would be possible to
`form the Au films 3, 3a, 3b as layers having aluminum as the
`main component or silver as the main component. The Au
`films 3, 3a, 3b are formed by plating, vapor deposition, or
`the like. It would also be possible to interpose an interme(cid:173)
`diate layer to improve the bond, e.g., a titanium layer or a
`platinum layer, between the Au films 3, 3a, 3b and the
`element mounting surface 2a.
`[0038] Examples of intermediate layers disposed between
`the element mounting surface 2a and the Au films 3, 3a, 3b
`include Ni, Ni-Cr, Ni-P, Ni-B, and NiCo. These can be
`formed by plating, vapor deposition, or the like. If vapor
`deposition is to be performed, materials such as Ti, V, Cr, Ni,
`NiCr alloy, Zr, Nb, Ta can be used. It would also be possible
`to stack plated layers and/or vapor deposition layers. It
`would be preferable for the thickness of the intermediate
`layer to be at least 0.01 mm and no more than 5 mm, and
`more preferably at least 0.1 mm and no more than 1 mm.
`In this example, it would also be possible to form
`[0039]
`an intermediate layer, e.g., formed from a Ti/Pt layered film,
`between the substrate 2 and the Au films 3, 3a, 3b. The film
`containing Ti in this stacked film serves as a bonding layer
`to improve bonding with the substrate 2 and is formed so
`that it comes into contact with the upper surface of the
`substrate 2. The material for the bonding layer does not need
`to be titanium and can be, for example, vanadium (V),
`chrome (Cr), nickel-chrome alloy (NiCr), zirconium (Zr),
`niobium (Nb ), tantalum (Ta), or a compound of thereof.
`[0040] Also, the platinum (Pt) film in the Ti/Pt stacked
`film is a diffusion barrier layer and is formed on the upper
`surface of the Ti film. The material does not need to be
`platinum (Pt), and can be palladium (Pd), nickel-chrome
`alloy (NiCr), nickel (Ni), molybdenum (Mo), copper (Cu),
`or the like.
`[0041] The Ti/Pt stacked film and the Au films described
`above are collectively referred to as a metallized film. The
`metallized film can be formed using conventional film(cid:173)
`forming methods described above. For example, vapor
`deposition, sputtering, or plating can be used. The patterning
`of the Ti/Pt stacked film and the Au films can be performed
`using metal masking, dry etching, chemical etching, or
`lift-off involving photolithography. These methods are suit(cid:173)
`able when forming fine patterns restricted to less than 100
`microns or less than 50 microns.
`It would be preferable for the thickness of the
`[0042]
`titanium (Ti) film in the Ti/Pt stacked film to be at least 0.01
`mm and no more than 1.0 mm, and the thickness of the
`platinum (Pt) film to be at least 0.01 mm and no more than
`1.5 mm.
`[0043] The thickness of the substrate 2, i.e., the distance H
`from the bottom surface 2b to the element mounting surface
`2a, can be set up according to the dimensions of the
`semiconductor element 1, but, as an example, the distance H
`can be set to at least 0.3 mm and no more than 10 mm.
`[0044] The semiconductor light-emitting element 1 is dis(cid:173)
`posed so that it comes into contact with the Au films 3a, 3b.
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`US 2006/0198162 AI
`
`Sep. 7,2006
`
`4
`
`The semiconductor light-emitting element 1 can be formed
`from a group II-VI compound semiconductor light-emitting
`element or a group III-V compound semiconductor light(cid:173)
`emitting element. The group II elements here include zinc
`(Zn) and cadmium (Cd). The group III elements include
`boron (B), aluminum (AI), gallium (Ga), and indium (In).
`The group V elements include nitrogen (N), phosphorous
`(P), arsenic (As), and antimony (Sb). The group VI elements
`include oxygen (0), sulfur (S), selenium (Se), and tellurium
`(Te). The semiconductor light-emitting element 1 can be
`formed as a compound semiconductor that is GaAs-based,
`InP-based, GaN-based, or the like.
`
`[0045] Through-holes 2h, 2i are formed as via holes on the
`substrate 2. The conductors used to fill the through-holes 2h,
`2i form the first and second conductor regions 21, 22. The
`main component for the conductor (via fill) is preferably a
`metal with a high melting point, particularly tungsten (W) or
`molybdenum (Mo ). It would also be possible to further
`include a transitional metal such as titanium (Ti) or a glass
`component or substrate material (e.g., aluminum nitride
`(AIN)). Also, the through-holes 2h, 2i do not need to be filled
`with conductor if the inner surfaces thereof are metallized by
`plating or the like.
`
`[0046] The surface roughness of the element mounting
`surface 2a is preferably no more than 1 micron Ra and more
`preferably no more than 0.1 micron Ra. The flatness is
`preferably no more than 5 microns and more preferably 1
`micron. If the Ra exceeds 1 micron or the flatness exceeds
`5 microns, gaps tend to form between the semiconductor
`light-emitting element 1 and the substrate 2 during bonding,
`leading to reduced cooling of the semiconductor light(cid:173)
`emitting element. Surface roughness Ra and the flatness are
`defined according to JIS standards (JIS B0601 and JIS
`B0621, respectively).
`
`[0047] The compound semiconductors described above
`are examples of materials for the semiconductor light(cid:173)
`emitting element 1 of the present invention, but it would also
`be possible to stack these layers or bulks on a substrate such
`as a sapphire substrate. The light-emitting section can be at
`either the top surface or the bottom surface. In this embodi(cid:173)
`ment, the light-emitting layer 1c is disposed on the substrate
`side. Since the light-emitting layer 1c, which is the heat(cid:173)
`generating section, is disposed closer to the substrate, heat
`dissipation for the semiconductor element can be improved.
`
`[0048] A metallized layer, e.g., an electrode layer and
`insulation layer formed from silicon oxide film (Si02 ) can
`be formed on the surface of the semiconductor light-emitting
`element 1 disposed on the substrate 2. It would be preferable
`for the thickness of the gold (Au) serving as the electrode
`layer to be at least 0.1 microns and no more than 10 microns.
`
`light-emitting element 1
`[0049] The semiconductor
`includes: a base unit 1e formed from sapphire or the like; a
`semiconductor layer 1d in contact with the base unit 1e; a
`light-emitting layer 1c in contact with a section of the
`semiconductor layer 1d; a semiconductor layer 1g in contact
`with the light-emitting layer 1c; an electrode layer 1b in
`contact with the semiconductor layer 1g; and an electrode
`layer 1f in contact with the semiconductor layer 1d.
`[0050] The structure of the semiconductor light-emitting
`element 1 is not restricted to what is shown in FIG. 1A. For
`example, it would also be possible to have a structure as
`
`shown in FIG. 1B in which the electrode layer 1/, the
`semiconductor layer 1d, the light-emitting layer 1c, the
`semiconductor layer 1g, and the electrode layer 1b are
`stacked. In this case, electrodes are present on both the front
`and back of the semiconductor light-emitting element 1, and
`the electrode layer 1b is connected by an Au bonding line 71
`to the Au film 3b. In FIG. 1B, only the first conductor region
`is directly bonded to the semiconductor light-emitting ele(cid:173)
`ment 1.
`
`[0051] As shown in FIG. 3A, of the sides that form the
`main surface 1a, the first side 11 is the long side and the
`second side 12 is the short side. However, it would also be
`possible to have the first side 11 be the short side and the
`second side 12 be the long side. In this example, the main
`surface of the semiconductor light-emitting element is rect(cid:173)
`angular, so the long side corresponds to the length L along
`the direction of the long side. The first side 11 extends
`roughly perpendicular to the direction in which the light(cid:173)
`emitting layer 1c extends. The second side 12 extends
`roughly parallel to the light-emitting layer 1c. Also, the first
`side 11 and the second side 12 can be roughly the same
`length. If the first side 11 and the second side 12 are roughly
`the same length, the first side 11 is treated as the long side.
`Furthermore, if the main surface 1a is not rectangular, e.g.,
`if the corners are rounded, the long side is defined based on
`an approximation of the main surface 1a to a rectangle. Also,
`while this applies to other embodiments of the present
`invention, if the main surface 1a is rectangular as in this
`example, the opposite surface will generally be roughly the
`same shape, but this does not need to be the case. Also, as
`shown in the examples of main surface shapes in FIG. 3B,
`the main surface can be non-rectangular. The length along
`the direction of the long side of the main surface of the
`semiconductor element of the present invention is measured
`from the outline of the image projected in a direction
`perpendicular to the main surface. FIG. 3B1 through FIG.
`3B5 are examples of this, and the indicated lengths L are the
`lengths along the direction of the long side. For example, if
`the shape is a circle or a square, the length would be the
`diameter or one of the sides, respectively. If the shape is an
`ellipse, the length of the major axis is used.
`
`In this example, the long-side length L of the
`[0052]
`semiconductor light-emitting element 1 corresponds to the
`length of the first side 11. It would be preferable for the ratio
`H/L between this length and the distance H from the bottom
`surface 2b to the element mounting surface 2a to be at least
`0.3. It would be more preferable for the ratio H/L to be at
`least 4.5 and no more than 1.5. It would be even more
`preferable for the ratio H/L to be at least 0.5 and no more
`than 1.25.
`
`[0053] The reflective member 6 is disposed so that it
`surrounds the semiconductor light-emitting element 1. A
`material having a thermal coefficient close to the aluminum
`nitride forming the substrate 2 is used. For example, the
`reflective member can have a thermal expansion coefficient
`of at least 3x10- 6/K and no more than 7x10- 6/K. It would
`be preferable for the reflective member 6 to have a thermal
`expansion coefficient of at least 4x1 o- 6/K and no more than
`6x10- 6/K. Furthermore, it would be preferable in terms of
`ease of processing to use a metal or alloy or a metal
`composite material. More specifically, the reflective member
`6 is formed from a Ni---Co-Fe alloy, with the main
`
`EVERLIGHT ELECTRONICS CO., LTD.
`Exhibit 1010
`
`

`

`US 2006/0198162 AI
`
`Sep. 7,2006
`
`5
`
`components being Ni with a proportion of 29% by mass, Co
`with a proportion of 18% by mass, and Fe with a proportion
`of 53% by mass.
`
`[0054] The reflective surface 6a is a tapered, sloped sur(cid:173)
`face disposed on the reflective member 6. The reflective
`surface 6a forms an angle relative to the element mounting
`surface 2a preferably in the range of 30 deg to 70 deg and
`more preferably in the range of 40 deg to 60 deg. A plating
`layer 7 formed from Ni/ Au is disposed on the reflective
`member 6. This plating layer is used when an Au-based
`solder (Au-Ge) is to be used for the bonding layer 9 and
`serves to increase the bonding strength between the bonding
`layer 9 and the reflective member 6. A plating layer 7 can
`also be disposed along the entire perimeter of the reflective
`member 6.
`
`[0055] A metal layer 13 is formed to cover the surface of
`the reflective member 6. The metal layer 13 is formed by
`plating or vapor deposition and serves to let out light emitted
`from the semiconductor light-emitting element 1.
`
`[0056] The reflective surface 6a defines the inner space 6b,
`and the inner space 6b forms a cone shape. The circular cone
`shape shown in FIG. 2 is an example. However, it would
`also be possible for the inner space 6b to be formed as an
`angular cone shape such as a four-side cone or a triangular
`cone. Also, the reflective surface 6a can be formed as a
`curved surface such as a parabolic surface.
`
`[0057] Next, a method for making a semiconductor device
`100 shown in FIG.1 throu