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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________________
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`Apple Inc.,
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`Petitioner,
`
`v.
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`Qualcomm Incorporated,
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`Patent Owner.
`
`____________________
`
`Case IPR2018-1249
`
`U.S. Patent No. 7,693,002
`
`_____________________
`
`ORAL DEPOSITION OF ROBERT W. HORST, Ph.D.
`
`MARCH 20, 2019
`
`Reported by:
`
`Dana Welch, CSR, RPR, CRR
`
`Job 157424
`
`TSG Reporting - Worldwide 877-702-9580
`
`QUALCOMM EXHIBIT 2005
`Apple v. Qualcomm
`IPR2018-01249
`Page 1
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`
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`Page 2
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`March 20, 2019
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`10:02 a.m.
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`Deposition of ROBERT W. HORST, Ph.D., held
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`at the offices of Fish & Richardson P.C., One
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`Marina Park Drive, Boston, MA 02210-1878, before
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`Dana Welch, Certified Shorthand Reporter,
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`Registered Professional Reporter, Certified
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`Realtime Reporter and Notary Public of the
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`Commonwealth of Massachusetts.
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`APPEARANCES:
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`For the Petitioner:
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`FISH & RICHARDSON
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`BY: WHITNEY REICHEL, ESQ.
`
`KENNETH HOOVER, ESQ.
`
`One Marina Park Drive
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`Boston, MA 02210
`
`For the Patent Owner:
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`JONES DAY
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`BY: DAVID COCHRAN, ESQ.
`
`North Point
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`901 Lakeside Avenue
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`Cleveland, OH 44114
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` HORST
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` P R O C E E D I N G S
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` ROBERT W. HORST, Ph.D.,
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` having been first duly sworn on oath,
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`was examined and testified as follows:
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` EXAMINATION
`
` BY MR. COCHRAN:
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` Q. Good morning.
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` A. Good morning.
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` Q. Thanks for coming.
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` Can you go ahead and state your name,
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` please, full name.
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` A. Robert Horst.
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` Q. Robert Horst.
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` And you have a Ph.D., correct?
`
` A. Yes.
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` Q. I'll probably call you Dr. Horst during
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` the course of the deposition. I hope that's okay.
`
` Or sir; I'm sure that's okay with you, too.
`
` A. Yes.
`
` Q. Can you tell us what your home address is,
`
` sir?
`
` A. 1182 Glenn Avenue in San Jose, California.
`
` Q. And you understand that you're under oath
`
` this morning, right?
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` A. Yes.
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` Q. Is there any reason that you can't testify
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`Page 5
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` truthfully today?
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` A. No.
`
` Q. Great.
`
` Dr. Horst, have you been deposed before?
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` A. Yes.
`
` Q. How many times?
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` A. Not sure exactly, but it's over a dozen
`
` times.
`
` Q. Over a dozen times.
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` When was the last time you were deposed?
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` A. The last time was in another IPR last
`
` year.
`
` Q. Do you remember what that matter was?
`
` A. I could look at my CV and give you the
`
` exact numbers. I can't remember the IPR number,
`
` but it was a computer networking IPR.
`
` Q. Were you testifying on behalf of Apple in
`
` that IPR?
`
` A. No.
`
` Q. Were you engaged by Fish & Richardson in
`
` that IPR?
`
` A. No.
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` HORST
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` Q. Have you been engaged by Fish & Richardson
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`Page 6
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` previously?
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` A. Yes, I have.
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` Q. Approximately how many times have you been
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` engaged by Fish & Richardson?
`
` A. About two other times.
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` Q. And what did those matters relate to?
`
` A. They were other computer design type
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` matters, IPRs.
`
` Q. So the deposition today is going to relate
`
` to your declaration in IPR2018-01249.
`
` Is that your understanding?
`
` A. Yes.
`
` Q. Great.
`
` So I'm handing the court reporter, she's
`
` now handing to you what has previously been marked
`
` as Apple 1003.
`
` I'm going to ask you whether you recognize
`
` this document, Dr. Horst?
`
` MS. REICHEL: Do you have a copy?
`
` MR. COCHRAN: Yes, I do.
`
` A. This is my declaration related to patent
`
` 7,693,002.
`
` Q. Could you turn to page 75 of Apple 1003,
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`HORST
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`Page 7
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` Dr. Horst. Is that your signature on page 75?
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`A.
`
`Q.
`
`Yes, it is.
`
`Thank you.
`
`Did you write this document, Dr. Horst?
`
`A.
`
`Yes. I wrote this document in conjunction
`
` with counsel.
`
`Q.
`
`Can you explain the process you went
`
` through from the beginning of when you started
`
` writing the document until its final form?
`
`MS. REICHEL: I'll just caution the
`
` witness, the parties do have an agreement not to
`
` take discovery on the drafting process or the
`
` substance of communications with counsel.
`
`If you have any questions about what
`
` you're able to reveal and not reveal in response to
`
` counsel's question, please let me know. But you
`
` can go ahead and respond with that caveat.
`
`A.
`
`I don't know what I can reveal and not
`
` reveal about those conversations with counsel.
`
`Q.
`
`How long did it take you to create the
`
` document?
`
`A.
`
`I started on this case in early 2018, and
`
` so the document has been in process since then,
`
` including all the stages of finding and reviewing
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` HORST
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` prior art and doing figures and actually drafting
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` the document.
`
` Q. Inside your declaration, there are several
`
` drawn figures that you created; is that right?
`
` A. Yes.
`
` Q. Approximately how much time have you spent
`
` on this matter, Dr. Horst?
`
` A. I haven't separately accounted for my time
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` on this matter versus another IPR I'm working for,
`
` so I don't know what the split would be.
`
` Q. Can you approximate?
`
` A. It would be hard to break it down. I
`
` really wouldn't know.
`
` Q. 100 hours?
`
` MS. REICHEL: Objection, calls for
`
` speculation.
`
` A. I really don't know if it would be over or
`
` under 100 hours.
`
` Q. Are there any mistakes in your
`
` declaration?
`
` A. There's nothing that I have found at this
`
` point that would be a mistake, but it's possible
`
` that I've overlooked something.
`
` Q. Are there any opinions set forth in the
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` HORST
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` declaration that you'd like to change?
`
` A. No. There are no opinions that I would
`
` change at this time.
`
` MR. COCHRAN: By the way, I'm not throwing
`
` those at you. It's the only way I can get it to
`
` you.
`
` MS. REICHEL: The numbers on the bottom of
`
` these, may I just ask were those on the original
`
` documents or were they appended in preparation for
`
` the deposition to be exhibit numbers or what was
`
` the source of those?
`
` MR. COCHRAN: That's a good question. I
`
` believe those were put on there by Fish &
`
` Richardson when the IPRs were filed.
`
` MS. REICHEL: And you're not planning to
`
` use a different exhibit number consistent --
`
` MR. COCHRAN: I'm not. I'm going to use
`
` your numbers.
`
` Q. So the court reporter has handed you a
`
` document that is marked Apple 1004.
`
` Do you recognize this document, Dr. Horst?
`
` A. Yes. This is a version of my CV that was
`
` submitted along with my declaration.
`
` Q. Is this a current copy of your CV?
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` A. I currently have a more up-to-date version
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` of the CV that has a few more items.
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` Q. Can you take a look at pages 3, 4, 5 of
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` the CV, Dr. Horst. This appears to include a list
`
` of patents which list you as an inventor; is that
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` correct?
`
` A. That's correct.
`
` Q. Is this list current?
`
` A. No. There are currently four more patents
`
` that have issued since I produced this document.
`
` Q. Do any of these patents relate to the
`
` subject matter of the '002 patent?
`
` MS. REICHEL: Objection to form.
`
` A. There are several of these patents that
`
` relate to memory design and circuit design, and
`
` I've called those out in my expert report.
`
` Q. Can you take a look at page 6 of the CV.
`
` This appears to be a list of publications that name
`
` you as an author, starting on page 6, going through
`
` page 8.
`
` Do you see that?
`
` A. Yes.
`
` Q. And is this list current?
`
` A. Yes. This list is current. I have no new
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` publications since this version of the CV.
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` Q. Thank you, sir.
`
` The court reporter has now handed you a
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` document that's been marked Apple 1001.
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` Do you recognize this document, Dr. Horst?
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` A. Yes. This is the Lin patent, the
`
` 7,693,002 patent which is the subject of this IPR.
`
` Q. So for purposes of the deposition today,
`
` I'm going to generally refer to this as the '002
`
` patent.
`
` Is that okay with you?
`
` A. Yes.
`
` Q. That's how we refer to these.
`
` In connection with the preparation of your
`
` declaration which we've previously marked as Apple
`
` 1003, did you review the '002 patent?
`
` A. Yes, I did.
`
` Q. How many times have you read it?
`
` A. I haven't counted them up, but I've read
`
` it many times.
`
` Q. Did you review the entire document?
`
` A. Yes. I reviewed the entire document.
`
` Q. Approximately how long would you say
`
` you've spent studying the '002 patent, Dr. Horst?
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`A.
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`I can't really estimate that. I've always
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` done it in conjunction with reviewing other
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` materials.
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`Q.
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`Can you turn to Figure 1 of Apple 1001.
`
`Figure 1 is a block diagram of a wordline
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` driver system labeled 100, correct?
`
`A.
`
`Q.
`
`Yes.
`
`And in Figure 1, there is a 6-bit memory
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` address specifying one of 64 wordlines in a memory
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` array; is that right?
`
`A.
`
`The 6-bit address will select one of 64
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` wordlines of the array.
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`Q.
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`And Figure 1 includes a 2 to 4-bit decoder
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` marked 112, and a 4 to 16-bit address decoder
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` marked 108; is that correct?
`
`A.
`
`Q.
`
`That's correct.
`
`What is the function of the 2 to 4-bit
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` memory address decoder that's labeled 112?
`
`A.
`
`The 2 to 4 decoder is part of the
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` conditional clock generator that's used to select
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` one of the clocks to apply to the wordline circuit.
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`Q.
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`In Figure 1, the first portion of the
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` memory address includes bits 0 and 1; is that
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` correct?
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` A. By first logic, are you referring to the
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` claims, the way it uses first logic?
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` Q. I don't think I said first logic.
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` I said in Figure 1, the first portion of
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` the memory address is bits 0 and 1; is that
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` correct?
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` A. Two bits of the address are bits 0 and 1;
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` whether you call that first or last depends on the
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` way the address is specified.
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` Q. And the 2 to 4-bit decoder that's labeled
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` 112 decodes those two address bits and provides a
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` decoded portion to the conditional clock generator
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` that's labeled 110; is that correct?
`
` A. The decoded outputs are used by the
`
` conditional clock generator.
`
` Q. What is the function of the conditional
`
` clock generator that's labeled 110 in Figure 1?
`
` A. The conditional clock generator is used to
`
` select one wordline out of a group of wordlines,
`
` and the group has been selected by the other bits
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` of the address through the 4 to 16 decoder.
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` Q. And how does it do that?
`
` A. I don't understand the question.
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` Q. How does it function to do that?
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` A. I'm still not sure what you mean by "do
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` that."
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` Q. Well, what is the structure of the
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` conditional clock generator that enables it to
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` select a wordline?
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` A. Figure 3 shows more details about that
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` structure.
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` Q. What are the outputs of the conditional
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` clock generator that's labeled 110 in Figure 1?
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` A. Those outputs are labeled in Figure 3 as
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` clocks 0, 1, 2, and 3.
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` Q. Are those clock signals?
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` A. Yes. Those are clock signals, each for a
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` different bitline.
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` Q. And what is the relationship between the
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` clock signals that are output from the conditional
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` clock generator and the clock input labeled 118 in
`
` Figure 1?
`
` A. The clock input 118 is conditionally
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` passed to one of those clock outputs while the
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` other ones are held low.
`
` Q. The circuit shown in Figure 1 includes
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` groups of wordline drivers that are labeled 104 and
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` 106; is that correct?
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` HORST
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` A. That's correct. Not shown are the other
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` wordline drivers. It only shows the first and last
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` group of wordline drivers.
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` Q. And each of the clock outputs labeled 124,
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` 126, 128, and 130 is coupled to each of the groups
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` of wordline drivers labeled 104 and 106; is that
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` correct?
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` A. Those clock lines at 124, 126, 128, and
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` 130 are each coupled to all of the groups of
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` wordline drivers.
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` Q. And by "all of the wordline drivers,"
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` you're referring to the blocks labeled 104 and 106;
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` is that correct?
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` MS. REICHEL: Objection to form, misstates
`
` his testimony.
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` A. I said "all of the groups." They're
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` coupled to all of the groups 104 through 106.
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` Q. What is the function of the 4 to 16
`
` decoder labeled 108 in Figure 1?
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` A. The 4 to 16 decoder selects one of those
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` 16 groups to be active.
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` Q. And in Figure 1, there are four address
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` bits labeled address 5:2 that are input to the 4 to
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` 16 decoder; is that correct?
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` A. Yes. Address bits 5 through 2 go to that
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` 4 to 16 decoder.
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` Q. So in Figure 1, there are two address bits
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` that are supplied to the 2 to 4 decoder labeled
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` 112, and there are four address bits supplied to
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` the 4 to 16 decoder labeled 108; is that correct?
`
` A. Yes. Those six address bits are shown at
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` the bottom of Figure 1.
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` Q. So in Figure 1, the address bits are
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` decoded separately by the decoder 112 and the
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` decoder 108, correct?
`
` A. This shows separate decoders doing those
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` decoding functions.
`
` Q. Can you turn to page 11 of the '002 patent
`
` that's marked as page 11, column 9 and 10 of the
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` patent.
`
` Do you see that, sir?
`
` A. Yes. I'm there.
`
` Q. Down in the bottom right-hand corner of
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` page 11 is the beginning of claim 1.
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` Do you see that?
`
` A. Yes.
`
` Q. And do you also see that claim 1 extends
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` onto page 12 in the upper left-hand portion.
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` Do you see that?
`
` A. Yes.
`
` Q. Claim 1 of the '002 patent recites first
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` logic and second logic, correct?
`
` A. Correct.
`
` Q. And according to claim 1, the first logic
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` receives a clock signal and a first portion of a
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` memory address of a memory array; is that correct?
`
` A. That's part of what it says.
`
` Q. What is the first logic as claimed in
`
` claim 1 that's shown in Figure 1 of the '002
`
` patent?
`
` MS. REICHEL: Objection to form.
`
` A. In Figure 1, the first logic includes the
`
` 2 to 4 decoder and the conditional clock generator.
`
` Q. And if you look further in claim 1 at the
`
` top left portion of page 12, claim 1 recites
`
` "second logic to decode a second portion of the
`
` memory address," correct?
`
` A. That's part of what it says.
`
` Q. And what is the second logic as claimed in
`
` claim 1, shown in Figure 1 of the '002 patent?
`
` MS. REICHEL: Objection to form.
`
` A. The second logic includes that the 4 to 16
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`HORST
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`Page 18
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` decoder, based on selecting from address bits 5
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` through 2.
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`Q.
`
`Anything else?
`
`MS. REICHEL: Objection to form.
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`A.
`
`The output of decoder 4 -- the 4 to 16
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` decoder is shown further in Figure 3, and there's
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` an inverter 302 that's logically part of that
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` selection.
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`Q.
`
`The inverter 302 that's shown in Figure 3
`
` is part of the second logic that's claimed in claim
`
` 1; is that correct?
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`MS. REICHEL: Objection to form.
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`A.
`
`The second logic acts to selectively
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` activate a particular wordline driver. So the path
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` from that second logic to the activation includes
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` that inverter. So I would include that inverter as
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` part of that second logic.
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`Q.
`
`Okay. Back to Figure 1 for a moment,
`
` Dr. Horst.
`
`The 4 to 16 decoder labeled 108 in
`
` Figure 1 does not receive the clock signal 118,
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` correct?
`
`MS. REICHEL: Objection to form.
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`A.
`
`This diagram does not show a clock signal
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` going to that decoder.
`
` Q. Is there any part of the '002 patent that
`
` would indicate that the clock signal 118 is
`
` provided to the 4 to 16 decoder labeled 108 in
`
` Figure 1?
`
` A. No. In these figures, there's no clock
`
` signal that's going to that decoder.
`
` Q. Why is that?
`
` MS. REICHEL: Objection to form,
`
` foundation.
`
` A. I don't -- there are many ways to
`
` implement a decoder. Decoders can have clocks and
`
` they can be designed without clocks. The designers
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` of the -- and inventors of the '002 evidently
`
` decided to illustrate this with a non-clock
`
` decoder.
`
` Q. In decoding the address bits that are
`
` labeled 5:2 in Figure 1, the 4 to 16-bit decoder
`
` labeled 108 does not use the clock signal labeled
`
` 118, correct?
`
` A. In the embodiment shown in Figure 1, they
`
` do not show a clock decoder.
`
` Q. The 4 to 16-bit decoder labeled 108 shown
`
` in Figure 1 of the '002 patent operates
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` independently of the clock signal labeled 118,
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` correct?
`
` A. The embodiment shown here does not use a
`
` clock and is independent of the clock signal.
`
` Q. I want to turn back to claim 1 for a
`
` minute, which is pages 11 and 12.
`
` In claim 1, the first logic receives a
`
` clock signal, correct?
`
` A. The first line of claim 1 says "the first
`
` logic" -- "a first logic to receive a clock
`
` signal."
`
` Q. Claim 1 does not recite that the second
`
` logic receives the clock signal, correct?
`
` A. The portion of the claim talking about the
`
` second logic is silent about whether the clock
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` signal goes to the second logic or not.
`
` Q. So in claim 1, the second logic does not
`
` receive the clock signal, correct?
`
` MS. REICHEL: Objection to form,
`
` mischaracterizes his testimony.
`
` A. Claim 1 is not restricted to second logic
`
` that uses the clock signal, but it could include
`
` second logic that does include the clock signal.
`
` Q. Does claim 1 recite that the second logic
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` receives the clock signal?
`
` A. It does not say that it receives a clock
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` signal, but there's no prohibition of a clock
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` signal going there. So a system that has a clock
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` signal still would have all the elements of the
`
` second logic of claim 1.
`
` Q. I'm just asking whether the claim recites
`
` the second logic receives the clock signal. Does
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` it or not?
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` MS. REICHEL: Objection to form.
`
` A. The second logic does not require a clock
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` signal.
`
` Q. Claim 1 also recites that the first logic
`
` is to apply the clock signal to a selected clock
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` output, correct?
`
` A. It actually states that "and to apply the
`
` clock signal to a selected clock output of a
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` plurality of clock signals associated with a
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` selected group of a plurality of wordline drivers
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` that are associated with the memory array."
`
` Q. Fair enough.
`
` Claim 1 of the '002 patent also recites
`
` that the second logic is to decode a second portion
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` of the memory address, correct?
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` A. That's part of what the claim says. It
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` says, "the second logic to decode a second portion
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` of the memory address, the second logic to
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` selectively activate a particular wordline driver
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` of the selected group of wordline drivers according
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` to the second portion of the memory address."
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` Q. And claim 1 does not recite that the
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` second logic uses the clock signal, correct?
`
` MS. REICHEL: Objection to form.
`
` A. As I previously answered, it -- the second
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` logic does not require a clock signal, but it
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` doesn't preclude a clock signal.
`
` Q. Could you take a look at -- still in the
`
` '002 patent, Dr. Horst, column 1, which is on
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` page 7, column 1, lines 64 to 66.
`
` You there?
`
` A. Yes, I'm there.
`
` Q. Here at column 1, lines 64 to 66 of the
`
` '002 patent, it states that "One particular
`
` advantage of a particular illustrative embodiment
`
` of the circuit is that a timing delay from a clock
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` to a particular wordline is reduced," correct?
`
` A. That's what it says.
`
` Q. Do you understand what that means?
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` A. It's talking about an advantage in
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` reducing the number of loads on a single clock
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` line.
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` Q. Why is that relevant?
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` A. The performance of a memory system
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` partially depends on how fast the wordline drivers
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` can be driven, and if there's excessive loading on
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` a clock, the rise time of the clock is slow and it
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` affects the performance.
`
` Q. One of the stated advantages of the '002
`
` patent is to reduce timing delay from a clock to a
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` particular wordline, correct?
`
` MS. REICHEL: Objection to form,
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` mischaracterizes the document.
`
` A. The statement we just read says, "One
`
` particular advantage of a particular illustrative
`
` embodiment of the circuit is that a timing delay
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` from a clock to a particular wordline is reduced."
`
` So there is one embodiment, at least,
`
` which has reduced clock loading.
`
` Q. Would you agree that that's an advantage
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` of the invention described in the '002 patent,
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` Dr. Horst?
`
` MS. REICHEL: Objection to form.
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` A. That is an advantage of any system that
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` reduces the number of clock loads, and including
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` the '002 patent and the prior art that I cited.
`
` Q. Thank you, sir.
`
` Can you move to column 1, starting line 66
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` and going over to column 2, line 2. And here the
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` '002 patent states that "Still another particular
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` advantage of a particular illustrative embodiment
`
` of the circuit device is that the clock driver's
`
` capacitance loading may also be reduced."
`
` Do you see that?
`
` A. Yes, I see that.
`
` Q. Do you understand what that means?
`
` A. Yes.
`
` Q. Can you explain to me what that means?
`
` A. The number of places a clock drives on a
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` chip increases the capacitance because the gate of
`
` the MOSFETs all have high capacitance, and so the
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` more places it drives, the more capacitance there
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` is and the more loading is on that signal.
`
` Q. Would you agree that that is an advantage
`
` of the invention described in the '002 patent?
`
` MS. REICHEL: Objection to form.
`
` A. Again, that's an advantage in the '002
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` patent and the prior art that have fewer loads per
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` clock.
`
` Q. Can you turn to column 2, lines 2 to 5 of
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` the '002 patent. And here the '002 patent states
`
` that "Another particular advantage of a particular
`
` illustrative embodiment is that use of multiple
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` conditional clocks to selectively apply a clock
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` signal reduces power consumption."
`
` Do you see that, sir?
`
` A. Yes.
`
` Q. And do you understand what that means?
`
` A. Yes.
`
` When there are fewer loads on the clock
`
` that's switching, power consumption is reduced
`
` because the power consumption largely depends on
`
` the frequency and the capacitance of the signals
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` that are changing.
`
` Q. And finally, sir, can you turn to column
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` 3, lines 13 -- which is on page 8 of the document,
`
` lines 13 to 16.
`
` And here the '002 patent states that
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` "Still another particular advantage of a particular
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` illustrative embodiment may be realized by sharing
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` a common address signal among multiple wordline
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` decoders, which reduces power consumption and
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` conserves layout area."
`
` Do you see that, sir?
`
` A. Yes.
`
` Q. And do you understand what that means?
`
` A. Can you read that section again that
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` you're referring to?
`
` Q. Column 3, lines 13 to 16.
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` MS. REICHEL: I'm also having trouble
`
` finding the text you just read at that citation.
`
` MR. COCHRAN: Well, that's because I
`
` pointed you to the wrong spot. I meant to say
`
` column 2, lines 13 to 16. I apologize for that.
`
` Q. Have you had a chance to read that,
`
` Dr. Horst?
`
` A. Yes.
`
` Q. Can you explain to me what that means?
`
` A. They are saying that there's an advantage
`
` to having only a single common address signal,
`
` which is the line that they use to select the
`
` group. By having multiple bits per group, there's
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` fewer of those signal lines, and so if there's
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` fewer lines, that would reduce power consumption
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` and conserve layout area.
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` Q. The court reporter handed you a document
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` that is labeled Apple 1005.
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` Do you recognize this?
`
` A. Yes. This is U.S. Patent 4,951,259, with
`
` the first author's name Sato, and I generally refer
`
` to this as the Sato patent.
`
` Q. That's what I'll call it too.
`
` How many times would you say you've read
`
` the Sato reference, Dr. Horst?
`
` A. I've read this many times, I couldn't
`
` estimate how many.
`
` Q. But you're very familiar with the subject
`
` matter of the Sato patent, correct?
`
` A. That's correct.
`
` Q. Can you turn to Figure 3 of Sato, the Sato
`
` patent. Figure 3 of the Sato patent depicts a
`
` circuit diagram showing an X address decoder of a
`
` static RAM, correct?
`
` A. Figure 3 of Sato is showing a wordline
`
` driver circuit. It's not necessarily restricted to
`
` a static RAM.
`
` Q. Can you turn to column 2, lines 57 to 59
`
` of the Sato reference that's on page 6. And do you
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` see there, Dr. Horst, where the Sato patent says --
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` states, "Figure 3 a circuit diagram showing the X
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` address decoder of the static RAM in accordance
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` with the third embodiment of the present
`
` invention," correct?
`
` A. It states, "Figure 2 is a circuit diagram
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` showing the X address decoder of the static RAM in
`
` accordance with the second embodiment of the
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` present invention."
`
` Q. And I'm sorry, I was talking about lines
`
` 57 to 59 state, "Figure 3, a circuit diagram
`
` showing the X address decoder of the static RAM in
`
` accordance with the third embodiment of the present
`
` invention," correct?
`
` A. That's correct, that's what it states.
`
` Q. Now, can you turn to -- I'm going to have
`
` you look at a couple of things simultaneously,
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` Dr. Horst. Just two for now, so hopefully it will
`
` work out.
`
` Can you turn to paragraph 59 of your
`
` declaration, which was marked Apple 1003.
`
` A. Yes, I'm there.
`
` Q. In paragraph 59 of your declaration, you
`
` state, "Annotated Figure 3 (below) of Sato shows
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` Sato's X address decoder including structures
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`Page 29
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` meeting the limitations of the first and second
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` logic of the '002 patent," correct?
`
`A.
`
`Q.
`
`That's correct, that's what it states.
`
`What portion of Figure 3 of Sato do you
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` contend meets the first logic limitation of the
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` '002 patent?
`
`A.
`
`In my report, I have highlighted that in
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` the annotated figure of Figure 3 on page 25, which
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` shows that the first logic is the pre-decoder that
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` receives the clock signal and generates the
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` conditional clock outputs.
`
`Q.
`
`Can you turn to paragraph 60 of your
`
` declaration.
`
`In paragraph 60, you state, "The
`
` pre-decoder PDCR meets the limitation for the first
`
` logic because it receives both a timing (clock)
`
` signal and a portion of the memory address,"
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` correct?
`
`A.
`
`Q.
`
`Yes, that's what it states.
`
`What is the timing signal that is received
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` by the pre-decoder PDCR in Figure 3 of Sato?
`
`A.
`
`That's the symbol labeled Phi subscript
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` ce. It's the Greek symbol Phi.
`
`Q.
`
`And what is the portion of the memory
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`TSG Reporting - Worldwide 877-702-9580
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` HORST
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` address received by the pre-decoder PDCR in
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` Figure 3 of Sato?
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` A. The address received is the true and
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` complemented bits of two bits of the address
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` labeled ax0 and ax1.
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` Q. The Sato patent does not provide a figure
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` showing the circuitry of the PDCR block shown in
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` Figure 3, correct?
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` A. Sato does not show a figure for that, but
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` it describes in words in sufficient detail that I
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` was able to draw a diagram of what is in that
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` block.
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` Q. The Sato patent does not include a figure
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` showing the circuitry in the PDCR block, correct?
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` A. It describes it in words instead of in a
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` picture.
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` Q. Sato refers to the four outputs Phi x0
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` through Phi x3 as "selection signals," correct?
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` A. I'd have to read through all of Sato to
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` know the different ways it might refer to those
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` signals.
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` Q. Why don't you turn to column 1, line 51 of
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` Sato.
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` At column 1, line 51, what does Sato re