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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 1
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` UNITED STATES PATENT AND TRADEMARK OFFICE
`
` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`APPLE INC.,
`
`____________________________
` )
` )
` )
` )
` ) Case IPR2018-01249
` ) Patent 7,693,002
` )
` )
` )
` )
` Patent Owner.
`____________________________)
`
` Petitioner,
`
` v.
`
`QUALCOMM INCORPORATED,
`
` DEPOSITION OF MASSOUD PEDRAM, PH.D.
`
` LOS ANGELES, CALIFORNIA
`
` THURSDAY, JUNE 6, 2019
`
`DORIEN SAITO, CSR 12568, CLR
`
`GregoryEdwards, LLC | Worldwide Court Reporting
`GregoryEdwards.com | 866-4Team GE
`
`Exhibit 1019
`Apple v. Qualcomm
`IPR2018-01249
`
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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 1
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` UNITED STATES PATENT AND TRADEMARK OFFICE
`
` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`APPLE INC.,
`
`____________________________
` )
` )
` )
` )
` ) Case IPR2018-01249
` ) Patent 7,693,002
` )
` )
` )
` )
` Patent Owner.
`____________________________)
`
` Petitioner,
`
` v.
`
`QUALCOMM INCORPORATED,
`
` DEPOSITION OF MASSOUD PEDRAM, PH.D.
`
` LOS ANGELES, CALIFORNIA
`
` THURSDAY, JUNE 6, 2019
`
`DORIEN SAITO, CSR 12568, CLR
`
`GregoryEdwards, LLC | Worldwide Court Reporting
`GregoryEdwards.com | 866-4Team GE
`
`Exhibit 1019
`Apple v. Qualcomm
`IPR2018-01249
`
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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 2
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` UNITED STATES PATENT AND TRADEMARK OFFICE
`
` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________________
` )
`APPLE INC., )
` )
` Petitioner, )
` ) Case IPR2018-01249
` v. ) Patent 7,693,002
` )
`QUALCOMM INCORPORATED, )
` )
` Patent Owner. )
`____________________________)
`
` DEPOSITION OF MASSOUD PEDRAM, taken
`
` on behalf of PETITIONER, at 555
`
` South Flower Street, 50th Floor,
`
` Los Angeles, California 90071,
`
` commencing at 10:01 a.m., Thursday,
`
` June 6, 2019, before DORIEN SAITO,
`
` CSR 12568, CLR.
`
`GregoryEdwards, LLC | Worldwide Court Reporting
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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 3
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`A P P E A R A N C E S :
`
` FOR PETITIONER:
`
` FISH & RICHARDSON
` By: WHITNEY REICHEL, Attorney at Law
` One Marina Park Drive
` Boston, Massachusetts 02210-1878
` (617) 521-7826
` wreichel@fr.com
`
` -And-
`
` FISH & RICHARDSON
` By: KENNETH J. HOOVER, Attorney at Law
` One Congress Plaza
` 111 Congress Avenue
` Suite 810
` Austin, Texas 78701
` (512) 226-8117
` hoover@fr.com
`
` FOR PATENT OWNER:
`
` JONES DAY
` By: JOSEPH M. SAUER, Attorney at Law
` North Point
` 901 Lakeside Avenue
` Cleveland, Ohio 44114-1190
` jmsauer@jonesday.com
`
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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 4
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` I N D E X
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`W I T N E S S :
`
`MASSOUD PEDRAM PAGE
`
` EXAMINATION BY MS. REICHEL 6
`
`AFTERNOON SESSION:
`
` EXAMINATION BY MS. REICHEL 80
`
`INFORMATION REQUESTED:
`
` (NONE)
`
`QUESTIONS INSTRUCTED NOT TO ANSWER:
`
` (NONE)
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`Massoud Pedram, Ph.D. - June 6, 2019
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`Page 5
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`E X H I B I T S : (Previously marked.)
`
`NUMBER DESCRIPTION PAGE
`
`Apple 1001 U.S. Patent No.:7,693,002 B2 39
`
`Apple 1005 U.S. Patent No.: 4,951,259 85
`
`Apple 1006 U.S. Patent Application 85
`
` Publication
`
` No.: US 2006/0098520 A1
`
`Apple 1007 Excerpt from VLSI Memory 85
`
` Chip Design Book by Kiyoo Itoh
`
`Apple 1008 U.S. Patent No.: 5,291,076 85
`
`Apple 1012 Sugio Patent No.: 5,602,796 80
`
`Qualcomm 2001 Declaration of Dr. Massoud 9
`
` Pedram (IPR2018-01249)
`
`Qualcomm 2003 Excerpt from VLSI Memory 54
`
` Chip Design Book by Kiyoo Itoh
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` LOS ANGELES, CALIFORNIA; THURSDAY, JUNE 6, 2019
`
` 10:01 A.M.
`
` -0o0-
`
` ***
`
` MASSOUD PEDRAM,
`
` having been duly administered an oath
`
` in accordance with CCP 2094, was
`
` examined and testified as follows:
`
` ***
`
` EXAMINATION
`
`BY MS. REICHEL:
`
` Q. Good morning, Dr. Pedram.
`
` A. Good morning.
`
` Q. Can you please state your full name for the
`
`record.
`
` A. Massoud Pedram.
`
` Q. Where are you employed?
`
` A. University of Southern California.
`
` Q. What is your home address?
`
` A. 155 North Willaman Drive, Beverly Hills,
`
`California 90211.
`
` Q. Do you understand that you're under oath
`
`here today, Dr. Pedram?
`
` A. Yes, I do.
`
` Q. Is there any reason that you cannot give
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`truthful and accurate testimony here today?
`
` A. No.
`
` Q. Do you understand that you here to discuss
`
`your declaration in IPR case No. 2018-01249 relating
`
`to U.S. Patent No. 7,693,002?
`
` A. Yes, I do.
`
` Q. If I refer to the '002 patent, will you
`
`understand that I'm referring to Patent No.
`
`7,693,002?
`
` A. Yes, ma'am.
`
` Q. Dr. Pedram, on how many occasions have you
`
`provided an expert declaration in an IPR proceeding?
`
` A. As I mentioned, three or four times.
`
` Q. On how many occasions have you provided an
`
`expert declaration in an IPR on behalf of the patent
`
`owner?
`
` A. At least three out of these four times, but
`
`I don't remember the -- the last case, as I
`
`mentioned before also. I can check it and let you
`
`know.
`
` Q. Dr. Pedram, on how many instances have you
`
`provided a declaration in an IPR on behalf of
`
`Qualcomm?
`
` A. This is the only case, the one that we are
`
`talking about here. And I -- I don't -- no.
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`There's '674 also. '674, '002 case -- or cases.
`
`These are the only times I've provided any kind of
`
`declaration in support of the patent owner where the
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`patent owner is Qualcomm.
`
` Q. To clarify, you've provided declarations in
`
`three different IPR proceedings on behalf of
`
`Qualcomm. Two relating to a patent you refer to as
`
`the '674 patent and one relating to the '002 patent
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`we're here discussing today?
`
` A. That's what I mean. I consider the whole
`
`thing to be one case. But you are correct, yes.
`
` Q. Dr. Pedram, what did you do to prepare for
`
`today's deposition?
`
` A. I had a meeting with the counsel here,
`
`Joe Sauer, and Josh Nightingale the day before
`
`yesterday, from about 10:00 a.m. to 3:30 p.m.,
`
`4:00 p.m.
`
` I also read through my own declaration. I
`
`looked at some of the prior art references. And
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`generally checked the filings that I see and are
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`relevant to this case.
`
` I have the list of material that I
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`considered in paragraph 3 of my declaration. Those
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`are generally the ones that I did take a quick look
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`at before coming to this particular session.
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` MS. REICHEL: Can we go off the record for
`
`a moment, please.
`
` (A discussion was held off the record.)
`
`BY MS. REICHEL:
`
` Q. Dr. Pedram, regarding the meeting you had
`
`on June 4th, how much of that meeting related to the
`
`'002 patent in your preparation to today's
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`deposition?
`
` A. Probably half of it.
`
` Q. Was anyone else present for any of that
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`time, other than the two people you mentioned?
`
` A. Joe was physically present. Josh called
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`in. Nobody else was present.
`
` Q. Did you speak with anyone else regarding
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`today's deposition?
`
` A. No.
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` MS. REICHEL: You should have in front of
`
`you what's been marked Qualcomm Exhibit 2001 which
`
`is entitled "Declaration of Dr. Massoud Pedram."
`
` (The aforementioned document was
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` previously marked Exhibit 2001 for
`
` identification by the reporter.)
`
`BY MS. REICHEL:
`
` Q. Do you see that?
`
` A. Yes.
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` Q. Is this a copy of the declaration that you
`
`submitted in the -1249 case?
`
` A. Yes.
`
` Q. You can turn, please, to page 67.
`
` A. Yes.
`
` Q. Is that your signature on page 67?
`
` A. That's correct, yes.
`
` Q. Are there any corrections to your
`
`declaration that you'd like to make here today?
`
` A. No.
`
` Q. Did you draft your declaration, Dr. Pedram?
`
` A. Yes. All the ideas here are mine. Exactly
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`how the document is put together is not something
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`that I did in terms of the final formatting and then
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`submission and so on. But everything here is my own
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`statements and my own views on different subject
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`matters.
`
` Q. Who prepared the various figures in your
`
`declaration, Exhibit 2001?
`
` A. Prepared actually the artwork, I didn't do
`
`it. I think the counsel, maybe they got some
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`graphics person to do it or they cut and paste. You
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`can see most of the figures here are cut and paste
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`so you can clip it and include it. But there are
`
`some that are color-coded. I believe somebody, a
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`graphic design or someone did it. I didn't do it.
`
` Q. You didn't participate in the creation of
`
`those graphics?
`
` A. Again, it was done under my suggestion and
`
`advice. I wanted certain parts to be highlighted
`
`and so on, so forth. But I didn't do it physically.
`
` Q. How much time did you spend preparing the
`
`declaration that you submitted regarding the '002
`
`patent?
`
` A. I don't know the exact number of hours I
`
`spent. Generally, so far, excluding this particular
`
`deposition and preparation for it, I believe I would
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`spend something in the order of 80 to a hundred
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`hours on both '674 and '002.
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` That includes all the reviews I've done and
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`all the discussions I have had with the counsel, and
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`all the readings of various related materials and
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`the preparation of the declaration itself.
`
` Out of these 80 to a hundred hours, I would
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`say half of it is spent on the '002 and half spent
`
`on the '674.
`
` Q. What's your understanding of what your
`
`assignment was in this case regarding the '002
`
`patent?
`
` A. Basically, to understand and evaluate the
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`obviousness combinations that have been presented by
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`Apple to the IPR. And opine on whether these
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`combinations are -- would have been obvious to a
`
`person of ordinary skill in the art. And whether
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`the combinations actually meet the limitations of
`
`the claims in question.
`
` Q. How did you go about your analysis?
`
` A. Of course, it's important to -- I sort of
`
`assign a -- a broadest reason or interpretation to
`
`the claims themselves in view and consistent with
`
`the specification.
`
` So with that understanding and
`
`understanding of the -- some of the legal matters
`
`related to obviousness and anticipation and prior
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`art, priority date, and so on, so forth, I looked at
`
`the patent itself, which I was quite familiar with.
`
` I looked at the particular combinations. I
`
`read the report that was submitted by Apple experts.
`
`I spent time analyzing that report, looking at the
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`prior art combinations, comparing it to the
`
`specification and the claim. And then opining as
`
`I've done here.
`
` Q. Anything else?
`
` A. Generally, no. I mean, not that I recall.
`
` Q. What is the priority date that you used for
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`your analysis for the '002 patent?
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` A. I used the priority date, which was the
`
`filing date of the '002 patent, which is October 10,
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`2006.
`
` Q. Dr. Pedram, do you adopt all the statements
`
`in Qualcomm Exhibit 2001, your declaration, as your
`
`own?
`
` A. Yes, I do.
`
` Q. Does paragraph 3 of your declaration
`
`comprise a complete list of materials that you
`
`reviewed in performing your analysis in this case?
`
` A. Yes, it does.
`
` Q. You have a paragraph labeled 3(l) that
`
`states, "Any other materials referenced herein." Do
`
`you see that?
`
` A. Yes.
`
` Q. Is it fair to say that you would have
`
`included any other materials not on this list that
`
`you reviewed in some way, in your declaration?
`
` A. Yes.
`
` Q. Under subheading I, you have a section
`
`labeled Professional Background.
`
` A. Yes.
`
` Q. And spans paragraphs 4 to 19?
`
` A. Yes.
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` Q. And does that discussion, combined with
`
`your CV, capture all of your relevant experience
`
`relating to the '002 patent?
`
` A. No. There is a lot of other expertise that
`
`I have both in terms of the teaching of the
`
`undergraduate and graduate course work, as well as
`
`the research projects that I have conducted for
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`various government entities or companies that have,
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`in fact, significant relevance to the memory design
`
`and synchronous systems and so on, so forth.
`
` The issues related to the '002 patent that
`
`probably could not be easily read out or seen in the
`
`combination of these paragraphs and my CV.
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` My CV includes the complete list of my
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`publications. So somebody looking at that would see
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`I have many papers on memory-related topics and
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`synchronous systems and clocking and so on, so
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`forth.
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` But my CV does not include the list of
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`projects I have done. For example, I've had 15 NSF
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`funded projects so far. The National Science
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`Foundation. I've had at least four, five big, large
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`amount of funding. Many people involved.
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` DARPA funding. I have had IARPA funding.
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`I have had SRC funding. And I do different projects
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`as part of these projects. Myself and my Ph.D.
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`students over the years have performed a lot of
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`different tasks that are not captured in the
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`combination of these paragraphs and my CV.
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` Q. Is appendix A to your declaration an
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`accurate copy of your CV?
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` A. Yes, ma'am.
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` Q. Prior to October 10, 2006, have you -- have
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`you designed or supervised the design of any memory
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`decoding scheme?
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` A. Sure. Yes, of course.
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` Q. How many?
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` A. I worked both on decoding for SRAM as well
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`as DRAM. I have papers on various kinds of coding
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`schemes that would minimize switching activity or
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`power dissipation of address buses or data buses
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`feeding into these memory type devices.
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` I teach SRAM design and DRAM design as part
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`of my -- I shouldn't say my -- but our VLSI design
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`course series at University of Southern California,
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`EE department. We have an undergraduate course
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`called 477L. We have two graduate courses, 577A and
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`577B.
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` As part of 477L, we teach basic knowledge
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`of SRAM and DRAM cells and small arrays. 577A
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`Massoud Pedram, Ph.D. - June 6, 2019
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`focuses on big arrays and more complicated topics,
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`such as all kinds of things about sensing and
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`address decoding and pre-decoding this and that, and
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`various other optimizations you could perform to
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`maximize performance or minimize power dissipation.
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` Then 577B, which is the more advanced
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`course, actually, the final projects that's
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`typically given to students is the design of a DDR-3
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`DRAM controller. So we actually do the full -- look
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`at the specification. We ask the students to write
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`the DDR-3 controller according to the specs. We do
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`the VLSI design of the DDR-3 controller. We verify
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`post sort of layouts to make sure it meets the
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`timing spec and so on, so forth.
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` So I've had significant, I must say,
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`expertise in this area that goes well beyond what a
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`person of ordinary skill in the arts know -- would
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`have known at 2006 time frame.
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` Q. Dr. Pedram, if I can ask you to please slow
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`down a bit. I think it's a bit difficult for the
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`court reporter to keep up with you.
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` A. I appreciate that. That's good -- good
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`comment, yes.
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` Q. Dr. Pedram, do you understand that my prior
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`question was limited to your experience prior to
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`October 10, 2006?
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` A. Yes, I do.
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` Q. The classes that you just described, you
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`taught those class prior to October 10, 2006?
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` A. Yes.
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` Q. You mentioned that you taught your students
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`about pre-decoding prior to October 10, 2006. What
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`were you referring to?
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` A. So basically, if you are implementing a
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`decoding of a set of address bits, you could do it
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`in one shot or you could do it in two stages.
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` And the idea of pre-decoding that I taught
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`my students was that you can take a group of bits,
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`partition them into two subgroups and do the
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`decoding of these two parts separately and combine
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`the results.
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` And that tends to create tradeoffs in terms
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`of area, performance, power dissipation that's of
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`interest to us, generally. And we had discussed it
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`and -- and I teach those things in any classes even
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`then, yes.
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` Q. Prior to October 10, 2006, how did you
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`teach your students to partition an address into two
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`subgroups?
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` A. At that point, it was more of a general
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`exercise. If I have six bits less partition into
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`group -- two groups of three bits, and then decode
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`this group of three bits, decode this other group of
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`three bits. And then, of course, you have to
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`combine them to get the final decoding. And that's
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`how it would start.
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` Q. When you say you would teach your students
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`to partition the bits, what do you mean by
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`"partition"?
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` A. Create two different group -- grouping of
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`bits. Like if you have groups 0 to 5 as the
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`complete address bit, you would do 0, 1, 2 as one
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`group and then 3, 4, 5 bits as a second group.
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` That's the partition. Partition always
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`refers to sort of creating these parts which are
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`disjoined from each other. And then when combined
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`together, they create original set.
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` Q. When you say that you taught your students
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`to create groups that were disjoined from each
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`other, what makes a group disjoined from each other?
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` A. If you look at the group of bits as two
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`sets of elements, the intersection of the two sets
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`is null.
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` Q. Sorry. What was the last word you said?
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` A. Null, n-u-l-l. It's a null set. I mean,
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`it's well-known in Venn diagram and so on.
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` Q. Prior to October 10, 2006, did you teach
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`your students to create different logic elements to
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`decode the different address bits that you had
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`taught them to partition?
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` A. Yeah. Of course. I mean, when you want to
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`decode logic depending on various performance power
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`dissipation or area constraints, you have different
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`options.
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` And one simple method is to just take every
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`bit, create two -- itself -- use itself and its
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`complement, and then run the various combinations of
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`the bit and the complements into AND gates that
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`would fire only when the right combination of the
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`input values of the complements is applied.
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` And because of the way you do it exactly,
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`one of these AND gates would fire and then you take
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`that and gate as the output and -- and use it to
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`drive whatever you need to drive.
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` And this kind of decoding really has very
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`little to do with memory design as such. I mean,
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`you could do it for all kinds of other applications.
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`Any time you want to decode address bits, you
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`typically use AND gates. Sometimes you would use OR
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`gates if it's -- the sense of the signals are active
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`low, for example, compared to active high.
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` But it's well-known that you can do these
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`things, and the logic elements of such are known
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`also.
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` Q. Would you refer to the system you just
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`described as a one-hot decoder?
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` A. Yes. So the implementation I suggested to
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`use an and gate and so on is a one-hot decoder. It
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`could have been also a 0-hot decoder. And 0-hot
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`decoder -- so one-hot decoder means you have a
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`series of output bits, exactly one of them is one.
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`The rest are 0.
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` 0-hot decoder means you have same group of
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`bits, all of them are one with the exception of one,
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`which is 0. So what I described to you was
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`implementation of either one-hot decoder or 0 hot
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`decoder.
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` Q. Prior to October 10, 2006, did you teach
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`your students about both types of decoding, the
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`one-hot and the 0-hot decoder?
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` A. Normally we do talk about it, yes. Because
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`it's -- again, always it's interesting when you
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`present one extreme, because one-hot decoder is one
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`extreme, 0-hot decoding is the other extreme. And
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`then you have all these other coding schemes in
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`between. Balance codes and weighted codes and gray
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`codes and so on, so forth, that sometimes you teach
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`to students also.
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` So -- because they're -- those are the
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`extremes that, as I see it, one-hot versus 0-hot, I
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`definitely mention those. And in between, sometimes
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`we mention that there's ways of coding also, if
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`relevant.
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` Q. Prior to October 10, 2006, when you taught
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`your students about splitting an address into two
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`different portions, did you teach them that distinct
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`logic elements could be used to decode each portion
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`of the address?
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` A. I'm not sure what that means exactly, the
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`question means distinct. So obviously you would use
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`distinct gates. So you have different gates. So
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`one logic gate is distinct from another logic gate.
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` So normally, I would consider this even, if
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`you're doing one -- one shot decoding or multistage
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`decoding, the overall module is just your decoder.
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`You have one module doing decoding. Internal to
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`that module, you see two different implementations
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`with different number of logic gates. And these
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`logic gates, of course, are separate from each
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`other. They are different logic gates. Right?
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` But that's it. I mean, the module that
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`does decoding is the same module. It's just the
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`internal implementation is one shot decoding or
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`multi stage, multiple step decoding.
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` Q. If you were teaching your students prior to
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`October 10, 2006, to take a 6-bit address and
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`partition it into 1-bit, 3 bits and 2 bits, would
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`each of those groups of bits have its own logic
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`gates?
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` A. So first of all, I want to make sure that
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`I -- I -- when I teach my students about this, I
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`don't say this is the preferred way of doing it
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`versus the other way. I'm just telling them you
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`could do it one shot, you could do it multiple step,
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`and these are the tradeoffs that exist. Right? And
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`then stop there.
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` So there is no preference stated for one or
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`the other. People might use one or the other. So
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`having said that, if somehow the partitioning was
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`1-bit, 2 bits and 3 bits as you described of the
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`group of 6 bits, then these will all be implemented
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`inside the decoding module.
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` And then in that decoding module, of
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`course, there's going to be some sharing of the
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`signals. Because, as you know, with -- when I
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`implement, for example, the 3-bit decoder, a
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`particular variable or its complement will be used
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`as input to multiple different AND gates because it
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`has to go to all the different AND gates to create
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`the combinations of all possible 01 assignments of
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`the bits. Right? So that you can decode all
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`different combinations simultaneously.
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` So there's a sharing definitely there and
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`then of the signal or the inverter that did the
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`inversion of the original signal, going to all these
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`different AND gates. So that's there.
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` But obviously, the AND gate that's used in
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`one part to deal with one combination is different
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`than the AND gate that is used in a different part
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`to deal with a different combination of AND gates.
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` Q. Are you saying you would use one set of AND
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`gates for the 1-bit, another set for the 2 bits and
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`another set for the 3 bits?
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` A. So one implementation would be precisely
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`what you said. Of course, for the 1-bit, you won't
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`use any AND gates. But yeah, for the 2 and 3 bits,
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`the AND gates that would do the decoding of the
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`2-bit group will be different from the AND gates
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`that are used for the decoding of the 3 bits.
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` But mind you, there is another
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`implementation that I also teach to my students,
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`which is, for example, using a PLA. If you use a
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`PLA to do this kind of decoding, a PLA has rows and
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`columns. And the number of rows are fixed, the
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`number of columns are fixed. These are programmable
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`logic arrays with fixed capacity. And then you
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`would program the rows and the columns so that you
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`produce the right result.
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` In that case, you have a single PLA that's
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`implementing the 3-bit decoder and the 2-bit decoder
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`and the 1-bit decoder all in one fabric. And that's
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`another implementation that we do teach our students
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`because it's not necessary to implement these 1-bit
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`decoder, 2-bit decoder, 3-bit decoder as having
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`separate disjoint gate sets. You could actually use
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`the same joint fabric, common fabric, which is a
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`programmer logic array, to implement all three of
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`them using that one fabric. And that, I do teach to
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`my students also.
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` Q. When you say "PLA," are you referring to
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`programmable logic array?
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` A. Yes, ma'am.
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` Q. So prior to October 10, 2006, your students
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`would have been familiar with using both a PLA as
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`well as using distinct logic elements for each
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`portion of the memory address; correct?
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` A. If they were tasked to separate the bits of
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`address into different groups, if they have decided
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`this is the thing they want to do and there was a
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`tradeoff. So they have to decide if that's the
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`right thing to do for the decoding task at hand or
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`no. But if they decide they want to partition it
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`into two disjointed group and decode them separately
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`and combine them -- as I said, you have to combine
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`the results -- then, sure. They know how to do it
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`using logical gates and they know how to do it using
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`PLAs, yeah.
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` Q. Are there any other approaches you would
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`have taught your students prior to October 10, 2006,
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`to decode an address that they had already decided
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`should be partitioned?
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` A. I guess the point I'd like to make here
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`are two, which is relevant. One is sometimes,
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`especially in my advanced VLSI design course, 577A,
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`we talk about other coding schemes. Right? That --
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`some of which I have developed personally in my
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`research group. Right? But also some of which are
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`also well-known.
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` And so we teach people how to implement,
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`create decoders for those types of codes; black
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`codes or gray codes or T1 codes, so on, so forth.
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`And so -- and some of these coding schemes, then,
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`are not separable in the way that you have in mind.
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`One.
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` Secondly, there is a -- I think there's
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`a -- I realize from the line of questioning now
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`there is a point that needs to be clarified. When
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`we talked -- when I taught my students to do a 6-bit
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`de- -- for example, decoding, the idea still was to
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`come up with the two to the six possible different
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`outputs. Right?
`
` So if I break it in two groups of three
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`bits, so when I decode the first group I get eight
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`outputs. I decode the second group, I get eight
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`outputs. I still have to combine these eight and
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`eight. 8 times 8 is 64. Right?
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` So there's going to be AND gates that will
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`take the output of these things and combine them
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`together to finally create the 64 outputs that I
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`want to come.
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` It's not like I'm doing a 1-bit decoder, I
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`don't care about the rest. I just do the 1-bit
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`decoding or 2-bit decoding. I never taught them
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`that.
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` I taught them that they can do the decoding
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`21
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`22
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`23
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`24
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`25
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`of a 6-bit address producing two to the six
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`different outputs, which are 64 outputs, in a single
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`stage or in multiple stages.
`
` That's what I mean by partitioning and in
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`different implementation. I did not mean -- and I
`
`did not then, a few minutes ago. And I did not
`
`teach my students that while maybe there are
`
`applications in which the 6-bit decoder really
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`doesn't have to be fully decoded and you take maybe
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`2 bits of it and use it to do something, and then
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`another 4 bits and do something else with it.
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`
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