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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`Intel Corporation
`Petitioner
`
`v.
`
`Qualcomm Incorporated
`Patent Owner
`______________________
`
`Case IPR2018-01240
`Patent 8,698,558
`______________________
`
`PATENT OWNER RESPONSE TO PETITION FOR INTER PARTES
`REVIEW PURSUANT TO 37 C.F.R. § 42.220
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`
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`

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`I. 
`II. 
`
`TABLE OF CONTENTS
`INTRODUCTION ........................................................................................... 1 
`THE ’558 PATENT AND ITS PROSECUTION HISTORY ......................... 3 
`A.  Overview of the ’558 Patent .................................................................. 3 
`B. 
`Prosecution History of the ’558 Patent ................................................. 7 
`III.  CLAIM CONSTRUCTION ............................................................................ 8 
`IV.  LEVEL OF ORDINARY SKILL IN THE ART ............................................. 9 
`V.  OVERVIEW OF THE CITED REFERENCES ............................................ 10 
`A.  Overview of Chu ................................................................................. 10 
`B.  Overview of Choi 2010 ....................................................................... 13 
`C.  Overview of Hanington ....................................................................... 16 
`D.  Overview of Myers .............................................................................. 18 
`VI.  GROUND I OF THE PETITION SHOULD BE DISMISSED BECAUSE
`IT IS BASED ON AN UNSUPPORTABLE CLAIM
`INTERPRETATION ..................................................................................... 21 
`VII.  GROUNDS I AND II OF THE PETITION SHOULD BE DISMISSED
`BECAUSE PETITIONER HAS FAILED TO DEMONSTRATE A
`MOTIVATION TO COMBINE CHU AND CHOI 2010 ............................. 31 
`VIII.  GROUND II OF THE PETITION SHOULD BE DISMISSED BECAUSE
`CHOI 2010 TEACHES AWAY FROM “SELECTIVE BOOST” AND
`PETITIONER HAS FAILED TO DEMONSTRATE A MOTIVATION
`TO COMBINE MYERS WITH CHU, CHOI 2010, AND
`HANINGTON ............................................................................................... 38 
`A. 
`Choi 2010 Requires A Constant Boosted Supply Voltage And
`Teaches Away From “Selectively Boosting” A Supply Voltage ........ 38 
`Petitioner Failed To Demonstrate A Motivation To Combine Myers
`With Chu, Choi 2010, And Hanington ................................................ 42 
`IX.  CONCLUSION .............................................................................................. 50 
`
`
`B. 
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`-i-
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`
`Pursuant to the Board’s Decision – Institution of Inter Partes Review (Paper
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`9) (“Institution Decision”), entered February 6, 2019 – Patent Owner Qualcomm,
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`Inc. (“Qualcomm” or “Patent Owner”) submits this Response in opposition to the
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`Petition for Inter Partes Review of U.S. Patent No. 8,698,558 (the “’558 Patent”)
`
`filed by Intel Corporation (“Intel” or “Petitioner”).
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`I.
`
`INTRODUCTION
`Petitioner raises two grounds challenging only two claims (claims 10 and 11)
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`of the ’558 Patent. Ground I is directed towards independent claim 10, which recites
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`in relevant part “a P-channel metal oxide semiconductor (PMOS) transistor
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`[having]… a source that receives the boosted supply voltage or the first supply
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`voltage.” A person of ordinary skill in the art (“POSA”) would understand this
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`limitation as requiring a “selective boost.” Because Petitioner makes no attempt to
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`address a selective boost, the Board should dismiss Ground I.
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`Moreover, Grounds I and II rely upon the combination of Chu, Choi 2010,
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`and Hanington, with Ground II additionally relying on Myers. Both grounds are
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`flawed because Petitioner has failed to meet its burden of establishing a motivation
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`to combine Chu, a reference striving to increase the efficiency of a power amplifier,
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`with Choi 2010, a reference striving to prevent the degradation of output power at
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`the cost of efficiency. The prior art is silent regarding how to combine Chu and Choi
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`2010 in a manner that achieves the objectives of both. A POSA therefore would not
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`-1-
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`

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`be motivated to combine these disparate teachings, and Petitioner has failed to meet
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`its burden under both grounds.
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`Petitioner additionally fails to meet its burden of establishing a motivation to
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`combine Chu, Choi 2010, and Hanington with Myers. Choi 2010 is premised on
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`building a circuit that requires a constant boosted voltage supply to its linear
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`amplifier. Petitioner, recognizing that Chu, Choi 2010, and Hanington fail to
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`disclose anything relating to a selective boost, relies on Myers to disclose these
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`features in dependent claim 11. Choi 2010, however, teaches away from using
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`multiple voltage sources because the entire premise of Choi 2010 is to use a constant
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`boosted supply voltage in order to achieve its objective of preventing the degradation
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`of output power. And even if the Board were to find that Choi 2010 does not rise to
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`the level of teaching away, a POSA would not be motivated to modify Choi 2010
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`with Myers because doing so would undercut the benefits Choi 2010 achieves.
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`Furthermore, Myers does not disclose a linear envelope amplifier and relates only to
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`an older power-tracking paradigm that differs significantly from Chu and Choi 2010.
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`Accordingly, a POSA would not be motivated to combine Myers with Chu, Choi
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`2010, and Hanington.
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`For at least these reasons, the Board should confirm the validity of claims 10
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`and 11 of the ’558 Patent.
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`-2-
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`II. THE ’558 PATENT AND ITS PROSECUTION HISTORY
`A. Overview of the ’558 Patent
`The ’558 Patent describes and claims inventions directed to managing the
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`power associated with transmitting radio frequency (“RF”) signals from a mobile
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`device. Ex. 1301 at 1:5-31. The ’558 Patent teaches improvements over known
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`power management schemes by employing a novel form of “envelope tracking.” Id.
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`at Title; 3:57-60. The ’558 Patent’s power management scheme achieves substantial
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`power savings in mobile device transmitters, thereby extending a device’s battery
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`life. Id. at 3:46-48.
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`In wireless communication systems, mobile devices communicate by
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`transmitting encoded data signals. Ex. 1301 at 1:11-17. Before transmitting through
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`a communications channel, such encoded data signals are first conditioned to
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`generate RF output signals. Id. Such conditioning typically includes an
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`amplification step performed by a power amplifier (a “PA”) that provides a high
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`transmit power. Id. at 1:21-26. A desirable characteristic of mobile device power
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`amplifiers is an ability to provide high transmit power with high power-added
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`efficiency (“PAE”) and good performance even when the device’s battery is low. Id.
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`Before the priority date of the ’558 Patent, typical PAs in a mobile device
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`were supplied with a constant power supply voltage, regardless of the PA’s output
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`power. The ’558 Patent illustrates this in Figure 2A, below with annotation:
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`-3-
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`Figure 2A illustrates using a battery voltage (Vbat) to supply PA 210, which
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`provides an RFout signal as an amplified version of RFin. Ex. 1301 at 4:1-3. RFout
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`has a time-varying envelope illustrated by plot 250, which is juxtaposed with voltage
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`Vbat 260. Vbat remains higher than the largest amplitude of RFout’s envelope in
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`order to prevent clipping of RFout by PA 210. Id. at 4:2-7. A drawback to this
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`scheme is that the difference between the battery voltage and the envelope of the
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`RFout signal (shaded red) represents wasted power. Id. at 4:7-9.
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`As wasted power is undesirable, especially where power is limited by battery
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`life, the ’558 Patent employs “envelope tracking” in order to better manage power
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`consumption by using only an amount of power that is needed for a particular signal.
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`A PA employing envelope tracking is illustrated in Figure 2C, with annotations,
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`below:
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`-4-
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`By employing envelope tracking to produce a PA power supply Vpa,
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`represented in plot 280, the “supply voltage closely tracks the envelope [250] of the
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`RFout signal over time.” Ex. 1301 at 4:21-27. This maximizes PA efficiency by
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`minimizing the difference between Vpa and RFout over time, which results in less
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`wasted power. Id. at 4:27-32.
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`Implementing a PA supply with envelope tracking in a mobile device poses
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`unique challenges, because operating a mobile device with a low battery voltage is
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`often desirable (e.g., to reduce power consumption, extend battery life, etc.). Ex.
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`1301 at 3:46-56. At times, a PA may need to operate with a higher voltage than a
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`battery is providing, in which case a boost converter may be employed at the expense
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`of increased cost and power consumption. Id.
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`To address these issues, the ’558 Patent discloses an efficient design for
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`envelope tracking that employs a “switcher” and an “envelope amplifier” together
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`with a boost converter, as illustrated in Figure 3, with annotations below:
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`-5-
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`Figure 3 illustrates an exemplary switcher 160a with envelope amplifier 170a
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`operating cooperatively to create a supply current Ipa as the sum of Iind from the
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`switcher and Ienv from the envelope amplifier. Ex. 1301 at 4:34-38.
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`A switcher (e.g., 160a) “has high efficiency” and may deliver “a majority of
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`the supply current for [PA] 130” in current Iind, which contains DC and low
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`frequency components. Id. at 3:14-17; 6:19-20. An envelope amplifier (e.g., 170a),
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`on the other hand operates as a linear stage and has high bandwidth. Id. at 6:20-22.
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`In the combination the switcher reduces the output current of the envelope amplifier
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`thereby improving overall efficiency, while the envelope amplifier provides the high
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`frequency components in current Ienv. Id. at 3:21-25; 6:22-24. In this way, the
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`overall efficiency increases by drawing the majority of current from the high
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`-6-
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`efficiency switcher, and only relying on the envelope amplifier for the high
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`frequency components.
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`In order to further increase the efficiency of the system, envelope amplifier
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`170a predominantly relies on Vbat for power while drawing upon Vboost (which
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`“boosts” or increases the battery voltage to a higher voltage at the expense of cost
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`and power consumption) on demand when, e.g., the magnitude of the envelope
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`signal exceeds a threshold. Id. at 3:19-21; 3:52-67; 5:31-36; 6:1-4. In this way, the
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`linear stage envelope amplifier only draws on the boosted voltage when needed.
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`Embodiments of the ’558 Patent increase efficiency by introducing an offset
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`in the switcher in order to increase the Iind current, thereby reducing the apparatus’
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`reliance on the less efficient envelope amplifier (id. at 6:52-61); by configuring the
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`envelope amplifier to rely on the boost converter dynamically and only when
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`necessary (id. at 6:28-33); or by doing both.
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`B.
`Prosecution History of the ’558 Patent
`The ’558 Patent issued from U.S. Application No. 13/167,659, filed June 6,
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`2011. Ex. 1302 at 38. A first Office Action issued on November 23, 2012, rejecting
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`each original independent claim, including original independent claim 14, as
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`anticipated by Kim et al., entitled “High Efficiency and Wideband Envelope
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`Tracking Power Amplifier with Sweet Spot Tracking.” Ex. 1302 at 59-61; Ex. 1313
`
`at Title. The Examiner provided a detailed examination of original claims 14-15 in
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`-7-
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`view of Kim. Ex. 1302 at 62-63. The Office found the subject matter in original
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`claim 4 to be allowable over Kim if rewritten in independent form. Ex. 1302 at 79-
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`82. To overcome the rejections of claim 14, the Applicant incorporated the subject
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`matter of original claim 4 in independent claim 14. Ex. 1302 at 79-82; 86-87.
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`In a subsequent Final Office Action dated May 10, 2013, the Office indicated
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`that original claim 14 as amended recited allowable subject matter over the prior art
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`of record including the Kim paper. Id. at 134. Thereafter, the Applicant and the
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`Office addressed unrelated claims before a Notice of Allowance was issued on Feb.
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`13, 2014; original claims 14-15 issued as claims 10-11. Id. at 185; 207.
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`III. CLAIM CONSTRUCTION
`Patent Owner does not believe that the term “envelope signal” needs to be
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`construed. To the extent the Board determines that the term “envelope signal”
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`should be construed, Patent Owner does not contest the Board’s previous finding
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`that “envelope signal” means “signal indicative of the upper bound of the output RF
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`signal.” Paper 9 at 8.
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`Patent Owner does not dispute the Board’s previous finding regarding the
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`means-plus-function limitations of claims 10 and 11. Particularly, the Board found
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`that “means for generating a boosted supply voltage based on a first supply voltage”
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`recites the function of “generating a boosted supply voltage based on a first supply
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`voltage,” and the corresponding structure is boost converter 180. Id. at 9. The Board
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`-8-
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`found that “means for generating a second supply voltage based on the envelope
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`signal and the boosted supply voltage” performs the function of “generating a second
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`supply voltage based on the envelope signal and the boosted supply voltage,” and
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`the corresponding structure is envelope amplifier 170. Id. The Board found that
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`“means for generating the second supply voltage based on an envelope signal and
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`either the boosted supply voltage or the first supply voltage” performs the function
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`of “generating the second supply voltage based on an envelope signal and either the
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`boosted supply voltage or the first supply voltage,” and the corresponding structure
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`is envelope amplifier 170. Id.
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`Claim 10 recites “a P-channel metal oxide semiconductor (PMOS) transistor
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`[having]… a source that receives the boosted supply voltage or the first supply
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`voltage.” The only reasonable interpretation of these claim elements, properly read
`
`within the context of the claim as a whole and the specification, is that the PMOS
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`transistor must be able to receive, selectively, either the boosted supply voltage or
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`the first supply voltage (referred to herein as a “selective boost”). See Ex. 2002 at
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`51-65. Patent Owner presents its full claim construction argument for this claim
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`element below in Section VI.
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`IV. LEVEL OF ORDINARY SKILL IN THE ART
`As the Board previously stated, the POSA for the ’558 patent would have had
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`a Master’s degree in electrical engineering, computer engineering, or computer
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`-9-
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`science, and would also have had at least two years of relevant experience, or a
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`Bachelor’s degree in one of those fields and four years of relevant experience. Paper
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`9 at 11. Relevant experience “refers to experience with mobile device architecture
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`as well as transmission and power circuitry for radio frequency devices.” Id. Patent
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`Owner does not dispute the Board’s statement of the level of ordinary skill in the art.
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`See also Ex. 2002 at ¶¶43-44.
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`V. OVERVIEW OF THE CITED REFERENCES
`A. Overview of Chu
`The Chu reference is an article entitled “A 10 MHz Bandwidth, 2mV Ripple
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`PA Regulator for CDMA Transmitters.” Ex. 1304 at Title. Chu describes a
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`“combined class A-B and switch-mode regulator based supply modulator with a
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`master-slave architecture achieving wide bandwidth and low ripple.” Ex. 1304 at
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`2809. Chu recognizes that power amplifiers (PAs) consume a significant portion of
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`the total power budget of battery-powered transceivers, and at higher frequencies,
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`increased power is wasted in the PA. Id. To improve efficiency, Chu explains that
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`it is “highly desirable to track the envelope variations of a modulated waveform at
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`the PA power supply. This variable supply operation ensures close to peak
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`efficiency at various signal envelope levels.” Id. Chu explains that polar modulators
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`“try to address this efficiency loss by closely tracking the envelope of an RF band-
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`pass signal and applying it onto the drain of a high efficiency, non-linear PA.” Id.
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`-10-
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`The process involves an envelope detector extracting the envelope waveform and
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`“applying the amplitude and phase components of RF signals separately to the power
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`supply and input of non-linear PAs,” which improves efficiency. Id.
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`Chu explains that this approach has known drawbacks, however, which
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`include spectral expansion of the envelope and phase bandwidths of CDMA signals,
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`as well as misalignment between the amplitude and phase paths. To overcome these
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`drawbacks and maximize efficiency, Chu presents “a master-slave linear and switch-
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`mode supply modulator with fast dynamic transient response. By using an accurate
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`current sensing technique, efficiency and linearity of the supply modulator is further
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`optimized.” Id. Chu’s master-slave architecture is illustrated in Fig. 4 (below)
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`showing a supply modulator with switch-mode and linear amplifiers connected in
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`parallel.
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`Chu’s Figure 5 (below) illustrates a simplified block diagram of the proposed
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`regulator and ripple cancellation.
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`-11-
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`Chu discloses that a “high GBW linear amplifier in voltage follower
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`configuration ensures that output node Vo(t) tracks the reference envelope voltage
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`A(t).” Ex. 1304 at 2810. And a “current sensing circuit, high gain transimpedance
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`amplifier and switch-mode regulator form[] a global feedback control loop that
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`suppresses the current output from the linear amplifier within the switch-mode
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`regulator bandwidth.” Id. According to Chu, “[t]ypical current sensing techniques
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`utilize[ing] a small series resistor and measure[ing] the voltage drop across it … is
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`not suitable for CDMA supply modulator applications where output currents can be
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`up to 380 mA.” Id. at 2815-2816. Accordingly, Chu discloses an “accurate current
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`sensing circuit” illustrated in Chu’s Figure 16, shown below. Id.
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`-12-
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`Chu’s disclosures resulted in a maximum efficiency of 82% for the master-
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`slave modulator. “The efficiency of the master-slave supply modulator is three times
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`higher than the efficiency of [a standalone class-AB supply modulator] at 16 dBm
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`output power and indicates a significant efficiency improvement over the linear
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`supply modulator at backed-off power levels.” Id. at 2817. Chu does not include
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`any discussion or illustration of a voltage boost mechanism for boosting a battery
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`voltage.
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`B. Overview of Choi 2010
`The Choi 2010 reference is an article entitled “Envelope Tracking Power
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`Amplifier Robust to Battery Depletion.” Ex. 1306 at Title. Choi 2010 describes a
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`“hybrid switching amplifier,” and Figure 2 illustrates how a PA supply modulator
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`topology affects the output power of the PA, as shown below:
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`-13-
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`Ex. 1306 at 1334.
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`Choi 2010’s objective is to develop an envelope tracking power amplifier that
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`prevents the degradation of the output power that results from battery depletion. Ex.
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`1306 at 1333. To accomplish this objective, Choi 2010 discloses a system that
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`boosts the supply voltage of a linear amplifier to 5V, regardless of the battery voltage
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`variation, by coupling a 5V boost converter to the supply of the linear amplifier as
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`illustrated in Choi 2010’s Figure 5 below. Id. at 1333. The system in Choi 2010
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`boosts the linear amplifier supply voltage, “while that of the buck converter is still
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`coupled to the battery in the HSA” so that “the supply modulator dynamically
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`regulates the PA with peak voltage of 4.5V.” Id.
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`-14-
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`Thus, Choi 2010 teaches that this system always boosts the battery voltage to
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`5V, regardless of battery voltage fluctuation in order to provide a stable supply
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`voltage to the RF PA. Id. at 1334. Choi 2010 recognizes that this continuous voltage
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`boost degrades efficiency of the supply, but accepts this degradation as an acceptable
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`compromise to achieve a stable supply voltage for the RF PA. Id. at 1335 (“the
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`efficiency degradation by the additional boost converter is not serious because the
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`load current provided by the linear amplifier is about 30% of the overall load
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`current”).
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`It is notable that four of the six authors of Choi 2010 were also authors of the
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`Kim paper that was distinguished during the prosecution of the ’558 Patent, and Choi
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`2010 was also considered by the Examiner during prosecution. Ex. 1313 at 255; Ex.
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`1306 at 1332; Ex. 1301 at Cover.
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`-15-
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`C. Overview of Hanington
`Hanington is an IEEE article entitled “High-Efficiency Power Amplifier
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`Using Dynamic Power-Supply Voltage for CDMA Applications.” Ex. 1325 at 1471.
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`The Hanington article addresses the efficiency and linearity of microwave power
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`amplifiers for mobile communication systems, and particularly “improvements in
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`system efficiency that are obtainable when a dc-dc converter is used to convert
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`available battery voltage to an optimal supply voltage for the output RF amplifier.”
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`Id.
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`Figure 4 of the Hanington article (reproduced below) shows an RF amplifier
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`configuration that is described as “a high-efficiency power amplifier topology for
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`use in a portable microwave communications system.” Id. The illustrated RF
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`amplifier configuration uses “a boost dc-dc converter… to provide the supply
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`voltage to a MESFET power amplifier. Id.
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`-16-
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`A diagram of a “boost or ringing-choke converter” used in Hanington’s RF
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`amplifier configuration is shown in Figure 5, reproduced below. Id. at 1473. In the
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`illustrated dc-dc boost converter, “energy is stored in a magnetic field during the on-
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`time of the switch,” and “[d]uring the off-time, this energy is released and used to
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`charge the output capacitor to the peak of the ring voltage and provide energy to the
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`load.” Id.
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`
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`With reference to the DC-DC boost converter shown in Figure 5, the
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`Hanington article explains that “[t]he power switch is the heart of the dc-dc
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`converter.” Id. And particularly that, “[i]n this study, AlGaAs/GaAs heterojunction
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`bipolar transistors (HBT’s) were used due to their ability to provide extremely fast
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`switching at moderate power.” Id. Hanington concludes that “[b]oost regulators of
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`this topology have efficiency largely limited by the voltage drops across their
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`semiconducting elements,” and that “[w]ith HBT power transistors, the ac loss is
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`very small due to the fast rise and fall times.” Id. at 1473-74.
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`-17-
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`

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`D. Overview of Myers
`Myers is a U.S. Patent titled “Method and Apparatus for High Efficiency High
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`Dynamic Range Power Amplification.” Ex. 1312 at Title. Myers discloses an
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`envelope elimination and restoration (EER) amplifier, which is “a technique through
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`which highly efficient but nonlinear radio frequency (RF) power amplifiers can be
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`combined with other, highly efficient amplifiers to produce a high efficiency linear
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`amplifier system.” Id. at 1:23-29. In Myers’ system, a signal to be amplified is split
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`into two paths, an amplitude path and a phase path. Id. at 1:29-31. An envelope is
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`detected and amplified in the amplitude path by a class S or other power amplifier,
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`which operates on the bandwidth of the RF envelope rather than the RF bandwidth.
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`Id. at 1:31-34. The phase component in the phase path is then amplitude modulated
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`by the amplified envelope signal, creating an amplified replica of the input signal.
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`Id. at 1:34-37. Myers explains that in an EER amplifier, the dynamic range is limited
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`by the range of the class S modulator used to amplify the envelope, thus Myers
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`discloses another type of EER amplifier with a higher dynamic range. Id. at 1:37-
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`40; 1:55-57.
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`Myers describes the use of pulsewidth modulators (PWMs) as part of a
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`switcher (i.e., class S modulator) implementation, and does not describe or relate to
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`linear envelope amplifiers. Id. at 1:62-67; 4:17-20 (“The operation of multi-range
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`modulator 200 described thus far is that of a class S modulator with a power source
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`-18-
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`of Vdd1.”); 6:1-5 (“The operation of multi-range modulator 300 described thus far
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`is that of a class S modulator with a power source of Vdd1.”). The two voltage
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`sources in Myers are applied to a switcher, not a linear amplifier in a hybrid structure,
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`and neither of the voltages are “boosted” or result from a boosted converter. The
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`PWMs are depicted in Figures 2 and 3:
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`As these figures illustrate, the PWM “outputs a pulsewidth modulated
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`waveform which has a duty cycle proportional to the amplitude of the envelope
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`signal.” Id. at 3:63-65. The driver “accepts the pulsewidth modulated signal from
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`-19-
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`PWM” and “drives switching transistor” and “logic gates.” Id. at 3:66-4:1. Myers
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`does not disclose implementing the modulator with a PMOS transistor that receives
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`a selectable power source. Specifically, although disclosing an embodiment in
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`which the multi-range modulator “shares a common switching transistor coupled to
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`ground” as shown in Figure 2, Myers never discloses an embodiment in which the
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`two voltages Vdd1 and Vdd2 are selectably received by the same switching
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`transistor. Id. at 7:12-24; Figure 2. Rather, Myers explicitly discloses that “having
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`two separate pairs of switching transistors [as shown in Figure 3] further increases
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`efficiency.” Id.
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`Myers’ Figure 8 illustrates a flow chart for amplifying a signal:
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`-20-
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`Myers’ flowchart shows in step 820 that if the input is found to be less than
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`the reference signal, Myers describes proceeding to step 830, in which a first power
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`source is selected for use in a pulsewidth modulator. Ex. 1312 at 9:26-30. But if the
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`input is greater than the reference, Myers’ process proceeds to step 840, in which a
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`second power source, greater than the first power source, is selected for use with a
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`pulsewidth modulator. Id. at 9:29-32.
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`VI. GROUND I OF THE PETITION SHOULD BE DISMISSED
`BECAUSE IT IS BASED ON AN UNSUPPORTABLE CLAIM
`INTERPRETATION
`Ground I alleges that claim 10 of the ’558 Patent is obvious over the
`
`
`
`combination of Chu, Choi 2010, and Hanington. Claim 10 recites “a P-channel
`
`metal oxide semiconductor (PMOS) transistor [having]…a source that receives the
`
`boosted supply voltage or the first supply voltage.” As detailed below, the only
`
`reasonable interpretation of this claim element, properly read within the context of
`
`the claim as a whole, is that the source of the PMOS transistor must be able to receive,
`
`selectively, either the boosted supply voltage or the first supply voltage (referred to
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`herein as a “selective boost”). 1 Ex. 2002 at ¶¶51-65. Petitioner’s implicit
`
`
`1 Dependent claim 11, which Petitioner addresses only in Ground II, recites “based
`on an envelope signal and either the boosted supply voltage or the first supply
`voltage.” Petitioner relies on Myers as disclosing this limitation, and does not appear
`to dispute that claim 11 requires “selective boost.” Patent Owner therefore focuses
`its claim construction argument on claim 10, but substantially the same arguments
`apply to claim 11.
`
`
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`interpretation, on the other hand, renders much of the claim meaningless, and
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`therefore cannot be correct. Petitioner presents no argument that Ground I discloses
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`a selective boost. Ground I should therefore be denied for this reason.
`
`
`
`Petitioner alleges that the limitation “a P-channel metal oxide semiconductor
`
`(PMOS) transistor [having]…a source [receiving/that receives] the boosted supply
`
`voltage or the first supply voltage” is met by Choi 2010’s disclosure of “a boost
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`converter to generate a boosted supply voltage that can be supplied to the envelope
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`amplifier instead of a battery voltage.” Paper 3 at 69. Petitioner is entirely silent
`
`regarding whether this claim limitation requires a selective boost.
`
`
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`Petitioner’s implicit construction seemingly rests entirely on the word “or.”
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`The use of “or” is sometimes an acceptable mechanism for claiming alternatives
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`such that only one of the limitations need be found in the prior art to support
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`anticipation. See In re Gaubert, 524 F.2d 1222, 187 USPQ 664 (CCPA 1975).
`
`Nevertheless, under the broadest reasonable interpretation, a claim (even one
`
`reciting the word “or”) must be interpreted such that it receives the broadest
`
`reasonable interpretation in light of the intrinsic record. See In re Translogic Tech.,
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`504 F.3d 1249, 1257 (Fed. Cir. 2007). And “[i]t is highly disfavored to construe
`
`terms in a way that renders them void, meaningless, or superfluous.” Wasica
`
`Finance GmbH v. Continental Automotive Sys., Inc., 853 F.3d 1272, 1288 n.10 (Fed.
`
`Cir. 2017). The claim language here does not signify an alternative limitation as in
`
`
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`In re Gaubert, because such a reading is inconsistent with the language of the claims
`
`and the specification.
`
`
`
`Contrary to Petitioner’s implicit construction, an interpretation of claim 10
`
`without the “selective boost” operation would render portions of the claim
`
`meaningless, and therefore cannot be correct under the broadest reasonable
`
`interpretation (or any other standard). See Digital-Vending Servs. Int'l, LLC v. Univ.
`
`of Phoenix, Inc., 672 F.3d 1270, 1275 (Fed. Cir. 2012) (“claims are interpreted with
`
`an eye toward giving effect to all terms in the claim.”); Wasica Finance, 853 F.3d at
`
`1288, n.10 (“highly disfavored” to interpret claim terms in a way that renders them
`
`“meaningless”). This “selective boost” operation is reflected in claim 10 of the ’558
`
`Patent as follows:
`
`10. An apparatus for generating supply voltages,
`comprising:
`
`
`means for generating a boosted supply voltage
`based on a first supply voltage, the boosted supply voltage
`having a higher voltage than the first supply voltage; and
`
`
`means for generating a second supply voltage based
`on the envelope signal and the boosted supply voltage,
`wherein the means for generating the second supply
`voltage incorporates an envelope amplifier that produces
`the second supply voltage using an operational amplifier
`(op-amp) that receives the envelope signal and provides an
`amplified signal, a driver that receives the amplified signal
`and provides a first control signal and a second control
`signal, a P-channel metal oxide semiconductor (PMOS)
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`

`

`transistor that receives the first control signal, a source
`that receives the boosted supply voltage or the first supply
`voltage, and a drain providing the second supply voltage
`and an N-channel metal oxide semiconductor (NMOS)
`transistor that receives the second control signal at a gate
`and provides a second supply voltage through a drain, and
`a source for circuit grounding.
`
`Ex. 1301 at 12:25-45 (emphasis added). As emphasized above, claim 10 requires
`
`“means for generating a boosted supply voltage . . . having a higher voltage than the
`
`first supply voltage,” and further requires “means for generating a second supply
`
`voltage based on the envelope signal and the boosted supply voltage.” That is, the
`
`means for generating a boosted supply voltage must generate “a boosted supply
`
`voltage.” Otherwise, the “means for generating a second supply voltage” limitation
`
`is meaningless.
`
`
`
`But under Petitioner’s implicit interpretation, the “boosted supply voltage” is
`
`an optional limitation because the PMOS transistor need only be able to receive one
`
`or the other of the boosted supply voltage and the first supply voltage. For example,
`
`Petitioner’s position means that the PMOS transistor source may be capable of
`
`receiving only the first supply voltage. But under this view, it would be impossible
`
`for the PMOS transistor drain to provide “the second supply voltage” that is “based
`
`on the envelope signal and the boosted supply voltage.” Claim 10 requires that the
`
`second supply voltage is generated “based on the envelope signal and the boosted
`
`supply voltage,” but if the PMOS transistor receives only the first supply voltage at
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`its source, then it would necessarily “provide” the first supply voltage at its drain,
`
`and not a second supply voltage “based on the boosted supply voltage.” By similar
`
`logic, if the PMOS drain provides “the second supply voltage” based on “the boosted
`
`supply voltage” then it is necessarily the case that the PMOS source does not receive
`
`the first supply voltage.
`
`
`
`Additionally, Petitioner conce