UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`EVERLIGHT ELECTRONICS CO., LTD.
`Petitioner
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`v.
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`DOCUMENT SECURITY SYSTEMS, INC.
`Patent Owner
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`U.S. Patent No. 7,524,087
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`DECLARATION OF ERIC BRETSCHNIEDER, PH.D
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`REGARDING U. S. PATENT NO. 7,524,087
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`EVERLIGHT ELECTRONICS CO., LTD.
`Petitioner
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`v.
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`DOCUMENT SECURITY SYSTEMS, INC.
`Patent Owner
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`U.S. Patent No. 7,524,087
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`DECLARATION OF ERIC BRETSCHNIEDER, PH.D
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`REGARDING U. S. PATENT NO. 7,524,087
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`I.
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`INTRODUCTION
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`1.
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`I, Eric Bretschneider Ph.D., of 2622 Westwind Drive, Corinth, TX
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`76210 have been retained by Sughrue Mion, PLLC on behalf of Everlight
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`Electronics Co. Ltd. to analyze U.S. Patent No. 7,524,087 (“the ’087 patent”)
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`relative to the state of the art at the time of the earliest application underlying the
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`’087 Patent. In particular, my analysis relates only to claims 1, 6-8, 15, and 17. I
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`have also been retained to provide analysis regarding what a person of ordinary skill
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`in the art related to semiconductor-based light emitting devices and packaging would
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`have understood at the time of the earliest application underlying the ’087 Patent.
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`2.
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`I am being compensated at my normal consulting rate of $400 per hour.
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`My compensation is in no way contingent on the outcome of this case, or on the
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`conclusions I reach. I have no financial interest in any of the above parties.
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`3.
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`I was asked to review and opine on the documents filed and positions
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`taken in IPR2018-00522 filed by Seoul Semiconductor Co. Ltd. et. al., ("the SSC
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`IPR"), including the Declaration of Michael Pecht Ph.D. and the exhibits cited
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`therein.
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`4.
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`This report summarizes the opinions I have formed to date. In general, as
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`set forth below, I agree with most of the analysis and conclusions of Dr. Pecht. For the
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`sake of efficiency, I have incorporated parts of Dr. Pecht's analysis with which I agree,
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`into this Declaration.
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`5.
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`I reserve the right to modify my opinions, if necessary, based on further
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`review and analysis of information that I receive subsequent to the filing of this report,
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`including in response to positions taken by Document Security Systems, Inc. or its
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`experts that I have not yet seen.
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`II. MY EXPERIENCE AND QUALIFICATIONS
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`7.
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`I have over 25 years of experience with lighting and LEDs, including a
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`comprehensive background on the full range of LED production technologies
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`including MOCVD hardware/process design, LED chip fabrication,
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`optical/thermal/mechanical design of LED packages, phosphor conversion, and
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`testing/reliability of LED packages and LED fixtures.
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`8.
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`I am currently the Chief Technology Officer at EB Designs &
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`Technology. In that capacity, I am (among other things) responsible for the design
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`and development of solid-state lighting technologies for clients ranging from
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`startups to fortune 100 companies.
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`9.
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`I am also current a member and Chair of the University of Florida
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`Department of Chemical Engineering Advisory Board. I was the inaugural
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`Conference Chair for LED Measurements and Standards. I am also a member of a
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`number of professional societies, including SPIE, Materials Research Society,
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`Illuminating Engineering Society. Inside the Illuminating Engineering Society I am
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`one of six members of the Science Advisory Panel and I am the current Chair of
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`Subcommittee S which is responsible for all test and measurement standards related
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`to solid-state lighting.
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`10. Prior to my position at EB Designs & Technology, I served as the
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`Director of Engineering at HeathCo, LLC. In that capacity, I was responsible for
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`advanced technology/product development related to solid-state lighting, sensors,
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`notifications and control products.
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`11. Prior to my position as Director of Engineering at HeathCo, I was
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`positioned at the Elec-Tech International Co., Ltd., a multi-billion dollar solid-state
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`lighting startup company headquartered in mainland China. There I held the
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`concurrent positions of Chief Engineer, ETi Lighting Research Institute and VP of
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`Research and Development, ETi Solid State Lighting. In this capacity, my
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`responsibilities included developing all technology and product roadmaps for
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`markets in North America, China, Europe, and Japan.
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`12.
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`In this role, I led and trained a staff of over 100 engineers, technicians
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`and designers in the methods and procedures for designing solid-state lighting
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`products. This included determining spectral content, LED package reliability,
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`thermal management, optical design, control integration and electrical drive circuits.
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`I also had technical responsibility for LED die, package and light engine design for
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`products intended for the domestic Chinese market as well as markets in Japan,
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`North America and Europe.
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`13. Between 2004 and 2008, I was positioned at Toyoda Gosei North
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`America, where I was a sales manager and was the sole technical support for
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`Toyoda Gosei LED die and packages in the Western Hemisphere. My
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`responsibilities included managing and developing LED die and package sales
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`accounts in North America and Europe. In my role as technical support for the
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`Western Hemisphere, I provided knowledge and experience necessary for customers
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`to use LED die and packages. With respect for LED die, this included aiding and
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`supporting customers with optical and thermal design of LED packages as well as
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`phosphor conversion materials and techniques. For LED packages, my
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`responsibilities included testing protocols, reliability evaluation, as well as thermal
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`and optical design of LED light engines and fixtures
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`14. Between 2003 and 2004, I was positioned at Beeman Lighting, where I
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`was Director of Solid State Lighting Engineering, and my responsibilities included
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`leading development of solid state lighting systems and materials.
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`15. Between 1998 and 2003 I held a position at Uniroyal Optoelectronics,
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`where I was Team Leader for the Epitaxial Growth and Materials Characterization
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`areas. I later held the position of Director of Intellectual Property, University
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`Relations and Government contracts. From 1999 through 2003 I had a concurrent
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`assignment as a Senior Epi Scientist. Throughout these roles I supported all sales
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`efforts for LED die and package sales.
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`16. While at Uniroyal Optoelectronics, I had primary responsibility for
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`thermal and optical design of LED die and packages. A part of my responsibility in
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`supporting sales of LED die and packages included thermal and optical design of
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`packages for LED die customers and thermal and optical modeling of LED modules
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`and fixtures for LED package customers.
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`17. My interactions with customers and potential customers included
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`design work on a number of projects that would still be considered technically
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`challenging today. The included exterior lighting for the US Navy DDX (Stealth
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`Destroyer) program, a lighting module for the US Air Force for use on the XSS-11
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`satellite, an implantable light source for the Paul Allen Foundation and linear chip
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`on board (COB) lighting modules for the Boeing 737. I also worked on an internal
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`project that developed a liquid based cooling system for LEDs that could dissipate
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`more than 20 Watts of heat per square millimeter which is an order of magnitude
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`greater heat flux than what is generated by current state of the art LEDs.
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`18. Further, while working with a sister company (Norlux Corporation), I
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`also helped design the “Hex” which was one of the first COB LED products released
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`and which incorporated from approximately 40 to well over 100 LED chips and
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`operated with electrical power input of 1 to 5 watts. I was also responsible for
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`reverse engineering and destructive testing of internal and competitive products.
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`19.
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`I have also authored and presented more than a total of 30 publications,
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`presentations, and seminars, and I am a named inventor on over 30 issued patents
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`and over 25 pending patents.
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`20.
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`I earned my BSE in Chemical Engineering from Tulane University in
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`1989. I earned a Ph.D. in Chemical Engineering from the University of Florida in
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`1997. My graduate work focused on development of optoelectronic devices,
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`including novel silicon based visible light LEDs, sulfide based TFELD structures
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`and ZnSe blue LEDs. My research required optical and thermal package design and
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`test development.
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`21. Based on the above education and experience, I believe that I have a
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`detailed understanding of the state of the art during the relevant period, as well as
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`significant experience with and a substantial understanding of how persons of skill
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`in the art at that time would understand the technical issues in this case. For more
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`details about my experience and qualifications, see my CV, Ex. 1017.
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`22. My opinions are based on more than 25 years of working with
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`electronic packages and LEDs, as well as my industry and research experience.
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`My opinions are also based on investigation and study of the relevant materials,
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`including the patents at issue and their file history, and the prior art. In the course
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`of forming my opinions I have reviewed all the exhibits of record.
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`23.
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`I may rely upon these materials and/or additional materials to rebut
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`arguments raised by the patent owner. Further, I may also consider additional
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`documents and information in forming any necessary opinions – including
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`documents that may not yet have been provided to me.
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`24. My analysis of the materials relevant to this proceeding is ongoing
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`and I will continue to review any new material as it is provided. This report
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`presents only those opinions I have formed to date. I reserve the right to revise,
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`supplement, and/or amend my opinions stated herein based on new information
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`and on my continuing analysis of the materials already provided.
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`III. DESCRIPTION OF THE RELEVANT FIELD AND THE RELEVANT
`TIMEFRAME
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`25.
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`I have carefully reviewed the ’087 Patent. For convenience, all of the
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`information that I considered in arriving at my opinions is listed in Appendix A.
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`26. Based on my review of these materials, I believe that the relevant field
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`for purposes of the ’087 Patent is semiconductor based light emitting diodes (LED)
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`devices and their packaging.
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`27.
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`I believe the relevant timeframe for my analysis is approximately
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`2007, which is the year during which the ’087 Patent was originally filed.
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`28. As described above, I have extensive experience in the relevant field,
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`including experience relating to the packaging of semiconductor light emitting
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`semiconductor die. Based on my experience, I have an established understanding of
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`the relevant field in the relevant timeframe.
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`VI. THE PERSON OF ORDINARY SKILL IN THE RELEVANT FIELD
`IN THE RELEVANT TIMEFRAME
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`29.
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`I have been informed that “a person of ordinary skill in the relevant
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`field” is a hypothetical person to whom an expert in the relevant field could assign a
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`routine task with reasonable confidence that the task would have been successfully
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`carried out. I have been informed that evidence of the level of ordinary skill in the
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`art can be determined based on information about the field including: the types of
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`problems encountered, known solutions, the speed of innovation, sophistication, and
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`the educational level of active workers. I have considered these types of information
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`along with my own background working with students and other professionals in
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`the field to reach my conclusion.
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`30.
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`It is my opinion that the person of ordinary skill in the art at the
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`relevant time would have had at least Bachelor’s Degree in mechanical, chemical
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`or electrical engineering and at least two years of experience in the design of LED
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`devices and packaging. A higher level of education, such as a Master’s Degree, in
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`electrical engineering, could substitute for work experience and additional work
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`experience could substitute for a degree.
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`31. Based on my experience, I have an understanding of the capabilities
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`of a person of ordinary skill in the relevant field. I have supervised, directed, and
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`instructed many such persons over the course of my career.
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`VII. OVERVIEW OF THE ’087 PATENT AND STATE OF PRACTICE
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`32. A light emitting diode (LED) is a semiconductor device (also called a
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`semiconductor die or chip) that emits light when powered. To protect the fragile
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`semiconductor device and its connections, to aid in thermal management of the
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`relatively high heat that is generated, and to aid in mounting the LED to a printed
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`circuit board (PCB) or some other assembly, the LED die is packaged. The
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`packaging of semiconductor devices is well known with a history of over 60 years.
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`VIII. BRIEF DESCRIPTION OF THE ACCUSED PRODUCTS
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`33.
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`I have reviewed the patent owner’s infringement contentions in the
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`SSC litigation. Below are two images taken from the contentions.
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`34. The “second pocket” identified by the patent owner is an artifact left
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`by the injection molding process. The rough surface of the very central portion
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`indicates the location from which the injected resin flowed into the cavity. The
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`roughening occurred when the resulting part (cross-linked resin) was broken away
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`from the excess resin in the passage through the gate. The larger circle indicates the
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`shape of the gate itself, which is generally a cylindrical piece of metal with a small
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`hole in its center through which the resin (in liquid form) passes as it enters the
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`mold.
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`IX. UNPATENTABILITY BASED ON PRIOR ART IN THE PRESENT
`PROCEEDINGS
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`35. I am informed by counsel and understand that statutory and judicially
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`created standards must be considered to determine the validity of a patent claim. I
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`have reproduced the legal standards relevant to this declaration below, as provided
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`to me by counsel as I understand them.
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`36.
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`I understand that a patent claim is invalid if it is anticipated or
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`obvious.
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`37. Anticipation: I understand that for a patent claim to be “anticipated” by
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`the prior art, each and every limitation of the claim must be found, expressly or
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`inherently, in a single prior art reference as recited in the claim. I understand a claim
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`limitation not expressly found in a prior art reference is inherent if the prior
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`art necessarily functions in accordance with, or includes, the claim limitation. Mere
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`probability that a limitation is included is not sufficient to establish inherency.
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`38. Obviousness: I understand that a patent claim is not patentable for
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`obviousness under 35 U.S.C. § 103 “if the differences between the subject matter
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`sought to be patented and the prior art are such that the subject matter as a whole
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`would have been obvious at the time the invention was made to a person having
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`ordinary skill in the art to which said subject matter pertains.” 35 U.S.C. § 103. I
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`understand that obviousness may be based on one reference and/or a combination
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`of references. I understand that the combination of familiar elements according to
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`known methods is likely to be obvious when it does no more than yield predictable
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`results.
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`39.
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`I understand that when a patented invention is a combination of
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`known elements, the Board must determine whether there was an apparent reason
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`to combine the known elements in the fashion claimed by the patent at issue by
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`considering the teachings of prior art references, the effects of demands known to
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`people working in the field or present in the marketplace, and the background
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`knowledge possessed by a person having ordinary skill in the art.
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`40.
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`I understand that a patent claim composed of several limitations is not
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`proven obvious merely by demonstrating that each limitation was independently
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`known in the prior art. I understand that identifying a reason those elements would
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`have been combined can be important because inventions in many instances rely
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`upon building blocks long since uncovered, and claimed discoveries almost of
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`necessity will be combinations of what, in some sense, is already known. I
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`understand that it is improper to use hindsight in an obviousness analysis and that a
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`patent's claims should not be used as a “roadmap.”
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`41.
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`I also understand all prior art references are to be looked at from the
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`viewpoint of a person having ordinary skill in the art at the time the invention was
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`made.
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`42.
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`I understand that obviousness analysis requires consideration of: (1)
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`the scope and content of the prior art; (2) the differences between the claims and
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`the prior art; (3) the level of ordinary skill in the pertinent art; and (4) any objective
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`indicia of non-obviousness, such as commercial success, long-felt but unresolved
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`need, failure of others, industry recognition, copying, and unexpected results.
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`43.
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`I understand that in order to prove that a claimed invention is not
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`patentable for obviousness, a petitioner must (1) identify the differences between
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`the claim and particular disclosures in the prior art references, singly or in
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`combination, (2) specifically explain how the prior art references could have been
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`combined in order to arrive at the subject matter of the claimed invention, and (3)
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`specifically explain why a person having ordinary skill in the art would have had
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`reasons to so combine the prior art references.
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`A. GROUND 1: CLAIMS 1, 6-8, 15 AND 17 ARE OBVIOUS
`BASED ON JAPANESE PATENT APPLICATION
`PUBLICATION NO. 2001-118868 (“KYOWA”) (Ex. 1009)
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`44.
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`Japanese Patent Application Publication No. 2001-118868 (“Kyowa”)
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`is entitled “Surface Mounted Component and Method for Manufacturing Same” and
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`pertains to a surface-mounted, light emitting device.
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`1.
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`CLAIM 1
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`45. Claim 1 recites:
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`1. An optical device comprising:
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`[a] a lead frame with a plurality of leads;
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`[b] a reflector housing formed around the lead frame, the reflector housing
`having a first end face and a second end face and a peripheral sidewall
`extending between the first end face and the second end face, the reflector
`housing having a first pocket with a pocket opening in the first end face
`and a second pocket with a pocket opening in the second end
`face
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`[c] at least one LED die mounted in the first pocket of the reflector
`housing
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`[d] a light transmitting encapsulant disposed in the first pocket and
`encapsulating the at least one LED die
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`[e] wherein a plurality of lead receiving compartments are formed in the
`peripheral sidewall of the reflector housing
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`46. The preamble of claim 1 recites “[a]n optical device.” Figures 2 and 3
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`of Kyowa show LEDs within a housing. The combination of a housing and LEDs
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`is an optical device as recited.
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`47. The first element of claim 1 recites “a lead frame with a plurality of
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`leads.” Reference numbers referring to the lead frame and the individual leads
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`include 13 and 21-24 as shown, for example, in figure 4 prior to separation and in
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`figure 2 in final form. Ex. 1009 (Kyowa) ¶¶ 1, 16, 18.
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`48. The second element of claim 1 recites “a reflector housing formed
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`around the lead frame, the reflector housing having a first end face and a second
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`end face and a peripheral sidewall extending between the first end face and the
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`second end face, the reflector housing having a first pocket with a pocket opening
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`in the first end face and a second pocket with a pocket opening in the second end
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`face.” The top surface of the housing (called a “resin package”) can be seen in
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`figure 2 of Kyowa, where the large circle indicates the location of a first
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`pocket/cavity. Abstract, ¶¶ 19, 44. Figure 5 shows the steps of forming the
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`housing over the lead frame, which I described with respect to the first element of
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`claim 1 above. The lead frame is pre-bent and then loaded into the mold to form
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`the housing over the lead frame. Id. at ¶ 19.
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`49. A cross sectional view of the housing is shown in figure 3, which
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`again shows the first pocket/cavity formed in the top surface. The first cavity is
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`formed as shown in figure 5(b) by including a core block 31, which results in a
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`space without resin when the mold is opened and the core block is removed. Kyowa
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`also explains that a “mirror surface treatment” is applied to the surface of the first
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`pocket/cavity, rendering the housing reflective. ¶ 14. The area between the edge of
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`the pocket/cavity and the outer edge of the device comprises a peripheral sidewall.
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`50. In addition to the first pocket/cavity in the top surface of the housing
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`of Kyowa, the reference also discloses a second pocket/cavity in the bottom surface.
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`The second pocket/cavity is shown in figures 5(b) and (c), where a “resin injection
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`hole 34” is used to inject resin (“M” in figure 5(b) and “m” in figure 5(c)) into the
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`mold cavity for the housing. The use of a resin injection hole is and was then
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`conventional technology. In particular, there must be a way for the resin to actually
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`enter the mold. The standard technique as shown in Kyowa is to force the resin
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`through a narrow aperture/hole. In most designs, the narrow aperture sticks out into
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`the mold to allow any resin remaining in the hole to be broken off from the molded
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`part. It is this projection of the “resin injection hole 34” down into the cavity that
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`results in a second pocket/cavity in Kyowa as shown in figure 5(b) and (c).
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`51. I note that figures 2 and 3 and the similar figures 6(a) and (b) both
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`appear to show somewhat unconventional cross-sectional views. In particular,
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`rather than a straight line through the housing as would be conventional, lines III-III
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`and VI-VI, in effect, comprise different cross sections taken at different locations.
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`The way I interpret the cross-sections, after cutting the package of figure 2 at lines
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`III-III and rotating the cut face toward the viewer, the viewer of the resulting partial
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`housing would see the surface in figure 3. In other words, the planes left by the
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`horizontal cuts of figure 2 would comprise the surface facing the viewer and the
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`vertical cuts of figure 2 would be transverse and therefore not visible to the viewer.
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`A similar result would follow for figures 6(a) and 6(b), and therefore, the second
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`pocket, which is comprised of the space left by the resin injection hole as shown in
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`figure 5(b) would not be visible to the viewer in either figure 3 or 6(b).
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`52. Although I believe that Kyowa directly and unambiguously discloses a
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`second pocket/cavity, I also believe that the inclusion of such a pocket/cavity would
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`have been obvious based on Kyowa. In particular, Kyowa’s disclosure of a resin
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`injection port 34 extending into a mold cavity would have rendered it obvious to a
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`person of ordinary skill to leave a second cavity in the back surface of the device.
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`Such an artifact of the injection molding process was well known in the art and
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`would have been seen as general background knowledge of a skilled artisan in the
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`chip packaging field. Support for my opinion is provided in Oshio at paragraph
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`20 and in the book Plastic Injection Molding at page 29. More specifically, when
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`considering how to design a mold for injection molding, one important factor is the
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`configuration of the gate (port) through which the hot liquid resin enters the mold.
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`After the mold is filled and as the resin cures (crosslinks) and solidifies, any resin
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`within the gate itself will harden and remain attached to the molded object. That
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`unwanted part must be broken off from the desired molded object, leaving a small
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`mark or scar on the surface of the object. If the injection molding gate is flush with
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`the surface of the mold, the mark left by the gate will extend away from the surface.
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`To avoid that result, most mold designers sink the gate a small distance into the
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`mold, which results in a small depression in the molded surface. In other words,
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`designers have reason to sink the injection gate into the mold to avoid an artifact
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`extending above the surface. The fact that the artifact will sink into or extend above
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`the surface is described, for example, at page 29 of the book Plastic Injection
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`Molding and the desirability of a sunken artifact is described at paragraph 20 of
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`Oshio.
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`53. The third element of claim 1 recites “at least one LED die mounted in
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`the first pocket of the reflector housing.” Paragraph 14 of Kyowa describes three
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`light emitting chips 17a, 17b, and 17c. The three chips are shown, for example, in
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`figure 2 of Kyowa. Two of the chips are also shown in the cross-sectional view of
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`figure 3 as disposed within the first pocket.
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`54. The fourth element of claim 1 recites “a light transmitting encapsulant
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`disposed in the first pocket and encapsulating the at least one LED die.” Paragraph
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`14 of Kyowa explains that “the opening 12 is filled with a coating material 20, such
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`as a transparent epoxy resin material.”
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`55. The final element of claim 1 recites “wherein a plurality of lead
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`receiving compartments are formed in the peripheral sidewall of the reflector
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`housing.” As shown in figures 2, 3, and 5(a), (b) and 5(c), the package is formed
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`by injection molding around the lead frame 13 having external leads 21, 22, 23,
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`and 24. As shown in figure 5(a), the pre-bent lead frame is placed in the mold. The
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`mold is then closed, pressing the metal leads against the surface of the mold as
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`shown in figure 5(b). This process is described in paragraph 22, where Kyowa
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`explains that the resin forms on the portions of the leads that are not in contact with
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`the mold, resulting in leads flush with the surface of the resulting package as shown
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`in figures 2, 3, and 5(c). The leads thus create their own pockets in the surface of the
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`housing by stopping the resin from taking up that space in the final package.
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`2.
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`CLAIM 6
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`56. Claim 6 recites:
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`6. The optical device of claim 1, wherein the plurality of lead receiving
`compartments define a plurality of ribs disposed between the plurality of
`lead receiving compartments.
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`57. As I explained above with respect to claim 1, the leads 21-24 of Kyowa
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`each create its own compartment during the injection process by excluding resin
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`from the regions of the housing comprising the leads. The resulting compartments
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`are separated by regions of resin where the leads are absent. Those separating
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`regions of resin comprise ribs disposed between the lead receiving compartments.
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`The ribs are shown, for example, in figure 5(c) of Kyowa.
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`3.
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`CLAIM 7
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`58. Claim 7 recites:
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`7. The optical device of claim 1, said at least one LED die comprising three
`LED dies.
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`59. Kyowa discloses three LED dies, which are labeled 17a, 17b, and 17c
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`in figure 2. Kyowa also described the dies in paragraph 14.
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`4.
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`CLAIM 8
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`60. Claim 8 recites:
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`8. The optical device of claim 7, said three LED dies comprising at least two
`colors.
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`61. As discussed above with respect to claim 7, Kyowa discloses 3 dies
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`17a, 17b, and 17c. Kyowa further discloses that the each of the dies emit red,
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`green, or blue light.
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`5.
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`CLAIM 15
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`62. Claim 15 recites:
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`15. An illumination system, comprising
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`[a] a reflector housing molded on a lead frame having a plurality of
`electrically conductive leads, the reflector housing having a first cavity and a
`second cavity on opposite sides of the reflector housing
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`[b] at least one LED die mounted in said first cavity and electrically
`connected to said plurality of electrically conductive leads
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`[c] said reflector housing further having a first end face and a second end
`face and a peripheral sidewall extending between the first end face and the
`second end face, the reflector housing having a cavity in the first end face,
`said peripheral sidewall having a plurality of lead receiving compartments
`formed therein.
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`63. The preamble of claim 15 recites “[a]n illumination system.” As
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`discussed above with respect to claim 1, Kyowa discloses an LED device
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`comprised of a housing and multiple differently colored-light emitting dies. The
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`package device can be mounted on a circuit board as explained in paragraphs 15
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`and 23. Thus, Kyowa discloses an illumination system as recited.
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`64. The first element of claim 15 recites “a reflector housing molded on a
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`lead frame having a plurality of electrically conductive leads, the reflector housing
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`having a first cavity and a second cavity on opposite sides of the reflector housing.”
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`The third element of 15 recites “said reflector housing further having a first end face
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`and a second end face and a peripheral sidewall extending between the first end face
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`and the second end face, the reflector housing having a cavity in the first end face,
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`said peripheral sidewall having a plurality of lead receiving compartments formed
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`therein.” These elements are, in essence, a combination of portions of the first,
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`second, and third elements of claim 1. Three differences exist. First, here the term
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`“molded” is used instead of “formed.” Kyowa discloses molding its housing 11 over
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`lead frame 13 in paragraph 19. Claim 15 also requires that the leads be electrically
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`conductive, which is explained, for example, in paragraph 18 of Kyowa which
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`describes the material for the leads as copper alloy. In addition, as shown in figure 2
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`and paragraph 14, the leads are connected to and power the LED dies via wires.
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`And finally, claim 15 uses the word pocket instead of cavity, but the ’087 patent
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`itself uses these terms interchangeably.
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`65. The second element of claim 15 recites “at least one LED die mounted
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`in said first cavity and electrically connected to said plurality of electrically
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`conductive leads.” Figure 2 and paragraph 14 respectively show and describe three
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`LED dies in a first cavity/pocket formed in the top surface of the housing 11. The
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`dies are electrically connected to conductive leads of the lead frame 13.
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`6.
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`CLAIM 17
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`66. Claim 17 recites
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`17. The illumination system of claim 15, further comprising an
`encapsulant filling said first cavity around said at least one LED die.
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`67. Kyowa discloses in paragraph 14 filling the first cavity with a
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`transparent epoxy resin material to cover the parts within the cavity including the
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`LED dies 17a, b, and c. Figure 3 of Kyowa shows the epoxy around the LEDs.
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`B. GROUND 2: CLAIMS 1, 6-8, 15 AND 17 ARE OBVIOUS
`BASED ON UNITED STATES PATENT APPLICATION NO.
`2004/0206964 (“MATSUMURA”) (Ex. 1010)
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`68. United States Patent Application No. 2004/0206964 (“Matsumura”) is
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`entitled “LED Device and Manufacturing Method Thereof” and pertains to a
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`surface-mounted LED lamp in which a plurality of LED elements are mounted.
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`1.
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`CLAIM 1
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`69. Claim 1 recites:
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`1. An optical device comprising:
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`[a] a lead frame with a plurality of leads;
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`[b] a reflector housing formed around the lead frame, the reflector housing
`having a first end face and a second end face and a peripheral sidewall
`extending between the first end face and the second end face, the reflector
`housing having a first pocket with a pocket opening in the first end face and a
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`second pocket with a pocket opening in the second end face
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`[c] at least one LED die mounted in the first pocket of the reflector housing
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`[d] a light transmitting encapsulant disposed in the first pocket and
`encapsulating the at least one LED die
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`[e] wherein a plurality of lead receiving compartments are formed in the
`peripheral sidewall of the reflector housing
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`70. The preamble of claim 1 recites “[a]n optical device.” Matsumura is
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`directed to a surface mount device (SMD) comprising a resin package and light
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`emitting devices (LEDs) within the package. Matsumura’s disclosed device,
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`therefore, is an optical device as recited.
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`71. The first element of claim 1 recites “a lead frame with a plurality of
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`leads.” Figure 4 of Matsumura shows a lead frame comprising a plurality of leads
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`during the manufacturing process. Figure 1A of Matsumura shows the leads in their
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`final configuration. Each of the LEDs in the device has one connection to a
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`dedicated first lead, as well as a second connection to a common lead. This
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`arrangement is described in paragraphs 32, 33, 36, and 52.
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