UNITED STATES PATENT AND TRADEMARK OFFICE
`_____________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________________
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`CREE, INC.
`
`Petitioner
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`v.
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`DOCUMENT SECURITY SYSTEMS, INC.
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`Patent Owner
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`Patent 7,256,486
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`DECLARATION OF YUJI ZHAO, PH.D.
`
`MAIL STOP PATENT BOARD
`Patent Trial and Appeal Board
`United States Patent & Trademark Office
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
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`-1-
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`Cree Ex. 1003
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`_____________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________________
`
`CREE, INC.
`
`Petitioner
`
`v.
`
`DOCUMENT SECURITY SYSTEMS, INC.
`
`Patent Owner
`
`Patent 7,256,486
`
`DECLARATION OF YUJI ZHAO, PH.D.
`
`MAIL STOP PATENT BOARD
`Patent Trial and Appeal Board
`United States Patent & Trademark Office
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
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`Cree Ex. 1003
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`I, Dr. Yuji Zhao, Ph.D. declare as follows:
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`I.
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`INTRODUCTION
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`1.
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`I am over the age of twenty one (21) and am competent to make this
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`Declaration. I reside in the State of Arizona at 973 West Nolan Way, Chandler,
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`Arizona, 85248.
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`2.
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`I am a university professor at Arizona State University and also
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`conduct consulting in light emitting diodes (“LED”) including design and
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`packaging, semiconductor devices, and power electronics.
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`A.
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`3.
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`Engagement
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`I have been retained by counsel for Cree, Inc. in the above-captioned
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`Inter Partes Review (“IPR”) matter as an independent technical expert.
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`4.
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`As part of this engagement, I have been retained to review and
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`evaluate whether certain patents and publications disclose to a person of ordinary
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`skill in the art (“POSA”) the subject matter of specific claims of United States
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`Patent No. 7,256,486 (“the ’486 patent”) as of the time of the filing date of the
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`‘486 patent. I expect to testify regarding the matters set forth in this declaration if
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`asked to do so.
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`5.
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`I am being compensated on an hourly basis for my work performed in
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`connection with this case. I have received no additional compensation for my
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`work in this case, and my compensation does not depend upon the contents of this
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`report, any testimony I may provide, or the ultimate outcome of the case.
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`B.
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`6.
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`Background and Qualifications
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`I have a B.S. in Microelectronics from Fudan University, and an M.S.
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`and Ph.D. in Electrical and Computer Engineering from University of California
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`Santa Barbara (UCSB).
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`7.
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`I have about10 years of experience in the area of GaN light-emitting
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`diodes (LEDs), where I am widely recognized as a leader in the LED field. I have
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`extensive, hands-on experience with LEDs, including epitaxial growth, device
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`fabrication, and packaging. I have served as an Assistant Professor in Electrical
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`Engineering, and I have taught many undergraduate and graduate classes on
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`semiconductor optoelectronics, including LED fabrication and packaging. In
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`addition, I have given numerous invited lectures and seminars on LED devices and
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`packaging technologies for many of the world’s leading LED companies, academic
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`institutes, and professional organizations, such as HC SemiTek, MIT, Stanford
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`University, and IEEE.
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`8.
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`For my graduate studies, I worked with Prof. Shuji Nakamura at
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`UCSB, who is widely-regarded as the inventor of GaN LEDs and received the
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`Nobel Prize in Physics “for the invention of efficient blue light-emitting diodes
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`which has enabled bright and energy-saving white light sources.” While at UCSB,
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`I was a key researcher and a project leader in the Solid State Lighting and Energy
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`Center (SSLEC), which is the world’s leading research center for LEDs with an
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`annual research budget of over $5M. I have personally fabricated, tested, and
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`packaged hundreds of LED devices. I developed improvements to LED packaging
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`structures, and I also analyzed various packing structures including commercial
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`structures from companies such as CREE and Philips Lumileds, as well as a UCSB
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`patented structure “transparent LED packaging”. While at UCSB, I also developed
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`the world’s best GaN blue LEDs with record efficiency at high current densities
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`out to 400A/cm2. This work led to the filing of several patent applications, over
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`100 media reports in six languages (including highlights in Science,
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`Semiconductor Today, and Yahoo), and numerous papers and invited conference
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`presentations, along with recognition from the SSLEC in years 2010 through 2012
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`with the “Outstanding Research Achievement Award.”
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`9.
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`After my Ph.D., I continued my research on LEDs as an Assistant
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`Professor at Arizona State University, where I am currently employed. I am the
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`founder and Director of GaN Device Research Group at Arizona State University,
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`which is funded by DoD, DOE, NASA, SFAz (Science Foundation of Arizona).
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`The focus of the research group is on GaN devices including LEDs. This research
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`group engages over five faculty members, and over twenty postdoctoral
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`researchers and graduate students, and is one of the largest GaN research
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`laboratories in the US, including state of the art equipment and methods to
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`fabricate, analyze and test LED devices and packages.
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`10.
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`I am a member of two of the largest professional engineering
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`societies: the Institute of Electrical and Electronics Engineers, Inc. (“IEEE”) and
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`the Materials Research Society (“MRS”). These professional societies address,
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`among other things, LED materials, devices, and packaging.
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`11.
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`I have served on various conference committees (invited to
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`participate) on leading semiconductor device conferences, including the
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`International Symposium on Semiconductor Light Emitting Devices (ISSLED), the
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`US Workshop on Organometallic Vapor Phase Epitaxy (OMVPE), and the Lester
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`Eastman Conference on High Performance Devices (LEC). All of these
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`conferences have large LED sessions.
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`12.
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`I have written two book chapters on LEDs and over 100 journal and
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`conference publications on various subjects related to semiconductor devices,
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`among which over 50 publications are directly on LEDs. The majority of these
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`publications involve packaged LEDs. Some of my publications (articles and book
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`chapters) on LEDs include:
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`H. Fu and Y. Zhao, “Efficiency Droop in InGaN/GaN LEDs”, Book
`Chapter in “Nitride Semiconductor Light-Emitting Diodes”, 2nd
`edition, Elsevier, (2017);
`C. Y. Huang, Y. Zhao, Y. R. Wu, and J. S. Speck, “Nonpolar and
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`Semipolar LEDs”, Book Chapter in “Nitride Semiconductor Light-
`Emitting Diodes (LEDs): Materials, Technologies and Applications”,
`Woodhead Publishing, (2014);
`Y. Zhao, H. Fu, G. T. Wang, and S. Nakamura, “Toward ultimate
`efficiency: progress and prospects on nonpolar and semipolar InGaN
`light emitting diodes”, Advances in Optics and Photonics, Vol. 10,
`246 (2018);
`Z. Lu, P. Tian, H. Chen, I. Baranowski, H. Fu, X. Huang, J. Montes,
`Y. Fan, H. Wang, X. Liu, R. Liu, and Y. Zhao, “Active tracking
`system for visible light communication using a GaN-based micro-
`LED and NRZ-OOK”, Opt. Express, Vol. 25, 17971 (2017);
`H. Chen, H. Fu, X. Huang, Z. Lu, X. Zhang, J. Montes, and Y. Zhao,
`“Optical cavity effects in InGaN core-shell light-emitting diodes with
`metallic coating”, IEEE Photonics J., Vol. 9, 8200808 (2017);
`H. Fu, Z. Lu, Y. Zhao, “Phase-space filling effect on the modeling of
`low-droop performance of semipolar InGaN light- emitting diodes”,
`AIP Adv., Vol. 6, 065013 (2016);
`H. Chen, H. Fu, X. Huang, Z. Lu, and Y. Zhao, “Optical properties of
`highly polarized InGaN light-emitting diodes modified by metallic
`grating”, Opt. Express, Vol. 24, A856 (2016);
`C. C. Pan, Q. Yan, H. Fu, Y. Zhao, Y. R. Wu, C. G. Van de Walle, S.
`Nakamura, and S. P. DenBaars, “High optical power and low
`efficiency droop blue light-emitting diodes using compositionally
`step-graded InGaN barriers”, Electron. Lett., Vol. 51, 1187 (2015);
`J. Xue, Y. Zhao, S. H. Oh, J. S. Speck, S. P. DenBaars, S. Nakamura,
`and R. J. Ram, “Thermally enhanced blue light-emitting diodes”,
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`Appl. Phys. Lett., Vol. 107, 121109 (2015);
`D. L. Becerra, Y. Zhao, S. H. Oh, C. D. Pynn, K. Fujito, S. P.
`DenBaars, and S. Nakamura, “High-power low-droop violet semipolar
`(30-3-1) InGaN/GaN light-emitting diodes with thick active layer
`design”, Appl. Phys. Lett., Vol. 105, 171106 (2014);
`Y. Zhao, R. M. Farrell, Y. R. Wu, J. S. Speck, “On the optical
`polarization ratio and valance band separation for nonpolar and
`semipolar InGaN quantum well light-emitting devices”, Jpn. J. Appl.
`Phys., Vol. 53, 100206 (2014);
`F. Wu, Y. Zhao, A. E. Romanov, S. P. DenBaars, S. Nakamua, and J.
`S. Speck, “Stacking faults and interface roughening in semipolar (20-
`2-1) grown single InGaN quantum wells for long wavelength light
`emitting diodes”, Appl. Phys. Lett., Vol. 106, 151901 (2014);
`Y. Ji, W. Liu, T. Erdem, R. Chen, S. T. Tan, Z. H. Zhang, Z. Ju, X.
`Zhang, H. Sun, X. W. Sun, Y. Zhao, S. P. DenBaars, S. Nakamura,
`and H. V. Demir, “Comparative study of field-dependent carrier
`dynamics and emission kinetics of InGaN/GaN light-emitting diodes
`grown on (11-22) semipolar versus (0001) polar planes”, Appl. Phys.
`Lett., Vol. 104, 143506 (2014);
`Y. Kawaguchi, S. C. Huang, R. M. Farrell, Y. Zhao, J .S. Speck, S. P.
`DenBaars, and S. Nakamura, “Dependence of electron overflow on
`emission wavelength and crystallographic orientation in single-
`quantum-well III-nitride light- emitting diodes”, Appl. Phys. Express,
`Vol. 6, 052103 (2013);
`S. P. DenBaars, D. Feezell, K. Kelchner, S. Pimputkar, C. C. Pan, C.
`C. Yen, S. Tanaka, Y. Zhao, N. Pfaff, R. Farrell, M. Iza, S. Keller, U.
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`Mishra, J. S. Speck, and S. Nakamura, “Development of gallium-
`nitride-based light-emitting diodes (LEDs) and laser diodes for energy
`efficient lighting and displays”, Acta Mater., Vol. 61, 945 (2013);
`Y. Zhao, S. H. Oh, F. Wu, Y. Kawaguchi, S. Tanaka, K. Fujito, J. S.
`Speck, S. P. DenBaars, and S. Nakamura, “Green semipolar (20-2-1)
`InGaN light-emitting diodes with small wavelength shift and narrow
`spectral width”, Appl. Phys. Express Vol. 6, 062102 (2013);
`Y. Zhao, Q. Yan, D. Feezell, K. Fujito, C. G. Van de Walle, J. S.
`Speck, S. P. DenBaars, and S. Nakamura, “Optical polarization
`characteristics of semipolar (30-31) and (30-3-1) InGaN/GaN light-
`emitting diodes”, Opt. Express, Vol. 21, A53 (2013);
`Y. Kawaguchi, C. Y. Huang, Y. R. Wu, Y. Zhao, S. P. DenBaars, and
`S. Nakamura, “Semipolar single-quantum-well red light-emitting
`diodes with a low forward voltage”, Jpn. J. Appl. Phys., Vol. 52,
`08JC08 (2013);
`C. C. Pan, T. Gilberto, N. Pfaff, S. Tanaka, Y. Zhao, D. Feezell, J. S.
`Speck, S. Nakamura, and S. P. DenBaars, “Reduction in thermal
`droop using thick quantum well structure in semipolar (20-2-1) blue
`light-emitting diodes”, Appl. Phys. Express, Vol. 5, 102103 (2012);
`Kawaguchi, C. Y. Huang, Y. R. Wu, Q. Yen, C. C. Pan, Y. Zhao, S.
`Tanaka, K. Fujito, D. Feezell, C. G. Van de Walle, S. P. DenBaars,
`and S. Nakamura, “Influence of polarity on carrier transport in
`semipolar (20-2-1) and (20-21) multiple-quantum-well light-emitting
`diodes”, Appl. Phys. Lett., Vol. 100, 231110 (2012);
`C. C. Pan, S. Tanaka, F. Wu, Y. Zhao, J. S. Speck, S. Nakamura, S. P.
`DenBaars, and D. Feezell, “High-power, low- efficiency-droop (20-2-
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`1) single-quantum-well blue light-emitting diodes”, Appl. Phys.
`Express, Vol. 5, 062103 (2012);
`J. J. Richardson, I. Koslow, C. C. Pan, Y. Zhao, J. S. Ha, and S.
`DenBaars, “Semipolar single-crystal ZnO films deposited by low-
`temperature aqueous solution phase epitaxy on GaN light-emitting
`diodes”, Appl. Phys. Express, Vol. 4, 126502 (2011);
`C. Y. Huang, Q. Yan, Y. Zhao, D. Feezell, K. Fujito, C. G. Van de
`Walle, J. S. Speck, S. P. DenBaars, and S. Nakamura, “Influence of
`Mg-doped barriers on semipolar multi-quantum-well light-emitting
`diodes”, Appl. Phys. Lett., Vol. 99, 141114 (2011);
`Y. Zhao, S. Tanaka, Q. Yan, C. Y. Huang, R. B. Chung, C. C. Pan, K.
`Fujito, D. Feezell, C. G. Van de Walle, J. S. Speck, S. P. DenBaars,
`and S. Nakamura, “High optical polarization ratio from semipolar (20-
`2-1) blue-green InGaN/GaN light- emitting diodes”, Appl. Phys. Lett.,
`Vol. 99, 051109 (2011);
`Y. Zhao, S. Tanaka, C. C. Pan, K. Fujito, D. Feezell, J. S. Speck, S. P.
`DenBaars, and S. Nakamura, “High-power blue- violet semipolar (20-
`2-1) InGaN/GaN light-emitting diodes with low efficiency droop at
`200 A/cm2”, Appl. Phys. Express, Vol. 4, 082104 (2011);
`S. Tanaka, Y. Zhao, I. Koslow, C. C. Pan, H. T. Chen, J. Sonoda, S. P.
`DenBaars, and S. Nakamura, “Droop improvement in high current
`range on PSS-LEDs”, Electron. Lett., Vol. 47, 335 (2011);
`S. Yamamoto, Y. Zhao, C. C. Pan, R. B. Chung, K. Fujito, J. Sonoda,
`S. P. DenBaars, and S. Nakamura, “High- efficiency single-quantum-
`well green and yellow-green light-emitting diodes on semipolar (20-
`21) GaN substrates”, Appl. Phys. Express, Vol. 3, 122102 (2010);
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`Y. Zhao, J. Sonoda, C. C. Pan, S. Brinkley, I. Koslow, H. Ohta, S. P.
`DenBaars, and S. Nakamura, “30-mW-class high- power and high-
`efficiency blue semipolar (10-1-1) InGaN/GaN light-emitting diodes
`obtained by backside roughening technique”, Appl. Phys. Express,
`Vol. 3, 102101 (2010);
`Y. Zhao, J. Sonada, I. Koslow, C. C. Pan, H. Ohta, J. S. Ha, S. P.
`DenBaars, and S. Nakamura, “Optimization of device structure for
`bright blue semipolar (10-1-1) light emitting diodes via metalorganic
`chemical vapor deposition”, Jpn. J. Appl. Phys., Vol. 49, 070206
`(2010).
`13. My publications in LEDs have generated significant impacts in the
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`LED field, resulted in numerous “Best Paper Award”, “Editor’s Pick of the Year”,
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`“Research Highlights”, “Top Cited Paper of the Year”, and were featured in over
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`100 media reports. Some of the media reports on my LED research include:
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`Thermophotonics: LEDs feed on waste heat, Nature Photonics, Nov
`2015;
`Overcoming the “green gap”, Nature Photonics, Jul 2013;
`Semipolar planes delivers stable green LEDs, Compound
`Semiconductor, Aug 2013;
`How LED got their shine back, Science, May 2012;
`Conquering LED efficiency droop, Optical Society of America (OSA),
`Apr 2012;
`New LED design drops the droop, Photonics, May 2012;
`LEDs más eficientes para el hogar, Sustentator, Spanish, May 2012;
`Special substrates help LEDs shine brighter without losing efficiency,
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`Daily Tech, May 2012.
`Reducing LED droop at high current, Semiconductor Today, Jul 2011
`Blue semipolar LEDs now comparable to conventional c-plane
`devices, Laser Focus World, Nov 2010
`UCSB achieves semi-polar light extraction comparable to
`conventional LEDs, Semiconductor Today, Sep 2010
`I have over 10 patents and patent applications.
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`In 2010 through 2012, I received the UCSB Outstanding Research
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`14.
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`15.
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`Achievement Award for contributions to fabrication and packaging of high
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`performance LEDs. In 2015, I received the Bisgrove Scholar Faculty Award for
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`research work in developing LEDs for lighting, communication, and medical
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`applications. In 2015, I received the NASA Early Career Faculty Award. In 2016, I
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`received the DoD DTRA Young Investigator Award. In 2017, I received the
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`Arizona State University Fulton Outstanding Assistant Professor Award for
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`research work in GaN devices including LEDs. In 2017, I was selected as an
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`honorable Faculty Scientist to showcase NASA research to Congress at Capitol
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`Hill, where I reported my research to Rep. Lamar Smith, the Chairman of the
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`Congress Committee on Science, Space, and Technology.
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`16. A detailed description of my professional qualifications, including a
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`listing of my specialties/expertise and professional activities, is contained in my
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`curriculum vitae, a copy of which is provided as Exhibit 1014.
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`C. Basis of My Opinions and Materials Considered
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`17.
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`In forming my opinions, I have relied upon my education, knowledge
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`and experience with LED technology, design, fabrication including epitaxial
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`growth and metallization, and packaging. My opinions are also based my study of
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`the patent at issue, its file history, and the prior art cited therein. In forming my
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`opinions, I have reviewed all materials listed in the attached List of Exhibits
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`(Attachment A).
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`18.
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`I have also been asked to compare the subject matter disclosed by
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`certain patent literature and publications to claims 1-4 of the ‘486 patent and
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`determine whether those printed publications taught the claimed subject matter to a
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`person of ordinary skill (“POSA”) prior to the filing date of the ‘486 patent, which
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`I have been instructed to assume is June 27, 2003 for purposes of my analysis.
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`Among the documents I have analyzed relative to subject matter claimed in the
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`‘486 patent are those listed below, which are all in the same technical field,
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`namely, LED technology:
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` Japanese Patent Application Publication No. 2001-308388 (Ex. 1016,
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`“Ishinaga”);
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` U.S. Patent No. 5,177,593(Ex. 1017, “Abe”);
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` U.S. Patent No. 6,791,119 (Ex. 1012, “Slater”).
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`19.
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`I may rely upon these materials and other materials to rebut arguments
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`that may be raised by the patent owner. I may also consider other documents not
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`yet have been provided to me in further forming my opinions.
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`20.
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`I expect my analysis to be ongoing, and I will continue to review any
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`new information provided to me. This declaration presents the opinions I have
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`formed to the present time, I reserve the right to revise, supplement, and/or amend
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`my opinions stated in this declaration based on any new information that I may be
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`asked to review and based on my continuing analysis of the materials already
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`provided to me.
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`II.
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`PATENT PRINCIPLES
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`21.
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`I am an engineer, and the opinions I express in this declaration
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`involve the application of my engineering knowledge and experience to the
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`evaluation of certain prior art with respect to the ‘486 patent. I am not a lawyer
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`and have not been trained in the law of patents. Therefore, I have requested the
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`attorneys from Jones Day, who represent Cree, to provide me with guidance as to
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`the applicable patent law in this matter. The paragraphs below express my
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`understanding of how I must apply current legal principles related to patent
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`validity to my analysis.
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`22.
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`It is my understanding that in determining whether a patent claim for
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`an unexpired patent under post-grant review before the United States Patent Office
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`(PTO) is anticipated or obvious in view of the prior art, the PTO must construe the
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`claim by giving the claim its broadest reasonable interpretation consistent with the
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`specification and the prosecution history. For purposes of this review, I have
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`interpreted each claim term in accordance with is the plain meaning and ordinary
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`meaning under the required broadest reasonable interpretation, taking into account
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`the prosecution history and whatever guidance, such as through definitions, may be
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`provided by the written description in the patent, without importing limitations
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`from the specification into the claims. However, even if narrower yet reasonable
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`interpretations were taken for certain terms, my analysis would still be applicable,
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`as explained in detailed analysis included herein.
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`23.
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`It is my understanding that a claim is anticipated under 35 U.S.C. §
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`102 if each and every limitation of the claim is disclosed in a single prior art
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`reference, either expressly or inherently. I understand inherent disclosure to mean
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`that the claim feature necessarily flows from the disclosure of the prior art
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`reference. I understand that a claim is unpatentable under 35 U.S.C. § 103 if the
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`claimed subject matter as a whole would have been obvious to a POSA at the time
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`of the alleged invention, which I have been instructed to treat at present as the
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`filing date of the ‘486 patent. I also understand that an obviousness analysis takes
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`into account the scope and content of the prior art, the differences between the
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`claimed subject matter and the prior art, and the level of ordinary skill in the art at
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`the time of the invention.
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`24. Finally, I understand that I am to consider any known secondary
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`evidence that might show nonobviousness of the application, such as long felt but
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`unfulfilled need for the claimed invention, failure by others to come up with the
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`claimed invention, commercial success of the claimed invention, praise of the
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`invention by others in the field, unexpected results achieved by the invention, the
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`taking of licenses under the patent by others, expressions of surprise by experts and
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`those skilled in the art at the making of the invention, and the patentee proceeded
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`contrary to the conventional wisdom of the prior art. But the secondary evidence
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`must be tied specifically to claim features that are argued to be patentable, and not
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`those already in the public domain. I appreciate that secondary considerations
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`must be assessed as part of the overall obviousness analysis (i.e., as opposed to
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`analyzing the prior art, reaching a tentative conclusion, and then assessing whether
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`objective indicia alter that conclusion).
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`25. Based on these principles, I understand that not all innovations are
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`patentable. Even if a claimed product or method is not explicitly described in its
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`entirety in a single prior art reference, the patent claim will still be denied if the
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`claim would have been obvious to a POSA at the time of the patent application
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`filing.
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`26.
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`In determining the scope and content of the prior art, it is my
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`understanding that a reference is considered appropriate prior art if it falls within
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`the field of the inventor’s endeavor. In addition, a reference is prior art if it is
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`reasonably pertinent to the particular problem with which the inventor was
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`involved. A reference is reasonably pertinent if it logically would have
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`commended itself to an inventor’s attention in considering his problem. If a
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`reference relates to the same problem as the claimed invention, that supports use of
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`the reference as prior art in an obviousness analysis.
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`27. To assess the differences between prior art and the claimed subject
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`matter, it is my understanding that 35 U.S.C. § 103 requires the claimed invention
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`to be considered as a whole. This “as a whole” assessment requires showing that
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`one of ordinary skill in the art at the time of invention, confronted by the same
`
`problems as the inventor and with no knowledge of the claimed invention, would
`
`have selected the elements from the prior art and combined them in the claimed
`
`manner.
`
`28.
`
`In determining whether the subject matter as a whole would have been
`
`considered obvious at the time that the patent application was filed, by a POSA, I
`
`have been informed of several principles regarding the combination of elements of
`
`the prior art. First, a combination of familiar elements according to known
`
`methods is likely to be obvious when it yields predictable results. Likewise,
`
`
`
`-16-
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`Cree Ex. 1003
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`
`
`combinations involving simple substitution of one known element for another to
`
`obtain predictable results, a predictable use of prior art elements according to their
`
`established functions, applying a known technique to a known device (method or
`
`product) ready for improvement to yield predictable results, and choosing from a
`
`finite number of identified, predictable solutions to solve a problem are likely to be
`
`obvious. Thus, if a POSA can implement a “predictable variation” in a prior art
`
`device, and would see the benefit from doing so, such a variation would be
`
`obvious. Also, when there is pressure to solve a problem and there are a finite
`
`number of identifiable, predictable solutions, it would be reasonable for a POSA to
`
`pursue those options that fall within his or her technical grasp. If such a process
`
`leads to the claimed invention, then the latter is not an innovation, but more the
`
`result of ordinary skill and common sense.
`
`29.
`
`I also understand that the “teaching, suggestion, or motivation” test is
`
`a useful guide in establishing a rationale for combining elements of the prior art.
`
`This test poses the question as to whether there is an explicit teaching, suggestion,
`
`or motivation in the prior art to combine prior art elements in a way that realizes
`
`the claimed invention. Though useful to the obviousness inquiry, I understand that
`
`this test should not be treated as a rigid rule. It is not necessary to seek out precise
`
`teachings; it is permissible to consider the inferences and creative steps that a
`
`
`
`-17-
`
`Cree Ex. 1003
`
`
`
`POSA (who is considered to have an ordinary level of creativity and is not an
`
`“automaton”) would employ.
`
`30.
`
`It is my understanding that when interpreting the claims of the ‘486
`
`patent I must do so based on the perspective of one of ordinary skill in the art at the
`
`relevant priority date. My understanding is that the earliest priority date of the
`
`‘486 patent is June 27, 2003.
`
`III. TECHNOLOGY BACKGROUND
`
`31. LED lighting devices are undergoing rapid adoption as light sources
`
`in a host of applications including residential lighting, commercial lighting,
`
`automobile lighting, signal lighting, etc. An LED die (also called an LED chip)
`
`uses a semiconductor to convert electricity into light. The LED die is often small
`
`in light emitting area, e.g., about one square millimeter. An LED device
`
`conventionally may include one or more LED die, which are typically packaged in
`
`a protective structure called an LED package. The package typically includes a
`
`housing or substrate, electrical connections, protective light-transmitting
`
`encapsulant, and often a heat sink for dissipating heat from the LED die to outside
`
`the package.
`
`32. LED die conventionally include two or more types of semiconductor
`
`materials, which form a junction or active region that emits light, as well as
`
`electrical contacts connected to leads or other electrical connections for providing
`
`
`
`-18-
`
`Cree Ex. 1003
`
`
`
`power to the LED die. The junction is an interface between “p-type”
`
`semiconductor material, which has a deficiency of electrons (resulting in “holes”),
`
`and “n-type” semiconductor material, which has an excess of electrons. Put
`
`another way, the n-type material supplies carriers that are electrons, and the p-type-
`
`materials supplies carriers that are holes. Electrical contacts connected to the
`
`device permit the electrons and holes to recombine, and permit an electrical current
`
`to flow through the junction. The recombination of electrons and holes causes
`
`emission of light in a certain wavelength, e.g., red, orange, blue, ultraviolet (UV)
`
`wavelengths, etc.
`
`33. The electrical contacts to the LED die are called the anode and the
`
`cathode. The anode is an electrical conductor that connects to the p-type
`
`semiconductor of the LED die, while the cathode is an electrical conductor that
`
`connects to the n-type semiconductor of the LED die. The electrons enter the LED
`
`die through the cathode and exit through the anode. This provides current through
`
`the LED device that permits the device to operate as intended and emit light when
`
`powered. An LED cannot function without an anode and a cathode. Electrical
`
`connections to the n-type semiconductor region and the p-type semiconductor
`
`region conventionally have been provided for many years via thin metal layers
`
`deposited onto those regions (called metallization layers, or just metallization), to
`
`which bond wires or other electrical connections (e.g., solder bumps) can be made.
`
`
`
`-19-
`
`Cree Ex. 1003
`
`
`
`Due to some variation in terminology in the art, the metal layer in contact with the
`
`n-type material may be referred to as the cathode, or the electrical connection to
`
`that metal layer may be referred to as the cathode, or both. Similarly, the metal
`
`layer in contact with the p-type material may be referred to as the anode, or the
`
`electrical connection to that metal layer may be referred to as the anode, or both.
`
`Also, the metal layer or layers in contact with the n-type material, and the metal
`
`layer or layers in contact with the p-type material, are often referred to as
`
`electrodes. Also, for many years, such metal layers for the anode and
`
`conventionally have been made thin enough to also be light transmissive.
`
`Additionally, there conventionally may be a transparent and electrically conducting
`
`layer of indium-tin-oxide (or ITO) between the p-type region and the metallization
`
`layer. A variety of metals conventionally may be used for such metallization
`
`layers, such as, e.g., Ti, Al, Ni, Au, multilayers thereof, alloys thereof, etc.
`
`34. To effectively implement the use of LED die as light sources, the
`
`individual LED die need to be “packaged” by assembling them into a protective
`
`package that permits electrical connection to a power source. Generally, the LED
`
`package provides a housing or substrate, a reflector that may be provide by a
`
`suitable shape of the housing or substrate, electrical leads, a transparent optical
`
`window for the light to escape, encapsulation materials, and in some cases a
`
`thermal path for heat dissipation, e.g., heat sink.
`
`
`
`-20-
`
`Cree Ex. 1003
`
`
`
`35. There are a variety of methods for packaging LED devices. In one
`
`example, LED die can be simply die-bonded or soldered to a surface of a substrate,
`
`such as a printed circuit board (PCB), and electrical connections, such as bond
`
`wires, may connect the anode and the cathode of the LED die to corresponding
`
`electrical leads of the package. In another example, a lead-frame and associated
`
`housing may be used to package the LED die. In a lead-frame package, a plastic
`
`housing is typically molded around a metal frame that has electrical leads, e.g., by
`
`injection molding, providing a cavity in which to mount the LED die, and
`
`providing electrical connections to the electrical leads of the lead frame.
`
`36. LED die may be structured to have both the anode and cathode at the
`
`same side of the LED die. Such LED die can be packaged with two top electrical
`
`contacts with bond wires connecting the top electrical contacts of the LED die to
`
`electrical connections of the package. This configuration can be considered a
`
`“face-up” configuration. Alternatively, such LED die may be packaged such that
`
`the anode and cathode both face the package substrate. This configuration may be
`
`considered a “face-down” or “flip-chip” configuration.
`
`37. Alternatively, LED die may be configured such that the anode is at
`
`one side of the LED die and the cathode is at the opposing side of the LED die.
`
`This type of structure for LED die is often called a vertical LED structure, since it
`
`requires current to flow vertically through the die (relative to the planes of the
`
`
`
`-21-
`
`Cree Ex. 1003
`
`
`
`layer structure of the LED die). Such LED die may be packaged such that a bond
`
`wire connects the one top electrical lead to an electrical connection of the package,
`
`and such that the second electrical connection is achieved by an electrical
`
`connection of the bottom of the LED die to another electrical connection of the
`
`package.
`
`38. To save space and permit ease of mounting, it has long been
`
`conventional practice to provide electrical connections of the LED package at the
`
`bottom of the package, e.g., by providing electrical leads in a bent-down
`
`configuration along sides of the package, or by providing the electrical
`
`interconnections through the substrate in the form of vias.
`
`39. Red (R), green (G), and blue (B) LED die may be packaged together
`
`such that their combined emission is perceived by the human eye as white light.
`
`LED devices alternatively may include a phosphor material that absorbs light
`
`radiation emitted from an LED die and then reemits visible light of a different
`
`wavelength. For instance, a GaN-based LED die may emit blue light, and a
`
`phosphor material located nearby may absorb a portion of that light and may
`
`reemit light of a broader range of wavelengths, e.g., green, yellow, orange and red
`
`(depending on the type of phosphor). The combination of unabsorbed blue light
`
`from the LED die and light emitted from the phosphor may be perceived by the
`
`human eye as white light.
`
`
`
`-22-
`
`Cree Ex. 1003
`
`
`
`40. When high-power LED devices became readily available in the late
`
`1990’s, the problem of managing the significant heat generated by these LED
`
`devices became a concern in
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