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`Cree Ex. 1008
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`
`
`(19) Japan Patent Office (JP)
`
`(12) Japanese Unexamined Patent
`Application Publication (A)
`
`
`(11) Japanese Unexamined Patent
`Application Publication Number
`2003-17754
`(P2003-17754A)
`(43) Publication date: January 17, 2003 (1.17.2003)
`Theme codes (reference)
`
`(51) Int. Cl.7
`
`Identification codes
`
` FI
`
`
`
`Request for examination: Not yet requested Number of claims: 2 OL (Total of 6 pages)
`
`(21) Application number
`
`
`Japanese Patent Application
`2001-203272 (P2001-
`203272)
`
`(22) Date of application
`
`July 4, 2001 (7.4.2001)
`
`
`
`
`
`
`
`
`
`
`
`
`
`(71) Applicant
`
`000116024
`ROHM Co., Ltd.
`21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto-shi,
`Kyoto-fu
`Hiromoto ISHINAGA
`℅ ROHM Co., Ltd., 21 Saiin Mizosaki-cho,
`Ukyo-ku, Kyoto-shi, Kyoto-fu
`100090181
`Patent Attorney Yoshihito YAMADA (and 1 other)
`F terms (reference)
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`(72) Inventor
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`(74) Agent
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`(54) (TITLE OF THE INVENTION) SURFACE MOUNT TYPE SEMICONDUCTOR DEVICE
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`(57) (ABSTRACT)
`(CONSTITUTION) A front surface side opening end 14a and a
`rear surface side opening end 14b of a first through-hole 14
`are disposed within the respective planes of a die bonding
`electrode 18 and a first surface mount electrode 22 formed
`on a substrate 12, and an LED chip 30 is bonded on the die
`bonding electrode 18. As a result, a space for forming the
`die bonding electrode 18 on the substrate 12 and a space for
`electrically connecting the die bonding electrode 18 and the
`first surface mount electrode 22 can be shared, so the
`horizontal width of the substrate 12 can be reduced by the
`shared amount. The first surface mount electrode 22 can be
`connected to a wiring pattern 40a of a circuit board 38 with
`solder 42a, so it is unnecessary to secure a space for
`soldering in addition to the space for mounting a light-
`emitting device 10 to the circuit board 38.
`(EFFECT) The mounting density of a surface mount type
`light-emitting device on a circuit board can be enhanced
`beyond conventional levels.
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`Cree Ex. 1008
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`Page 7
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`(SCOPE OF THE PATENT CLAIMS)
`(CLAIM 1) A surface mount type semiconductor device
`comprising:
`a substrate;
`a die bonding electrode and a wire bonding electrode
`formed on a front surface of the substrate;
`a semiconductor element chip die-bonded to the die
`bonding electrode;
`a wire for electrically connecting the semiconductor
`element chip and the wire bonding electrode;
`first and second surface mount electrodes formed on a rear
`surface of the substrate;
`a first through-hole passing through the substrate so that
`opening ends on both sides are disposed within the
`respective planes of the die bonding electrode and the first
`surface mount electrode;
`a second through-hole passing through the substrate so that
`opening ends on both sides are disposed within the
`respective planes of the wire bonding electrode and the
`second surface mount electrode;
`a first connection electrode formed inside the first through-
`hole so as to electrically connect the die bonding electrode
`and the first surface mount electrode; and
`a second connection electrode formed inside the second
`through-hole so as to electrically connect the wire bonding
`electrode and the second surface mount electrode.
`(CLAIM 2) The surface mount type semiconductor device
`according to Claim 1, wherein the semiconductor element
`chip is a top surface light-emitting type light-emitting
`element chip sealed by a covering part made of a
`translucent resin.
`(DETAILED DESCRIPTION OF THE INVENTION)
`(0001)
`(FIELD OF INDUSTRIAL APPLICATION) The present invention
`relates to a surface mount type semiconductor device, and
`more particularly to a surface mount type semiconductor
`device in which a die bonding electrode and a wire bonding
`electrode formed on the front surface of a substrate
`included in a light-emitting diode, a transistor, or the like,
`for example, and first and second surface mount electrodes
`formed on
`the rear surface
`thereof are electrically
`connected by connection electrodes formed in through-
`holes so as to correspond to one another.
`(0002)
`a
`example of
`(CONVENTIONAL TECHNOLOGY) An
`conventional surface mount type semiconductor light-
`emitting device is illustrated in FIGS. 3 and 4. This surface
`mount type semiconductor light-emitting device (simply
`called “light-emitting device” hereinafter) 1 includes a
`substrate 2, and a pair of electrodes 3 and 4 are formed at
`each of the ends 2a and 2b of the substrate 2. The
`electrodes 3 and 4 respectively include terminal parts 3a
`and 4a, and a wire bonding electrode 3b and a drawer part 4
`are formed in the center of the width directions of each of
`the terminal parts 3a and 4a. A die bonding electrode 4c is
`formed at the tip of the drawer part 4b.
`(0003) A semiconductor light-emitting element chip (called
`an “LED chip” hereinafter) 6 is die-bonded to the die
`bonding electrode 4c, and a bottom surface electrode
`thereof is electrically connected to the electrode 4. A top
`surface electrode of the LED chip 6 and the wire bonding
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`Japanese Unexamined Patent Application Publication 2003-17754
`(2)
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`electrode 3b of the electrode 3 are then electrically
`connected via a wire 5. Further, the wire bonding electrode
`3b, the drawer part 4b, the die bonding electrode 4c, the
`wire 5, the LED chip 6, and the like are sealed by a
`covering part 7 made of a translucent synthetic resin.
`(0004) In such a light-emitting device 1, the side surface
`parts 3e and 4e of each of the terminal parts 3a and 4b as
`well as wiring patterns 8a and 8b of a circuit board 8 are
`electrically connected by solder 9a and 9b, respectively.
`Note that the respective terminal parts 3a and 4a consist of
`front surface parts 3d and 4d formed on the front surface of
`the substrate 2, side surface parts 3e and 4e formed on the
`side surfaces of the substrate 2, and rear surface parts 3f
`and 4f formed on the rear surface of the substrate 2.
`(0005)
`(PROBLEM TO BE SOLVED BY THE INVENTION) However, as
`illustrated in FIG. 4, in the case of the conventional light-
`emitting device 1, the respective ends 2a and 2b of the
`substrate 2 are formed so as to project further outward than
`each of the side surfaces of the cover part 7, so the
`projection amounts L1 and L2 of the respective ends 2a and
`2b are a cause of an increase in the horizontal width of the
`light-emitting device 1. The respective side surface parts 3e
`and 4e of each of the terminal parts 3a and 4a as well as the
`wiring patterns 8a and 8b of the circuit board 8 are
`electrically connected by solder 9a and 9b, so spaces L3
`and L4 for the solder 9a and 9b are required on the circuit
`board 8. In this way, in the case of the conventional light-
`emitting device 1, the horizontal width increases by L1 and
`L2, and the spaces L3 and L4 for the solder 9a and 9b are
`required on the circuit board 8, which obstructs increases in
`the mounting density of the light-emitting device 1 or the
`like mounted on the circuit board 8.
`(0006) Therefore, a main purpose of the present invention
`is to provide a surface mount type semiconductor device
`which makes it possible to reduce the horizontal width of
`the surface mount type semiconductor device and which
`does not require a space for solder on the circuit board.
`(0007)
`(MEANS FOR SOLVING THE PROBLEM) The first invention is a
`surface mount type semiconductor device comprising: a
`substrate; a die bonding electrode and a wire bonding
`electrode formed on a front surface of the substrate; a
`semiconductor element chip die-bonded to the die bonding
`electrode; a wire
`for electrically connecting
`the
`semiconductor element chip and
`the wire bonding
`electrode; first and second surface mount electrodes formed
`on a rear surface of the substrate; a first through-hole
`passing through the substrate so that opening ends on both
`sides are disposed within the respective planes of the die
`bonding electrode and the first surface mount electrode; a
`second through-hole passing through the substrate so that
`opening ends on both sides are disposed within the
`respective planes of the wire bonding electrode and the
`second surface mount electrode; a first connection
`electrode formed inside the first through-hole so as to
`electrically connect the die bonding electrode and the first
`surface mount electrode; and a second connection electrode
`formed inside the second through-hole so as to electrically
`connect the wire bonding electrode and the second surface
`mount electrode.
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`Cree Ex. 1008
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`Page 8
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`(0008)
`(OPERATION) With the present invention, the respective
`opening ends on both sides of the first through-hole are
`disposed within the respective planes of the die bonding
`electrode and the first surface mount electrode, and the die
`bonding electrode and the first surface mount electrode are
`electrically connected by the first connection electrode
`formed inside the first through-hole. As a result, the space
`for forming the die bonding electrode on the substrate and
`the space for electrically connecting the die bonding
`electrode and the first surface mount electrode can be
`shared. Therefore, it is unnecessary to separately secure a
`space for connecting the die bonding electrode and the first
`surface mount electrode (space L2 corresponding to the end
`2b illustrated in FIG. 4) in addition to the space for forming
`the die bonding electrode, and the dimensions of the
`substrate in the plane direction can be reduced by this
`amount.
`(0009) Further, the respective opening ends on both sides
`of the second through-hole are disposed within the
`respective planes of the wire bonding electrode and the
`second surface mount electrode, and the wire bonding
`electrode and the second surface mount electrode are
`electrically connected by the second connection electrode
`formed inside the second through-hole. As a result, the
`space for forming the wire bonding electrode on the
`substrate and the space for electrically connecting the wire
`bonding electrode and the second surface mount electrode
`can be shared. Therefore, it is unnecessary to separately
`secure a space for connecting the wire bonding electrode
`and
`the second surface mount electrode (space L1
`corresponding to the end 2a illustrated in FIG. 4) in
`addition to the space for forming the wire bonding
`electrode, and the dimensions of the substrate in the plane
`direction can be reduced by this amount.
`(0010) In addition, since the first and second surface mount
`electrodes formed on the rear surface of the substrate are
`electrically connected to wiring patterns formed on the
`circuit board, it is unnecessary to secure spaces L4 and L3
`for the solder 9b and 9a illustrated in FIG. 4 on the circuit
`board in addition to the space for mounting the surface
`mount type semiconductor device.
`(0011)
`(EFFECT OF THE INVENTION) With the present invention, the
`dimensions of the substrate in the plane direction can be
`reduced by spaces L1 and L2 corresponding to the ends 2a
`and 2b of
`the conventional
`light-emitting device 1
`illustrated in FIG. 4, and it is possible to eliminate the need
`for spaces L3 and L4 for solder 9a and 9b on the circuit
`board. Therefore, the mounting density of the surface
`mount type semiconductor device mounted on the circuit
`board can also be increased.
`(0012) The aforementioned object, other objects, features,
`and advantages of the present invention described above
`will become clearer from the following detailed description
`of an example given with reference to the drawings.
`(0013)
`(EXAMPLE) A surface mount type semiconductor light-
`emitting device (simply called “light-emitting device”
`hereinafter) 10 of this example illustrated in FIGS. 1 and 2
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`Japanese Unexamined Patent Application Publication 2003-17754
`(3)
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`is suitable for the lighting or the like of a mobile electronic
`device such as a mobile telephone or PHS, and the device
`includes an insulating substrate 12. The substrate 12 is
`made of a BT resin prepared by impregnating a glass cloth
`or the like with a heat-resistant BT resin, a glass epoxy, or
`the like, and the size of the substrate (depth × width ×
`thickness) is set as small as approximately 1.25 mm × 2.00
`mm × 0.8 mm or approximately 0.8 mm × 1.6 mm × 0.8
`mm, for example, to meet the demands for miniaturization
`in recent years. This light-emitting device 10 is obtained by
`providing multiple light-emitting element chips (called
`“LED chips” hereinafter) or the like in the form of a matrix
`in the depth direction and the width direction on a substrate
`base material of a size of approximately 10 cm × 5 cm, and
`then cutting the substrate base material.
`(0014) A pair of a first through-hole 14 and a second
`through-hole 16 passing through the substrate 12 with
`space therebetween are provided in the substrate 12. Front
`surface side opening ends 14a and 16a of the first and
`second through-holes 14 and 16, which respectively open
`on the front surface of the substrate 12, are disposed within
`the respective planes of a die bonding electrode 18 and a
`wire bonding electrode 20 formed on the front surface of
`the substrate 12 and are respectively covered by the
`corresponding electrodes 18 and 20. The front surface side
`opening ends 14a and 16a of the respective through-holes
`14 and 16 are positioned in the center of each of the
`electrodes 18 and 20. In addition, rear surface side opening
`ends 14b and 16b of the first and second through-holes 14
`and 16, which respectively open on the rear surface of the
`substrate 12, are disposed within the respective planes of a
`first surface mount electrode 22 and a second surface
`mount electrode 24 formed on the rear surface of the
`substrate 12 and are
`respectively covered by
`the
`corresponding electrodes 22 and 24. The rear surface side
`opening ends 14b and 16b of the respective through-holes
`14 and 16 are also positioned in the center of each of the
`first and second surface mount electrodes 22 and 24.
`(0015) In addition, a first connection electrode 26 and a
`second connection electrode 28 are formed on
`the
`respective inner peripheral surfaces of the first and second
`through-holes 14 and 16. The first connection electrode 26
`is electrically connected to the die bonding electrode 18
`and the first surface mount electrode 22. The second
`connection electrode 28 is electrically connected to the wire
`bonding electrode 20 and the second surface mount
`electrode 24.
`(0016) A top surface light-emitting type LED chip 30 is
`placed on and die-bonded to the top surface of the die
`bonding electrode 18. A bottom surface electrode of this
`LED chip 30 and the die bonding electrode 18 are
`electrically connected. In addition, a front surface electrode
`30a of the LED chip 30 and the wire bonding electrode 20
`are wire-bonded with a wire 32 such as a gold wire. A
`covering part 34 made of a translucent synthetic resin (for
`example, an epoxy resin) is mounted on the entire upper
`surface of the substrate 12. The LED chip 30, the wire 32,
`the die bonding electrode 18, and the wire bonding
`electrode 20 are sealed by this covering part 34, and light is
`emitted through this covering part 34 primarily from the
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`Cree Ex. 1008
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`Page 9
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`top surface.
`(0017) In addition, as illustrated in FIG. 1(B), the planar
`shapes of each of the LED chip 30, the die bonding
`electrode 18, and the wire bonding electrode 20 are roughly
`square. The planar shape of the die bonding electrode 18 is
`formed to be slightly larger than the planar shapes of the
`LED chip 30 and the wire bonding electrode 20. As
`illustrated in FIG. 2, the planar shapes of the first and
`second surface mount electrodes 22 and 24 are roughly
`square and are the same size as the die bonding electrode
`18. The planar shape of the substrate 12 is rectangular. The
`centers of the respective first and second through-holes 14
`and 16 are positioned on a center line 36 of the substrate 12
`parallel to the horizontal width direction of the substrate 12.
`In addition, from the perspective of the planar direction, the
`die bonding electrode 18, the first surface mount electrode
`22, and the LED chip 30 are respectively disposed so that
`the respective centers thereof are positioned in the center of
`the first through-hole 14. Further, the wire bonding
`electrode 20 and the second surface mount electrode 24 are
`respectively disposed so that the respective centers thereof
`are positioned in the center of the second through-hole 16.
`The substrate 12, the LED chip 30, the die bonding
`electrode 18, the wire bonding electrode 20, and the first
`and second surface mount electrodes 22 and 24 are
`disposed so that components of corresponding edges are
`parallel to one another when viewed from the planar
`direction.
`(0018) Here, as illustrated in FIG. 1(B), the length M1 of
`one edge of the die bonding electrode 18 is greater than the
`length M2 of one edge of the LED chip 30. This increased
`amount is a margin for making it possible to reliably bond
`the LED chip 30 to the die bonding electrode 18, even if
`the bonding position of the LED chip 30 is displaced
`slightly, and for ensuring that the conductive adhesive
`bonding the two components together does not flow onto
`the substrate 12. The increase is made with the lowest
`margin necessary. Spaces N1 and N2 between
`the
`respective side surfaces 12a and 12b on the left and right
`sides of the substrate 12 and each of the side edges of the
`die bonding electrode 18 and the wire bonding electrode 20
`adjacent to these side surfaces 12a and 12b are margins for
`accommodating fluctuation in the cutting position when
`forming the substrate 12 by cutting the substrate base
`material, and the smallest spaces necessary are formed.
`(0019) With the light-emitting device 10 illustrated in FIG.
`1, the LED chip 30 is bonded to the top surface of the die
`bonding electrode 18, and the respective front surface side
`opening end 14a and rear surface side opening end 14b of
`the first
`through-hole 14 are positioned within
`the
`respective planes of the die bonding electrode 18 and the
`first surface mount electrode 22. Further, the die bonding
`electrode 18 and the first surface mount electrode 22 are
`electrically connected by the first connection electrode 26
`formed inside the first through-hole 14. Therefore, the
`space for forming the die bonding electrode 18 on the
`substrate 12 and the space for electrically connecting the
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`Japanese Unexamined Patent Application Publication 2003-17754
`(4)
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`die bonding electrode 18 and the first surface mount
`electrode 22 can be shared.
`(0020) Accordingly, it is unnecessary to separately secure a
`space for electrically connecting the die bonding electrode
`18 and the first surface mount electrode 22 (space L2
`corresponding to the end 2b illustrated in FIG. 4) in
`addition to the space for forming the die bonding electrode
`18, and the dimensions of the substrate 12 in the plane
`direction (horizontal width direction) can be reduced by
`this amount. Further, since the first surface mount electrode
`22 formed on the rear surface of the substrate 12 is
`electrically connected to a wiring pattern 40a formed on a
`circuit board 38 via solder 42a, it is unnecessary to secure a
`space L4 for the solder 9b illustrated in FIG. 4 on the
`circuit board 38 in addition to the space for mounting the
`light-emitting device 10.
`(0021) The respective front surface side opening end 16a
`and rear surface side opening end 16b of the second
`through-hole 16 are positioned within the respective planes
`of the wire bonding electrode 20 and the second surface
`mount electrode 24 to which one end of the wire 32 is
`electrically connected. Further, the wire bonding electrode
`20 and the second surface mount electrode 24 are
`electrically connected by the second connection electrode
`28 formed inside the second through-hole 16. Therefore,
`the space for forming the wire bonding electrode 20 on the
`substrate 12 and the space for electrically connecting the
`wire bonding electrode 20 and the second surface mount
`electrode 24 can be shared.
`(0022) Accordingly, it is unnecessary to separately secure a
`space for electrically connecting the wire bonding electrode
`20 and the second surface mount electrode 24 (space L1
`corresponding to the end 2a illustrated in FIG. 4) in
`addition to the space for forming the wire bonding
`electrode 20, and the dimensions of the substrate 12 in the
`plane direction (horizontal width direction) can be reduced
`by this amount. Further, since the second surface mount
`electrode 24 is electrically connected to a wiring pattern
`40b formed on the circuit