`
`The #1, easy-to-read, math-free introduction to
`semiconductor processing
`
`Perfect for training, teaching, & vo-tech
`programs
`
`Updated with new cleaning techniques, packing
`technologies, & fabrication methods
`
`PETER VAN ZANT
`
`
`
`Cree Ex. 1005
`
`SEMICONDUCTOR PROCESSING
`
`Cree Ex. 1005
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`Page 1
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`Microchip
`Fabrication
`
`A Practical Guide to Semiconductor Processing
`
`Peter Van Zant
`
`Fourth Edition
`
`McGraw-Hill
`New York San Francisco Washington, D.C. Auckland Bogota
`Caracas Lisbon London Madrid Mexico City Milan
`Montreal New Delhi San Juan Singapore
`Sydney Tokyo Toronto
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`Cree Ex. 1005
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`Page 2
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`Cree Ex. 1005
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`on; a practical guide to semicond
`
`Library of Congress Cataloging-in-Publication Data
`uctor processing / Peter Van
`Van Zant, Peter.
`Microchip fabricati
`Zant.—4th ed.
`p.
`cm.
`Includes bibliographical references and index.
`ISBN 0-07-135636-3
`Design and construction.
`1. Semiconductors—.
`TK7871.85.V36 2000
`621.3815'2—de21
`
`I. Title.
`
`00-02317
`
`McGraw-Hill
`A Division ofTheMcGrawHill Companies
`
`"2
`
`© 2000, 1997, 1984 by The McGraw-Hill Companies, Inc. All
`Printed in the United States of America. Except as
`Copyright
`the United States Copyright Act of 1976, no part of
`rights reserved.
`ay be reproduced or distributed in any form or by any
`permitted under
`a data base or retrieval system, without the prior
`this publication m
`meang, or stored in
`publisher.
`written permission of the
`C 99876543210
`1234567890 poc/DO'!
`
`ISBN 0-07-135636-3
`
`The sponsoring editor for this book was Stephen Chapman and the
`production supervisor Was Sherri Souffrance. It was set in Century
`Schoolbook by Pro-Image Corporation.
`Printed and bound by R. R. Donnelley & Sons Company.
`nted on recycled, acid-free paper containing
`This book is pti
`a minimum of 50% recycled, de-inked fiber.
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`this work has been obtained by The Me-
`Information contained in
`(“Me-Graw-Hill”) from sources be-
`Graw-Hill Companies, Inc.
`lieved to be reliable. However, neither McGraw-Hill nor its au-
`thors guarantee the accuracy or completeness of any information
`published herein, and neither McGraw-Hill norits authors shall
`be responsible for any errors, omigsions, or damages arising out
`of use of this snformation; This work is published with, the un-
`derstanding that MeGraw-Hill and its authors are supplying in-
`formation but are not attempting to: render engineering oY ather
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`Cree Ex. 1005
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`Page 3
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`Cree Ex. 1005
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`Page 3
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`
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` a
`Chapter13
`
`Metallization
`
`
`
`
`
`Overview
`
`Fabrication of circuits is divided into two major segments. First the
`
`
`active and passive parts are fabricated in and on the wafer surface.
`
`
`These is called the Front End Of the Line or FEOL. In the Back End
`of the Line (or BEOL), the metal systems necessary to connect the
`devices and different. layers are added to the chip. In this chapter the
`
`
`materials, specifications, and methods used to complete the metalli-
`zation segment is presented along with other uses of metals in chip
`manufacturing. Vacuum pumps, used in CVD, evaporation, ion im-
`plant, and sputtering systems are exp!ained at the end of the chapter.
`
` Objectives
`
`Upon completion of this chapter, you should be able to:
`l. List the requirements of a material for use as a chip surface con-
`ductor.
`
`
`: Drawcross sections of single and multilayer metal schemes.
`- Describe the purpose and operation of a thin-film fuse.
`
`
`Make a list of materials used in the metallization of semiconductor
`
`
`evices, Identity their specific use(s).
`
`
`' Draw and identify the parts of a vacuum evaporator.
`- Describe the principle of sputtering.
`
`
`- Draw and identify the parts of a sputtering system.
`
`
`: Describe the principle and operation of oil diffusion, turbo and cry-
`
`Ogenic high-vacuum pumps.
`
`CowmooOo
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`Cree Ex. 1005
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`Page 4
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`Cree Ex. 1005
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`ChapterThirteen Introduction
`
`396
`
`The most common and familiar use of metal films in semiconductop
`technology is for surface wiring. ‘The materials, methods, and pro
`a
`cesses of “wiring” the component parts togetheris generally referred
`to as metallization or the metallization process. Metallization includes
`all of the steps in the metallization sequence described in Chaptep 5
`
`|
`
`|
`
`Conductors-Single Level Metal
`In the MSI era metallization was relatively straight forward (Fig
`13.1), requiring only a single level metal process. Small holes, called
`contact holes or contacts, are etched through the surfacelayers, to the
`device/circuit component parts. Following contact masking, a thin
`layer (10,000 to 15,000 A) of the conducting metal (mostly aluminum
`or aluminum alloys) was deposited by vacuum evaporation, sputter.
`ing, or CVD techniques over the entire wafer. The unwanted portions
`of this layer are removed by a conventional photomasking andetch
`procedureorbylift-off. This step leaves the surface covered with thin
`lines of the metal that are called leads, metal lines,or interconnects,
`Generally a heat-treatment step, called alloying, is performed after
`metal patterning to ensure good electrical contact between the metal
`and the wafer surface.
`
`|
`)
`
`
`
`eG00
`a God
`7 }
`@
`Kase
`ws Gooc
`: Higt
`“ Corr,
`. Long
`a Capa’
`a Unifc
`i
`l
`Conduc
`creat
`face wht
`The. an
`schemes.
`it is expr
`two-met
`layer for
`
`Regardless of the structure, a metal system must meet the following criteria:
`
`1.
`Wafer with
`Doped Regions
`
`2.
`Paiterning:
`Contact
`Mask
`
`3.
`Layering: Conducting
`Layer
`
`Figure 13.1 Metallization sequence.
`
`Patterning: Metal
`Mask
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`Cree Ex. 1005
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`Page 5
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`Cree Ex. 1005
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`Page 5
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