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`IEEE JOURNAL OF SOLID-STATE CIRCUITS
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`ii
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`

`

`1~EE JOUR N AL OF
`SOLID-STATE
`CIRCUITS
`
`p. pUBLICATION OF THE IEEE SOLID-STATE CIRCUITS SOCIETY
`
`DECEMBER 2007
`
`VOLUME 42
`
`NUMBER12
`
`IJSCBC
`
`(ISSN 0018-9200)
`
`SPECIAL ISSUE ON THE 2007 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)
`
`Introduction to the Special Issue on the 2007 IEEE International Solid-State Circuits Conference ........................ .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . , ......................... J. Sevenhans, J. T. Stanick, M. Miller, and J. E. D. Hunvitz
`
`2635
`
`ANALOG CIRCUITS AND CONVERTERS
`
`A Wide-Bandwidth 2.4 GHz ISM Band Fractional-N PLL With Adaptive Phase Noise Cancellation ..................... .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Swaminathan, K. J. Wang, and I. Galton
`A Micropower Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer ............................................... .
`. . . , , , ........... , ......... M. Paavola, M. Kdmariiinen, J. A. M. Jarvinen, M. Saukoski, M. Laiho, and K. A. I. Halonen
`A 2 W CMOS Hybrid Switching Amplitude Modulator for EDGE Polar Transmitters ..................................... .
`........ ............. .... ... . ..... .. . . . .. ... . . . . ... .. . . .. ... . .. . .. . . ......... .. ....... .. . T.-W Kwak, M.-C. Lee, and G.-H. Cho
`A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC ............................................. L. Brooks and H.-S. Lee
`A 10-bit 205-MS/s l.O-mm2 90-nm CMOS Pipeline ADC for Flat Panel Display Applications . . .................... . .... .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S.-C. Lee, Y.-D. Jeon, J,-K. Kwon, and J. Kim
`A 56 mW Continuous-Time Quadrature Cascaded :Eb. Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band ....
`. . . . . . . . . . . . . . . . . . . . , ................................ L. .T. Breems, R. Rutten, R.H. M. van Veldhoven, and G. van der Weide
`A Single-Inductor Switching DC-DC Converter With Five Outputs and Ordered Power-Distributive Control ........... .
`............. ... ........... ... .. .. .. ..... .......... H.-P Le, C.-S. Chae, K.-C. Lee, S.-W Wang, G.-H. Cho, and G.-H. Cho
`
`WIREUNE
`40-Gb/s High-Gain Distributed Amplifiers With Cascaded Gain Stages in 0.18-1-im CMOS .... J.-C. Chien and L.-H. Lu
`A 40-44 Gb/s 3 x Oversampling CMOS CDR/ l: 16 DEMUX .................................................... N. Nedovic,
`N. Tzartzanis, H. Tamura, F. M. Rotella, M. Wiklund, Y. Mizutani, Y. Okaniwa, T. Kuroda, J. Ogawa, and W. W. Walker
`A Fully Integrated 4 x 10-Gb/s DWDM Optoelectronic Transceiver Implemented in a Standard 0.13 µm CMOS SOI
`Technology .................... A. Narasimha, B. Analui, Y. Liang, T. 1. Sleboda, S. Abdalla, E. Balmater, S. Gloeckner.
`D. Guckenberger, M. Harrison, R. G. M. P. Koumans, D. Kucharski, A. Mekis, S. Mirsaidi, D. Song, and T. Pinguet
`
`2639
`
`2651
`
`2666
`2677
`
`2688
`
`2696
`
`2706
`
`2715
`
`2726
`
`2736
`
`+.IEEE
`
`iii
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`

`A 14-mW 6.25-Gb/s Transceiver in 90-mn CMOS .................................................................. ...... .... ~
`....................................... J. Poulton, R. Palmer, A. M. Fuller, T Gree,; J. Eyles, W J. Dally, and M. Horowitz.
`27
`45
`A Self-Calibrated On-Chip Phase-Noise Measurement Circuit With - 75 dBc Single-Tone Sensitivity at 100 kHz Offset . . .
`2
`........................ ..... ............................................................. W Khalil, B. Baklwloglu, and S. Kiaei
`758
`
`WIRELESS AND RF
`
`A Blocker Filtering Technique for SAW-Less Wireless Receivers ................ ... ......... ...................... H. Darabi
`A Multimode Transmitter in 0.13 ttm CMOS Using Direct-Digital RF Modulator .. ......... ............. ... ........... .... .
`. .. .. .. .. . .. . . .. .. .. .. .. . .. .. .. . .. .. .. .. .. .. .. .. . .. .. .. P. Eloranta, P. Seppinen, S. Kallioinen, T. Saarela, and A. Parssinen
`A Single-Chip Dual-Band CDMA2000 Transceiver in 0.13 µm CMOS ......... ... ............... . . .. ...... . ....... . ... . .. . . .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Zipper, C. Stager, G. Hueher, R. Vazny, W Sclzelmbauer, B. Adler, and R. Hagelauer
`A Fully Integrated MIMO Multiband Direct Conversion CMOS Transceiver for WLAN Applications (802.11 n) ........ .
`. . . . . . . . . . . . A. Behzad, K. A. Carter, H.-M. Chien, S. Wu, M.-A. Pan, C. P. Lee, Q. Li, J.C. Leete, S. Au, M. S. Kappes,
`Z. Zhou, D. Ojo, L. Zhang, A. Zolfaghari, J. Castanada, H. Darabi, B. Yeung, A. Rofnugaran, M. Rofo1igara11,
`J. Trachewsky, T. Moorti, R. Gaikwad, A. Bagchi, J. S. Hammerschmidt, J. Pattin, J. J. Rael, and B. Marhole1•
`SiP Tuner With Integrated LC Tracking Filter for Both Cable and Terrestrial TV Reception ............ .. . ....... ...... . .. .
`J. R. Tourret, S. Amiot, M. Bernard, M. Bouhamame, C. Caron, 0. Cramf, G. Denise, V. Fillatre, T. Kervaon, M. Kristen,
`L. Lo Coco, F. Macier, J. M. Paris, F Pichon, S. Prouet, V. Rambeau, S. Robert, J van Sinderen, and 0. Susplugas
`A 900 MHz UHF RFID Reader Transceiver IC ................................................................................. .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Chiu, I. Kipnis, M. Loyer, J. Rapp, D. Westberg, J. Johansson, and P Johansrnn
`An Integrated Ultra-Wideband Timed Array Receiver in 0.13 tim CMOS Using a Path-Sharing True Time Delay
`Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T.-S. Chu, J. Roderick, and H. Hashemi
`A 2.5 nJ/bit 0.65 V Pulsed UWB Receiver in 90 nm CMOS ............................. F. S. Lee and A. P. Chandrakasm,
`A 0.65-to- l .4 nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90 nm CMOS for IEEE 802.15.4a .......................... .
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Ryckaert, G. Van der Plas, V. De Heyn, C. Desset, B. Van Poucke, and .l. Craninckx
`A Magnetically Tuned Quadrature Oscillator ........ .... G. Cusmai, M. Repossi, G. Albasini, A . Mazzanti, and F Svelto
`A 23-to-29 GHz Transconductor-Tuned VCO MMIC in 0.13 11m CMOS ....... .............. .... K. Kwok and J. R. Long
`Heterodyne Phase Locking: A Technique for High-Speed Frequency Division . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B. Razavi
`Millimeter-Wave Devices and Circuit Blocks up to 104 GHz in 90 nm CMOS ............................................. ..
`.. .. .. .. .. ... .. .... .. . .. .. .. .. .. .. . .. .. . .. .. .. .. .. .. .. . .. .. . .. .. . .. .... . B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad
`
`IMAGING, MEMS, MEDICAL, ANO DISPLAYS
`
`A Continuous-Grain Silicon-System LCD With Optical Input Function .................................................... , ..
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`2007 INDEX ... .. .......... . ................... . .. ................. . ......... . ............•. . ............................•...........
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`2860
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`2893
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`2913
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`2934
`2946
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`

`

`This material may be protected by Copyright law (Title 17 U.S. Code)
`
`

`

`r.WAK tl al.: 2 W CMOS HYBRID SWITCHING AMPLITUDE MODULATOR FOR EDGE POLAR TRANSMITTERS
`
`2667
`
`R ( t )=~
`
`.----+--1
`
`v(t)
`
`I
`
`'
`
`'
`
`'
`
`Phase Modulator
`
`.
`.
`Amplitude Modulator
`.
`.
`.
`.
`.
`.
`.
`.-······---------------,
`'
`.
`.
`.
`.
`.
`:
`.
`.
`.
`.
`{c:::::~
`.
`'
`.
`.
`.
`.
`.
`.
`.
`'
`'
`',, ____________________ -~-
`----+ 8--+ Limiter
`:
`'
`: t
`·------------
`\ C
`t «MMUAM • t
`1hvvvvvvnn
`
`R(t)
`----+
`
`<p(!)
`
`l,Q
`
`to
`
`Polar
`
`-----
`
`91(1) = tan '(QI!)
`
`V(t)
`
`•,i
`:
`'
`.
`,/
`
`I
`I
`
`v(t)
`
`...
`' '
`:
`~ AA UUAMAA
`vvwnvn 01 •
`
`v(t) :~···
`
`I
`
`Pig. I. Block diagram of a polar transmitter.
`
`io = (1 + /3J-ia
`
`Linear Amp Switching Amp
`(a)
`
`(b)
`
`Fig. 2. (a) Conceptual diagram of the hybrid switching amplilit:r. (b) Phase
`diagram of each current.
`
`(EER) applications [6], it has not been used for polar transmit(cid:173)
`ters in CMOS process because of the difficulty of designing a
`linear amplifier with a wide bandwidth, a low output impedance,
`and a high current-driving capability. However, if the switching
`stage with a wide bandwidth and a low ripple current is used
`for the hybrid switching amplifier, such burdens of the linear
`amplifier can be reduced. By the way, a bandwidth and a ripple
`current arc influenced by the control method. Compared with
`pulsewidth modulation (PWM) control, a hystcretic control of
`the switching amplifier relatively has a narrow bandwidth and
`a large constant ripple current because the switching frequency
`varies according to the output voltage and the bandwidth is
`limited by the minimum switching frequency. Therefore, the
`conventional hybrid switching amplifier hased on the hysteretic
`control has a relatively lower bandwidth and a larger ripple
`current. To extend the narrow bandwidth wider, the linear
`amplifier must have a high current-driving capability according
`to (1) to provide more signal current for making up for the
`distortion from the switching stage. ln case of a large ripple
`current, in particular, the linear amplifier must have a lower
`output impedance at the switching frequency to reduce the
`output ripple voltage because the multiplication of the output
`illl.pedance of the linear amplifier and the ripple current makes
`the output ripple voltage.
`
`B. Proposed Hybrid Switching Amplifier
`As shown in Fig. 3(a), the PWM control is used for the
`switching stage to mitigate the difficulties in the design of the
`linear amplifier. Hence, the switching frequency Is is fixed,
`which makes the unity-gain frequency constant as well. In addi(cid:173)
`tion, the peak-to-peak ripple current of the PWM-based hybrid
`switching amplifier is less than that of the hysteresis-based one
`[5] with the constant ripple cwTent on the assumption that the
`switching frequency of the former is equal to the maximum
`switching frequency of the latter. This is because the relation
`between the switching frequency and the peak-to-peak ripple
`current 6.i,. is expressed as follows for both cases:
`ls· 6.ir = (V,Jd/L) · D · (1 - D)
`
`(2)
`
`where D is the duty ratio, V dd is the supply voltage, and L is
`the inductance.
`However, when we use the PWM control, we must consider
`ttle loop stability. From Fig. 3(a), the current loop gain() can be
`found by
`
`(3)
`
`where As, Ar, and A ,'H are the cmTent sense gain, integrator
`gain, and modulation gain, respectively, and (ZL + sL) is the
`impedance from a switching node Vx. The modulation gain AM
`is the ratio of Vdd to a peak-to-peak magnitude of a triangular
`wave. For loop compensation, as shown in Fig. 3(b), one zero
`at about 160 kHz is inserted into the integrator since two poles
`result from the integrator and the inductor in the current loop.
`
`C. Third-Order Ripple Filter and Current Feedback
`
`Although the linear amplifier has low output impedance, the
`switching ripple current should be reduced to decrease both
`the output ripple voltage and the power consumption of the
`linear amplifier. For this purpose, as shown in Fig. 4, a third(cid:173)
`order filter with L 1, L2, and CF is used in the current loop.
`
`

`

`2668
`
`IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 12, DECEMBB.(l
`2<X>;
`
`I
`I
`1~, I
`I
`$1t---~ _,_I -( l.,,·ln- --...J 1 '~ j
`I
`!
`..:>----v----r----- -~ v. I
`,.
`
`L,
`
`cf
`
`l z
`
`F t - - - - - '
`
`Fig. 4. Hybrid switching amplifier with the third-order ripple filter and the cur(cid:173)
`rent feedback.
`
`/At(s)
`.
`.
`! A-.o~
`:
`I•
`:
`l
`f. • .i
`................................. ·
`
`\
`
`I
`
`i "
`
`I
`
`f,
`
`t
`
`:
`
`I
`
`fp
`
`vdd
`
`'···········--·~ ·-··········--
`
`L
`
`.........
`
`I
`!
`j
`!
`Current Loop p
`.
`.
`! P(s) '"id/ ia = AsA,AM I (ZL + sl) !
`:
`
`~
`:
`
`.
`
`L
`
`,.
`>----0--........ - - - - - -- - - - - - v.
`
`F t-----'
`
`(a)
`
`2 Jk
`
`160k
`
`2M
`
`Oclll
`
`!Pl
`
`46dB
`
`OdB
`
`F t----'
`
`> - - - -0 - - - - - - - - - - - ---1 Vo
`
`-1.
`
`(b)
`
`fig. 5. Hybrid switching amplifier with the feedforward path.
`
`Fig. 3. (a) Simplified block diagram of the hybrid switching ampli lier. (b) Bode
`plots for the current loop design.
`
`In spite of the desirability of lowering the resonant frequency
`for greater reduction of the ripple current, two additional poles
`should have little impact on the current loop. Accordingly, the
`resonant frequency is chosen between the unity-gain frequency
`of the current loop and the switching frequency. Additionally,
`a damping resistor Rd is inserted, taking a quality factor into
`account, because an excessively small Rd can generate an un(cid:173)
`wanted resonance.
`To stabilize the current loop in spite of the relatively small
`Rd, the current feedback suggested in (7) is introduced. The
`ripple information is used for the hysteretic control in the ref(cid:173)
`erence, whereas only a high-frequency signal current passing
`through the capacitor CF is used for the PWM control with the
`same but negative gain as the current sense gain As, because the
`
`sensed ripple information is attenuated at the output of the in(cid:173)
`tegrator. The current loop therefore remains stable because the
`same voltage VsEN. as in the case of a single inductor, is recov(cid:173)
`ered without losing the high-frequency current component.
`
`D. Feedforward Path
`
`As given in ( 1 ), the linear amplifier should provide some corn·
`pensation current to prevent the output voltage from being dis·
`torted by the delay of the current loop at the high frequency. The
`higher the frequency, the more the compensation current fl ows.
`There are higher frequency components than the EDGE base(cid:173)
`band signal of about 270 kHz in the amplitude path of the polar
`transmitter. Hence, an auxiliary circuit is necessary to alleviate
`the burden of the linear amplifier.
`If we add a feedforward path, like the one shown in Fig. 5, we
`input signal can directly control the switching amplifier. s uch a
`
`

`

`f:WA't- el al.: 2 W CMOS HYBRJD SWITCHING AMPLlTUDE MODULATOR !:'OR EDGE POLAR TRANSMITfERS
`
`2669
`
`Summing Circuit + Integrator
`
`Ripple Filter +
`Current Feedback
`
`I Fig. 6. Detailed block diagram of the hybrid swi1ching amplifier.
`
`path is faster than the feedback current path formed by sensing
`the output current of the linear amplifier. Although the feedfor(cid:173)
`ward signal can be injected after the integrator, it is added before
`the integrator in Fig. 5 considering the implementation of the
`summing circuit and integrator as will be explained in the next
`section. With this feedforward path, we can express the output
`current as follows:
`
`. A,,J . Vin
`t 0 ==
`ZL
`
`.
`
`) A A
`. A
`(A
`1
`I • M • z
`S ' ia + F · Vin
`= ia +
`L
`1, + s
`'
`(4)
`
`Where Avt is the overall closed-loop gain of 1/ F. Since the
`output current of the linear amplifier i"- ideally has to be equal
`to zero, the gain of the feedforward path AJo' ( s) is given as
`
`AF(s) = Avf ,_1_ , 1+s/wp. zL+sL
`AM A10 1 + s/wz
`ZL
`1 + s/wp
`Av/
`1
`~AM· A10 · 1+s/w,,
`
`(5)
`
`\\>here the integrator gain Ar(s) is A10 · ((I +s/w.)/(l +s/wv) ).
`Notice that the gain of the feedforward path has the reciprocal
`Characteristic of the integrator and the inductor to compensate
`for their de]ays.
`
`E. Implementation of a Hybrid Switching Amplifier
`Fig. 6 shows the detailed circuit of the hybrid switching am(cid:173)
`plifier. In CMOS design, although three voltage signals can be
`added and then integrated as shown in Figs. 4 and 5, the simul(cid:173)
`taneous summation and integration of the signals at the node
`Ve, after the conversion of the three voltage signals into cur(cid:173)
`rent ones, is advantageous, that is, the sensed output current of
`the linear amplifier, the feedforward current, and the high-fre(cid:173)
`quency current through the ripple filter are added together and
`integrated at the node with the inverted polarity of the last one.
`In this case, the de gain of the integrator A10 is replaced by
`Rro and the sensing ratio of the output current of the linear
`amplifier is 1 to N so that the current sense gain As is 1/N.
`The feedforward path gain AF ( s) given in (5) can be expressed
`as AFv ( s) / RF because the input voltage Vin is converted into
`the current by RF after passing through the lead compensator
`Apv (s). As mentioned before, the zero and the pole of Apv(s)
`should be located at the pole and the zero of the integrator, re(cid:173)
`spective! y. If the transfer functions of the integrator and A Fv ( s)
`are given, the value of RF can be found to set the de gain of
`Ap ( s). The capacitor in the feedforward path C 1 is a coupling
`capacitor with a large capacitance.
`After the high-frequency current that passes through the
`ripple filter is sensed as a voltage by the damping resistor Rd,
`the voltage is converted into the current by Ref· Since the
`
`

`

`2670
`
`IEEE JOURNAL OF SOI .TD-STATE CIRCUITS. VOL. 42. NO. 12, OECtMlll,Q.
`~
`2
`
`high-frequency current should he transferred to the integrator
`with the same gain of 1 / N as the output current of the linear
`amplifier, the value of Rcr is set equal to N · R,1• The capacitor
`C2 is also a coupling capacitor like C 1.
`
`F Design for the Class-£2 EDGE
`The Class-E2 EDGE specifications require an average output
`power of 26 dBm and a peak-to-average power ratio of 3.2 dB.
`Accordingly, the amplitude modulator should be able to supply
`more than about 2.2 W, assuming that the RF power amplifier
`has a maximum efficiency of 40%. This means that the equiva(cid:173)
`lent de load resistance is approximately 4 n when the maximum
`output voltage of the amplitude modulator is 3 Vat Vdct = 3.5 V
`[2]. Hence, the hybrid switching amplifier is designed to drive a
`power amplifier with an equivalent impedance of 4 n while its
`output voltage varies from 0.4 to 3 V.
`Despite the EDGE signal bandwidth of about 270 kHz, the
`amplitude modulator should have a bandwidth wider than 2 MHz
`to satisfy the en-or vector magnitude (EVM) and the spectral
`mask requirements because, as mentioned before, the amplitude
`component for the polar modulator becomes much wider than
`that of the original EDGE signal in the process of extracting it
`[1], [2]. Fortunately, however, the low-speed switching amplifier
`can efficiently supply most of the output current because most of
`the EDGE amplitude signal power is concentrated on the low(cid:173)
`frequency band of less than 50 kHz, as shown in [ l]. This is why
`the cun-cnt loop f3 is designed to have a unity-gain frequency
`of about 460 kHz using a 2 MHz switching frequency with a
`4 ttH inductance, as shown in Fig. 3(b). As a result, a switching
`ripple current of about 110 mAµµ is generated without the use
`of the third-order ripple filter at a duty ratio of 0.5. However, it
`is reduced up to about 40 mAPP with the third-order ripple filter
`and the current feedback. The values of the used components are
`as follows: L1 = ] 11H, f,2 = I 11.H, Ct = 100 nF, Rd = 2 n,
`and R cf = :l!JO n.
`On the other hand, the linear amplifier should have a band(cid:173)
`width that is much wider than 2 MHz to compensate for the
`fast varying amplitude components that the switching ampli(cid:173)
`fier cannot follow. The driving capability of the linear amplifier
`should also be more than at least 80 mA, including a switching
`ripple current and a high-frequency signal current, because, ac(cid:173)
`cording to (I) and Fig. 3(b), the required output current of the
`linear amplifier is approximately 34 mA on the condition that
`the maximum output voltage at 50 kHz, v;, = l.25 · sin(21r ·
`50 k · t) + 1.75 V<k. is applied to a 4 f1 load. To put it con(cid:173)
`cretely, I.Bl = 9.2, B = 90° at 50 kHz from Fig. 3(b), and the
`output current from the switching stage is slower than the output
`current by a: = 6.2°.
`
`III. LINEAR AMPLIFIER WITH A NOVEL CLASS-AB BUFFER
`
`A. Critical Desi;111 Parameters for the Linear Amplifier
`If the amplitude modulator has an input signal of a(t) and
`( t) with a closed-loop gain of I, a1
`( t) is
`an output signal of a1
`expressed as the summation of a( t) and the switching ripple
`voltage of C¥R • cos(wRt +¢),where wn is the switching fre(cid:173)
`quency. By assuming the phase-modulated signal of cos(wct +
`O(t)) is applied at Lhe input of the RF power amplifier, we can
`
`express the output of the power amplifier s~: ( t) by the am l"
`tude modulation of ,L'(t) and crn:1(wct + B(t)) as follows: p 1-
`
`s~(t) =a(t) · cos (wet+ fl(t)) + CXR · cos(wnt + </>)
`· cos(wct + B(I.))
`
`(6)
`
`The last term is caused by the output ripple vohage of the 8.ll\
`pl itude modulator, Lhat is, the ripple voltage from the switch