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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`Intel Corporation
`Petitioner
`
`v.
`
`Qualcomm Incorporated
`Patent Owner
`______________________
`
`Case IPR2018-01153
`Patent 8,698,558
`______________________
`
`PATENT OWNER RESPONSE TO PETITION FOR INTER PARTES
`REVIEW PURSUANT TO 37 C.F.R. § 42.220
`
`
`
`
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`

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`I. 
`II. 
`
`TABLE OF CONTENTS
`INTRODUCTION ........................................................................................... 1 
`THE ’558 PATENT AND ITS PROSECUTION HISTORY ......................... 3 
`A.  Overview of the ’558 Patent .................................................................. 3 
`B. 
`Prosecution History of the ’558 Patent ................................................. 7 
`III.  CLAIM CONSTRUCTION ............................................................................ 8 
`IV.  LEVEL OF ORDINARY SKILL IN THE ART ............................................. 9 
`V.  OVERVIEW OF THE CITED REFERENCES ............................................ 10 
`A.  Overview of Chu ................................................................................. 10 
`B.  Overview of Choi 2010 ....................................................................... 13 
`C.  Overview of Myers .............................................................................. 15 
`VI.  GROUND I OF THE PETITION SHOULD BE DISMISSED BECAUSE
`IT IS BASED ON AN UNSUPPORTABLE CLAIM
`INTERPRETATION ..................................................................................... 19 
`VII.  GROUNDS I AND II OF THE PETITION SHOULD BE DISMISSED
`BECAUSE PETITIONER HAS FAILED TO DEMONSTRATE A
`MOTIVATION TO COMBINE CHU AND CHOI 2010 ............................. 29 
`VIII.  GROUND II OF THE PETITION SHOULD BE DISMISSED BECAUSE
`CHOI 2010 TEACHES AWAY FROM “SELECTIVE BOOST” AND
`PETITIONER HAS FAILED TO DEMONSTRATE A MOTIVATION TO
`COMBINE MYERS WITH CHU AND CHOI 2010 ................................... 36 
`Choi 2010 Requires A Constant Boosted Supply Voltage And
`A. 
`Teaches Away From “Selectively Boosting” A Supply Voltage ........ 36 
`Petitioner Failed To Demonstrate A Motivation To Combine Myers
`With Chu And Choi 2010 .................................................................... 40 
`IX.  THE PATENTABILITY OF CLAIM 3 SHOULD BE CONFIRMED
`BECAUSE PETITIONER PRESENTS NO MORE THAN CONCLUSORY
`REMARKS WITHOUT ANY FACTUAL UNDERPINNING .................... 48 
`CONCLUSION .............................................................................................. 49 
`
`B. 
`
`X. 
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`-i-
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`

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`Pursuant to the Board’s Decision – Institution of Inter Partes Review (Paper
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`9) (“Institution Decision”), entered January 16, 2019 – Patent Owner Qualcomm,
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`Inc. (“Qualcomm” or “Patent Owner”) submits this Response in opposition to the
`
`Petition for Inter Partes Review of U.S. Patent No. 8,698,558 (the “’558 Patent”)
`
`filed by Intel Corporation (“Intel” or “Petitioner”).
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`I.
`
`INTRODUCTION
`Petitioner raises two grounds challenging a total of nine claims. Ground I is
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`directed towards independent claims 6 and 8, each of which recite “a P-channel
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`metal oxide semiconductor (PMOS) transistor [having]…a source [receiving/that
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`receives] the boosted supply voltage or the first supply voltage.” A person of
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`ordinary skill in the art (“POSA”) would understand this limitation as requiring a
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`“selective boost.” Because Petitioner concedes that Ground I does not address a
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`selective boost, the Board should dismiss Ground I.
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`Moreover, Grounds I and II rely upon the combination of Chu and Choi
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`2010, with Ground II additionally relying on Myers. Both grounds are flawed
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`because Petitioner has failed to meet its burden of establishing a motivation to
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`combine Chu, a reference striving to increase the efficiency of a power amplifier,
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`with Choi 2010, a reference striving to prevent the degradation of output power at
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`the cost of efficiency. The prior art is silent regarding how to combine Chu and
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`Choi 2010 in a manner that achieves the objectives of both. A POSA therefore
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`-1-
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`

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`would not be motivated to combine these disparate teachings, and Petitioner has
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`failed to meet its burden under both grounds.
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`Petitioner additionally fails to meet its burden of establishing a motivation to
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`combine Chu/Choi 2010 with Myers. Choi 2010 is premised on building a circuit
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`that requires a constant boosted voltage supply to its linear amplifier. Petitioner,
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`recognizing that neither Chu nor Choi 2010 disclose anything relating to a
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`selective boost, relies on Myers to disclose these features. Choi 2010, however,
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`teaches away from using multiple voltage sources because the entire premise of
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`Choi 2010 is to use a constant boosted supply voltage in order to achieve its
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`objective of preventing the degradation of output power. And even if the Board
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`were to find that Choi 2010 does not rise to the level of teaching away, a POSA
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`would not be motivated to modify Choi 2010 with Myers because doing so would
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`undercut the benefits Choi 2010 achieves. Furthermore, Myers does not disclose a
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`linear envelope amplifier and relates only to an older power-tracking paradigm that
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`differs significantly from Chu and Choi 2010. Accordingly, a POSA would not be
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`motivated to combine Myers with Chu and Choi 2010.
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`For at least these reasons, the Board should confirm the validity of claims 1-
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`9 of the ’558 Patent.
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`-2-
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`

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`II. THE ’558 PATENT AND ITS PROSECUTION HISTORY
`A. Overview of the ’558 Patent
`The ’558 Patent describes and claims inventions directed to managing the
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`power associated with transmitting radio frequency (“RF”) signals from a mobile
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`device. Ex. 1101 at 1:5-31. The ’558 Patent teaches improvements over known
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`power management schemes by employing a novel form of “envelope tracking.”
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`Id. at Title; 3:57-60. The ’558 Patent’s power management scheme achieves
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`substantial power savings in mobile device transmitters, thereby extending a
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`device’s battery life. Id. at 3:46-48.
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`In wireless communication systems, mobile devices communicate by
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`transmitting encoded data signals. Ex. 1101 at 1:11-17. Before transmitting
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`through a communications channel, such encoded data signals are first conditioned
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`to generate RF output signals. Id. Such conditioning typically includes an
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`amplification step performed by a power amplifier (a “PA”) that provides a high
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`transmit power. Id. at 1:21-26. A desirable characteristic of mobile device power
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`amplifiers is an ability to provide high transmit power with high power-added
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`efficiency (“PAE”) and good performance even when the device’s battery is low.
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`Id.
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`
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`-3-
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`

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`Before the priority date of the ’558 Patent, typical PAs in a mobile device
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`were supplied with a constant power supply voltage, regardless of the PA’s output
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`power. The ’558 Patent illustrates this in Figure 2A, below with annotation:
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`
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`Figure 2A illustrates using a battery voltage (Vbat) to supply PA 210, which
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`provides an RFout signal as an amplified version of RFin. Ex. 1101 at 4:1-3.
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`RFout has a time-varying envelope illustrated by plot 250, which is juxtaposed
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`with voltage Vbat 260. Vbat remains higher than the largest amplitude of RFout’s
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`envelope in order to prevent clipping of RFout by PA 210. Id. at 4:2-7. A
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`drawback to this scheme is that the difference between the battery voltage and the
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`envelope of the RFout signal (shaded red) represents wasted power. Id. at 4:7-9.
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`As wasted power is undesirable, especially where power is limited by
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`battery life, the ’558 Patent employs “envelope tracking” in order to better manage
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`power consumption by using only an amount of power that is needed for a
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`particular signal. A PA employing envelope tracking is illustrated in Figure 2C,
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`with annotations, below:
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`-4-
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`

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`
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`By employing envelope tracking to produce a PA power supply Vpa,
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`represented in plot 280, the “supply voltage closely tracks the envelope [250] of
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`the RFout signal over time.” Ex. 1101 at 4:21-27. This maximizes PA efficiency
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`by minimizing the difference between Vpa and RFout over time, which results in
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`less wasted power. Id. at 4:27-32.
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`Implementing a PA supply with envelope tracking in a mobile device poses
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`unique challenges, because operating a mobile device with a low battery voltage is
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`often desirable (e.g., to reduce power consumption, extend battery life, etc.). Ex.
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`1101 at 3:46-56. At times, a PA may need to operate with a higher voltage than a
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`battery is providing, in which case a boost converter may be employed at the
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`expense of increased cost and power consumption. Id.
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`To address these issues, the ’558 Patent discloses an efficient design for
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`envelope tracking that employs a “switcher” and an “envelope amplifier” together
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`with a boost converter, as illustrated in Figure 3, with annotations below:
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`-5-
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`

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`Figure 3 illustrates an exemplary switcher 160a with envelope amplifier
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`170a operating cooperatively to create a supply current Ipa as the sum of Iind from
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`the switcher and Ienv from the envelope amplifier. Ex. 1101 at 4:34-38.
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`A switcher (e.g., 160a) “has high efficiency” and may deliver “a majority of
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`the supply current for [PA] 130” in current Iind, which contains DC and low
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`frequency components. Id. at 3:14-17; 6:19-20. An envelope amplifier (e.g.,
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`170a), on the other hand operates as a linear stage and has high bandwidth. Id. at
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`6:20-22. In the combination the switcher reduces the output current of the
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`envelope amplifier thereby improving overall efficiency, while the envelope
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`amplifier provides the high frequency components in current Ienv. Id. at 3:21-25;
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`6:22-24. In this way, the overall efficiency increases by drawing the majority of
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`-6-
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`

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`current from the high efficiency switcher, and only relying on the envelope
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`amplifier for the high frequency components.
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`In order to further increase the efficiency of the system, envelope amplifier
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`170a predominantly relies on Vbat for power while drawing upon Vboost (which
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`“boosts” or increases the battery voltage to a higher voltage at the expense of cost
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`and power consumption) on demand when, e.g., the magnitude of the envelope
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`signal exceeds a threshold. Id. at 3:19-21; 3:52-67; 5:31-36; 6:1-4. In this way,
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`the linear stage envelope amplifier only draws on the boosted voltage when needed.
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`Embodiments of the ’558 Patent increase efficiency by introducing an offset
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`in the switcher in order to increase the Iind current, thereby reducing the apparatus’
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`reliance on the less efficient envelope amplifier (id. at 6:52-61); by configuring the
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`envelope amplifier to rely on the boost converter dynamically and only when
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`necessary (id. at 6:28-33); or by doing both.
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`B.
`Prosecution History of the ’558 Patent
`The ’558 Patent issued from U.S. Application No. 13/167,659, filed June 6,
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`2011. Ex. 1102 at 38. A first Office Action issued on November 23, 2012,
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`rejecting each original independent claim, including claims 1, 10, and 12, as
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`anticipated by Kim et al., entitled “High Efficiency and Wideband Envelope
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`Tracking Power Amplifier with Sweet Spot Tracking.” Ex. 1102 at 59-61; Ex.
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`1113 at Title. The Examiner provided a detailed examination of original claims 1-
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`
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`-7-
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`

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`13 in view of Kim, including those claims that issued as independent claims 1, 6,
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`and 8. Ex. 1102 at 62-63. Patent Owner distinguished the pending claims from
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`Kim on the basis that, among other differences, Kim disclosed an output stage
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`PMOS in the linear amplifier connected only to the boost converter. Ex. 1102 at
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`86-87.
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`The Office found original claim 4 to be allowable over Kim if rewritten in
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`independent form. Ex. 1102 at 63-64. To overcome the rejections of claims 1, 10,
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`and 12, the Applicant incorporated the subject matter of original claim 4 in each
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`independent claim. Ex. 1102 at 79-82.
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`In a subsequent Final Office Action dated May 10, 2013, the Office
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`indicated that original claims 4, 10, and 12 as amended recited allowable subject
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`matter over the prior art of record including the Kim paper. Id. at 134. Thereafter,
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`the Applicant and the Office addressed unrelated claims before a Notice of
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`Allowance was issued on Feb. 13, 2014; original claims 4, 10, and 12 issued as
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`claims 1, 6, and 8. Id. at 185; 207.
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`III. CLAIM CONSTRUCTION
`Patent Owner does not believe that the term “envelope signal” needs to be
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`construed. To the extent the Board determines that the term “envelope signal”
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`should be construed, Patent Owner does not contest the Board’s previous finding
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`-8-
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`

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`that “envelope signal” means “signal indicative of the upper bound of the output
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`RF signal.” Paper 9 at 8.
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`Claims 6 and 8 both recite “a P-channel metal oxide semiconductor (PMOS)
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`transistor [having]…a source that receives the boosted supply voltage or the first
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`supply voltage.” The only reasonable interpretation of these claim elements,
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`properly read within the context of the claim as a whole and the specification, is
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`that the PMOS transistor must be able to receive, selectively, either the boosted
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`supply voltage or the first supply voltage (referred to herein as a “selective boost”).
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`See Ex. 2005 at ¶¶47-61. Patent Owner presents its full claim construction
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`argument for this claim element below in Section VI.
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`IV. LEVEL OF ORDINARY SKILL IN THE ART
`As the Board previously stated, the POSA for the ’558 patent would have
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`had a Master’s degree in electrical engineering, computer engineering, or computer
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`science, and would also have had at least two years of relevant experience, or a
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`Bachelor’s degree in one of those fields and four years of relevant experience.
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`Paper 9 at 9-10. Relevant experience “refers to experience with mobile device
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`architecture as well as transmission and power circuitry for radio frequency
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`devices.” Id. Patent Owner does not dispute the Board’s statement of the level of
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`ordinary skill in the art. See also Ex. 2005 at ¶¶43-44.
`
`
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`-9-
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`

`

`V. OVERVIEW OF THE CITED REFERENCES
`A. Overview of Chu
`The Chu reference is an article entitled “A 10 MHz Bandwidth, 2mV Ripple
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`PA Regulator for CDMA Transmitters.” Ex. 1104 at Title. Chu describes a
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`“combined class A-B and switch-mode regulator based supply modulator with a
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`master-slave architecture achieving wide bandwidth and low ripple.” Ex. 1104 at
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`2809. Chu recognizes that power amplifiers (PAs) consume a significant portion
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`of the total power budget of battery-powered transceivers, and at higher
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`frequencies, increased power is wasted in the PA. Id. To improve efficiency, Chu
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`explains that it is “highly desirable to track the envelope variations of a modulated
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`waveform at the PA power supply. This variable supply operation ensures close to
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`peak efficiency at various signal envelope levels.” Id. Chu explains that polar
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`modulators “try to address this efficiency loss by closely tracking the envelope of
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`an RF band-pass signal and applying it onto the drain of a high efficiency, non-
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`linear PA.” Id. The process involves an envelope detector extracting the envelope
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`waveform and “applying the amplitude and phase components of RF signals
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`separately to the power supply and input of non-linear PAs,” which improves
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`efficiency. Id.
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`Chu explains that this approach has known drawbacks, however, which
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`include spectral expansion of the envelope and phase bandwidths of CDMA
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`-10-
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`

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`signals, as well as misalignment between the amplitude and phase paths. To
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`overcome these drawbacks and maximize efficiency, Chu presents “a master-slave
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`linear and switch-mode supply modulator with fast dynamic transient response.
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`By using an accurate current sensing technique, efficiency and linearity of the
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`supply modulator is further optimized.” Id. Chu’s master-slave architecture is
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`illustrated in Fig. 4 (below) showing a supply modulator with switch-mode and
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`linear amplifiers connected in parallel.
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`Chu’s Figure 5 (below) illustrates a simplified block diagram of the
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`proposed regulator and ripple cancellation.
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`-11-
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`

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`Chu discloses that a “high GBW linear amplifier in voltage follower
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`configuration ensures that output node Vo(t) tracks the reference envelope voltage
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`A(t).” Ex. 1104 at 2810. And a “current sensing circuit, high gain transimpedance
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`amplifier and switch-mode regulator form[] a global feedback control loop that
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`suppresses the current output from the linear amplifier within the switch-mode
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`regulator bandwidth.” Id. According to Chu, “[t]ypical current sensing techniques
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`utilize[ing] a small series resistor and measure[ing] the voltage drop across it … is
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`not suitable for CDMA supply modulator applications where output currents can
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`be up to 380 mA.” Id. at 2815-2816. Accordingly, Chu discloses an “accurate
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`current sensing circuit” illustrated in Chu’s Figure 16, shown below. Id.
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`
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`Chu’s disclosures resulted in a maximum efficiency of 82% for the master-
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`slave modulator. “The efficiency of the master-slave supply modulator is three
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`times higher than the efficiency of [a standalone class-AB supply modulator] at 16
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`dBm output power and indicates a significant efficiency improvement over the
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`-12-
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`

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`linear supply modulator at backed-off power levels.” Id. at 2817. Chu does not
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`include any discussion or illustration of a voltage boost mechanism for boosting a
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`battery voltage.
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`B. Overview of Choi 2010
`The Choi 2010 reference is an article entitled “Envelope Tracking Power
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`Amplifier Robust to Battery Depletion.” Ex. 1106 at Title. Choi 2010 describes a
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`“hybrid switching amplifier,” and Figure 2 illustrates how a PA supply modulator
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`topology affects the output power of the PA, as shown below:
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`Ex. 1106 at 1334.
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`Choi 2010’s objective is to develop an envelope tracking power amplifier
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`that prevents the degradation of output power that results from battery depletion.
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`-13-
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`

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`Ex. 1106 at 1333. To accomplish this objective, Choi 2010 discloses a system that
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`boosts the supply voltage of a linear amplifier to 5V, regardless of the battery
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`voltage variation, by coupling a 5V boost converter to the supply of the linear
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`amplifier as illustrated in Choi 2010’s Figure 5 below. Id. at 1333. The system in
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`Choi 2010 boosts the linear amplifier supply voltage, “while that of the buck
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`converter is still coupled to the battery in the HSA” so that “the supply modulator
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`dynamically regulates the PA with peak voltage of 4.5V.” Id.
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`
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`Thus, Choi 2010 teaches that this system always boosts the battery voltage
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`to 5V, regardless of battery voltage fluctuation in order to provide a stable supply
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`voltage to the RF PA. Id. at 1334. Choi 2010 recognizes that this continuous
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`voltage boost degrades efficiency of the supply, but accepts this degradation as an
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`acceptable compromise to achieve a stable supply voltage for the RF PA. Id. at
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`1335 (“the efficiency degradation by the additional boost converter is not serious
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`-14-
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`

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`because the load current provided by the linear amplifier is about 30% of the
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`overall load current”).
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`It is notable that four of the six authors of Choi 2010 were also authors of
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`the Kim paper that was distinguished during the prosecution of the ’558 Patent,
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`and Choi 2010 was also considered by the Examiner during prosecution. Ex. 1113
`
`at 255; Ex. 1106 at 1332; Ex. 1101 at Cover.
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`C. Overview of Myers
`
`Myers is a U.S. Patent titled “Method and Apparatus for High Efficiency
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`High Dynamic Range Power Amplification.” Ex. 1112 at Title. Myers discloses
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`an envelope elimination and restoration (EER) amplifier, which is “a technique
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`through which highly efficient but nonlinear radio frequency (RF) power
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`amplifiers can be combined with other, highly efficient amplifiers to produce a
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`high efficiency linear amplifier system.” Id. at 1:23-29. In Myers’ system, a
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`signal to be amplified is split into two paths, an amplitude path and a phase path.
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`Id. at 1:29-31. An envelope is detected and amplified in the amplitude path by a
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`class S or other power amplifier, which operates on the bandwidth of the RF
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`envelope rather than the RF bandwidth. Id. at 1:31-34. The phase component in
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`the phase path is then amplitude modulated by the amplified envelope signal,
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`creating an amplified replica of the input signal. Id. at 1:34-37. Myers explains
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`that in an EER amplifier, the dynamic range is limited by the range of the class S
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`
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`-15-
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`

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`modulator used to amplify the envelope, thus Myers discloses another type of EER
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`amplifier with a higher dynamic range. Id. at 1:37-40; 1:55-57.
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`Myers describes the use of pulsewidth modulators (PWMs) as part of a
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`switcher (i.e., class S modulator) implementation, and does not describe or relate to
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`linear envelope amplifiers. Id. at 1:62-67; 4:17-20 (“The operation of multi-range
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`modulator 200 described thus far is that of a class S modulator with a power source
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`of Vdd1.”); 6:1-5 (“The operation of multi-range modulator 300 described thus far
`
`is that of a class S modulator with a power source of Vdd1.”). The two voltage
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`sources in Myers are applied to a switcher, not a linear amplifier in a hybrid
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`structure, and neither of the voltages are “boosted” or result from a boosted
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`converter. The PWMs are depicted in Figures 2 and 3:
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`-16-
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`
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`As these figures illustrate, the PWM “outputs a pulsewidth modulated
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`waveform which has a duty cycle proportional to the amplitude of the envelope
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`signal.” Id. at 3:63-65. The driver “accepts the pulsewidth modulated signal from
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`PWM” and “drives switching transistor” and “logic gates.” Id. at 3:66-4:1. Myers
`
`does not disclose implementing the modulator with a PMOS transistor that receives
`
`a selectable power source. Specifically, although disclosing an embodiment in
`
`which the multi-range modulator “shares a common switching transistor coupled to
`
`ground” as shown in Figure 2, Myers never discloses an embodiment in which the
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`
`
`-17-
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`

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`two voltages Vdd1 and Vdd2 are selectably received by the same switching
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`transistor. Id. at 7:12-24; Figure 2. Rather, Myers explicitly discloses that “having
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`two separate pairs of switching transistors [as shown in Figure 3] further increases
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`efficiency.” Id.
`
`Myers’ Figure 8 illustrates a flow chart for amplifying a signal:
`
`
`
`Myers’ flowchart shows in step 820 that if the input is found to be less than
`
`the reference signal, Myers describes proceeding to step 830, in which a first
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`power source is selected for use in a pulsewidth modulator. Ex. 1112 at 9:26-30.
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`But if the input is greater than the reference, Myers’ process proceeds to step 840,
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`
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`-18-
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`

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`in which a second power source, greater than the first power source, is selected for
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`use with a pulsewidth modulator. Id. at 9:29-32.
`
`VI. GROUND I OF THE PETITION SHOULD BE DISMISSED
`BECAUSE IT IS BASED ON AN UNSUPPORTABLE CLAIM
`INTERPRETATION
`Ground I alleges that claims 6 and 8 of the ’558 Patent are obvious over the
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`
`
`combination of Chu and Choi 2010 as long as the claims are not construed to
`
`require a selective boost. Claims 6 and 8 recite “a P-channel metal oxide
`
`semiconductor (PMOS) transistor [having]…a source [receiving/that receives] the
`
`boosted supply voltage or the first supply voltage.” As detailed below, the only
`
`reasonable interpretation of this claim element, properly read within the context of
`
`the claim as a whole, is that the source of the PMOS transistor must be able to
`
`receive, selectively, either the boosted supply voltage or the first supply voltage
`
`(referred to herein as a “selective boost”). Ex. 2005 at ¶¶47-61. The interpretation
`
`proposed by Petitioner, on the other hand, renders much of the claim meaningless,
`
`and therefore cannot be correct. Without its unreasonable claim interpretation,
`
`Petitioner concedes that Ground I is insufficient and instead relies on Ground II.
`
`See Paper 3 at 53-54, n. 4. Ground I should therefore be denied for this reason.
`
`
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`Petitioner alleges that claims 6 and 8 require “that the PMOS transistor’s
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`source receive only one or the other of the boosted supply voltage and the first
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`supply voltage,” and that “[t]here is no basis to construe these limitations as
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`-19-
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`requiring the PMOS transistor’s source to be able to receive, selectively, either the
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`boosted supply voltage or the first supply voltage at any given time.” Paper 3 at 53,
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`n.4. Petitioner provides no further explanation for its construction.
`
`
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`Petitioner’s construction seemingly rests entirely on the word “or.” The use
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`of “or” is sometimes an acceptable mechanism for claiming alternatives such that
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`only one of the limitations need be found in the prior art to support anticipation.
`
`See In re Gaubert, 524 F.2d 1222, 187 USPQ 664 (CCPA 1975). Nevertheless,
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`under the broadest reasonable interpretation, a claim (even one reciting the word
`
`“or”) must be
`
`interpreted such
`
`that
`
`it receives
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`the broadest reasonable
`
`interpretation in light of the intrinsic record. See In re Translogic Tech., 504 F.3d
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`1249, 1257 (Fed. Cir. 2007). And “[i]t is highly disfavored to construe terms in a
`
`way that renders them void, meaningless, or superfluous.” Wasica Finance GmbH
`
`v. Continental Automotive Sys., Inc., 853 F.3d 1272, 1288 n.10 (Fed. Cir. 2017).
`
`The claim language here does not signify an alternative limitation as in In re
`
`Gaubert, because such a reading is inconsistent with the language of the claims
`
`and the specification.
`
`
`
`Contrary to Petitioner’s conclusory analysis provided in a footnote, an
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`interpretation of claims 6 and 8 without the “selective boost” operation would
`
`render portions of the claim meaningless, and therefore cannot be correct under the
`
`broadest reasonable interpretation (or any other standard). See Digital-Vending
`
`
`
`-20-
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`Servs. Int'l, LLC v. Univ. of Phoenix, Inc., 672 F.3d 1270, 1275 (Fed. Cir. 2012)
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`(“claims are interpreted with an eye toward giving effect to all terms in the claim.”);
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`Wasica Finance, 853 F.3d at 1288 n.10 (“highly disfavored” to interpret claim
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`terms in a way that renders them “meaningless”). This “selective boost” operation
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`is reflected in claim 6 of the ’558 Patent as follows:
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`6. An apparatus for wireless communication, comprising:
`a power amplifier operative to receive and amplify
`an input radio frequency (RF) signal and provide an
`output RF signal; and
`to receive an
`a supply generator operative
`envelope signal and a first supply voltage, to generate a
`boosted supply voltage having a higher voltage than the
`first supply voltage, and to generate a second supply
`voltage for the power amplifier based on the envelope
`signal and the boosted supply voltage, wherein the
`supply generator incorporates an operational amplifier
`(op-amp) operative to receive the envelope signal and
`provide an amplified signal, a driver operative to receive
`the amplified signal and provide a first control signal and
`a second control signal, a P-channel metal oxide
`transistor having a gate
`semiconductor
`(PMOS)
`receiving a first control signal, a source receiving the
`boosted supply voltage or the first supply voltage, and a
`drain providing the second supply voltage, and an N-
`channel metal oxide semiconductor (NMOS) transistor
`having a gate receiving the second control signal, a drain
`providing the second supply voltage, and a source
`coupled to circuit ground.
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`Ex. 1101 at 11:42-63 (emphasis added).1 As emphasized above, claim 6 requires
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`“a supply generator operative to… generate a boosted supply voltage having a
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`voltage higher than the first supply voltage” and further operative “to generate a
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`second supply voltage for the power amplifier based on the envelope signal and the
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`boosted supply voltage.” That is, the claimed “supply generator” must function to
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`generate “a boosted supply voltage.” Otherwise, these claim limitations are
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`meaningless.
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`But under Petitioner’s interpretation, the “boosted supply voltage” is an
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`optional limitation because the PMOS transistor within the supply generator need
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`only be able to receive one or the other of the boosted supply voltage and the first
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`supply voltage. For example, according to Petitioner, the PMOS transistor recited
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`in claims 6 and 8 may be only capable of receiving the first supply voltage. But
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`under this view, it would be impossible for the PMOS drain to provide “the second
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`supply voltage” that is “based on the envelope signal and the boosted supply
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`voltage.” Claim 6 requires that the second supply voltage is generated “based on
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`the envelope signal and the boosted supply voltage,” but if the PMOS transistor
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`receives the first supply voltage at its source, then it would necessarily “provide”
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`the first supply voltage at its drain, and not a second supply voltage “based on the
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`1 Similar limitations relating to the “selective boost” operation are also
`included in independent claim 8.
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`boosted supply voltage.” By similar logic, if the PMOS drain provides “the second
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`supply voltage” based on “the boosted supply voltage” then it is necessarily the
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`case that the PMOS source does not receive the first supply voltage.
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`
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`Additionally, Petitioner concedes that claim 7 requires a selective boost.
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`Claim 7 depends from claim 6 and recites “wherein the supply generator is
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`operative to generate the second supply voltage based on the envelope signal and
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`either the boosted supply voltage or the first supply voltage.” Petitioner
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`inconsistently recognizes the claim 7 limitation “the supply generator is operative
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`to generate the second supply voltage based on the envelope signal and either the
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`boosted supply voltage or the first supply voltage” as a selective boost, but not the
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`limitation “a source receiving the boosted supply voltage or the first supply voltage”
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`from claim 6. Ex. 2005 at ¶60. Both of these limitations recite a selective boost,
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`and claim 7 further limits claim 6 by requiring an additional mode of operation –
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`the supply generator must additionally be capable of generating a second supply
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`voltage based on the envelope signal and the first supply voltage. Id.
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`The only reasonable construction, consistent with the claim as a whole, is
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`that the claim element “a P-channel metal oxide semiconductor (PMOS) transistor
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`having… a source [receiving/that receives] the boosted supply voltage or the first
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`supply voltage” requires that the PMOS source be capable of receiving, selectively,
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`either the boosted supply voltage or the first supply voltage. In other words,
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`despite the claim’s inclusion of the conjunction “or,” the “boosted supply voltage”
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`and the “first supply voltage” are not alternative options – the claimed PMOS
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`source must be capable of receiving both. No other interpretation makes sense in
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`the context of the claim.
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`Petitioner’s expert agreed that it would not make sense to interpret the
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`boosted supply voltage as purely optional in the context of the claims. When asked
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`about this limitation, Dr. Apsel admitted that it makes sense to interpret it as
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`requiring a boosted supply voltage to be an available supply voltage received by
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`the source of the PMOS transistor. Ex. 2006 at 42:19-43:9. When pressed if she
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`could interpret it any other way, Dr. Apsel responded “I’m not sure.” Id. at 43:7-8.
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`If the boosted supply voltage must be an available supply voltage, then it is not
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`purely an alternative limitation.
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`The specification confirms that “selective boost” is the only reasonable
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`interpretation of claims 6 and 8. Ex. 2005 at ¶¶54-57. When the specification
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`recites the phrases “the boosted supply voltage or the first supply voltage” and “the
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`first supply voltage or the boosted supply voltage,” it always does so in the context
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`of a selective boost. For example:
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`In one design, the envelope amplifier may further receive
`the first supply voltage and may generate the second
`supply voltage based on either the first supply voltage or
`the boosted supply voltage. For example, the envelope
`amplifier may generate the second supply voltage (i)
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`based on the boosted supply voltage i