`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`Intel Corporation
`Petitioner
`
`V.
`
`Qualcomm Incorporated
`Patent Owner
`
`Case IPR2018-0l 153
`Patent 8,698,558
`
`DECLARATION OF DR. ARTHUR W. KELLEY
`
`I declare that all statements made herein on my own knowledge are true and
`
`that all statements made on information and belief are believed to be true, and
`
`further, that these statements were made with the knowledge that willful false
`
`statements and the like so made are punishable by fine or imprisonment, or both,
`
`under Section 1001 of Title 18 of the United States Code.
`
`By:
`
`CWliw °W. 1~ tf /25ho19
`
`Arthur W. Kelley, Ph.D.
`
`Intel Corporation v. Qualcomm Incorporated
`IPR2018-01153
`Exhibit 2005
`
`
`
`TABLE OF CONTENTS
`
`Professional Background ................................................................................. 3
`I.
`Relevant Legal Standards ................................................................................ 5
`II.
`III. THE ’558 PATENT ......................................................................................... 9
`A. Overview of the ’558 Patent .................................................................. 9
`B.
`Prosecution History of the ’558 Patent ............................................... 15
`C.
`Level of Skill in the Art ....................................................................... 19
`D.
`Claim Construction ............................................................................. 19
`1.
`“Envelope Signal” (Claims 1 and 6-8) ..................................... 19
`2.
`Selective Boost Limitations (Claims 6 and 8) .......................... 20
`IV. OVERVIEW OF THE CITED REFERENCES ............................................ 29
`A. Overview of Chu ................................................................................. 29
`B. Overview of Choi 2010 ....................................................................... 33
`C. Overview of Myers .............................................................................. 36
`V. GROUND I OF THE PETITION IS BASED ON AN
`UNSUPPORTABLE CLAIM INTERPRETATION .................................... 40
`VI. THE POSA WOULD NOT HAVE COMBINED CHU AND CHOI 2010 . 41
`VII. THE POSA WOULD NOT HAVE COMBINED MYERS WITH CHU
`AND CHOI 2010 ........................................................................................... 48
`A. A POSA Would Understand That Choi 2010 Teaches Away From
`“Selective Boost” ................................................................................ 49
`B. A POSA Would Not Have Combined Myers With Chu And
`Choi 2010 ............................................................................................ 51
`
`
`
`
`
`
`-i-
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`
`
`1.
`
`I am making this declaration at the request of Qualcomm Incorporated
`
`(“Qualcomm” or “Patent Owner”) in the matter of the Inter Partes Review of U.S.
`
`Patent No. 8,698,558 (“the ’558 Patent”).
`
`2.
`
`I am being compensated for my work in this matter at my standard
`
`hourly rate of $450 for consulting services. My compensation in no way depends
`
`on the outcome of this proceeding.
`
`3.
`
`a.
`b.
`
`c.
`d.
`
`e.
`
`f.
`
`g.
`
`In preparing this Declaration, I considered the following materials:
`
`The ’558 Patent (Ex. 1101) and its file history (Ex. 1102);
`Petition for Inter Partes Review of U.S. Patent No. 8,698,558,
`IPR2018-01153 (Paper 3) (“Petition” or “Paper 3”);
`The Declaration of Dr. Alyssa B. Apsel (Ex. 1103);
`Chu, W.Y., et al., “A 10 MHz Bandwidth, 2 mV Ripple PA Regulator
`for CDMA Transmitters,” IEEE Journal of Solid-State Circuits: 2809-
`2819 (2008) (“Chu”) (Ex. 1104);
`Choi, J., et al., “Envelope tracking power amplifier robust to battery
`depletion,” Microwave Symposium Digest (MTT), 2010 IEEE MTT-
`S International: 1332-36 (2010) (“Choi 2010”) (Ex. 1106);
`Blanken, P.G. et al., “A 50MHz Bandwidth Multi-Mode PA Supply
`Modulator for GSM, EDGE and UMTS Application,” 2008 Radio
`Frequency Integrated Circuits Symposium (IEEE) 401-04 (2008)
`(“Blanken”) (Ex. 1110);
`Kwak, T.W., et al., “A 2 W CMOS hybrid switching amplitude
`modulator for EDGE polar transmitters,” IEEE Journal of Solid-State
`Circuits 2666-76 (2007) (“Kwak”) (Ex. 1111);
`
`
`
`-1-
`
`
`
`h.
`
`i.
`
`j.
`
`U.S. Patent No. 5,929,702, “Method and Apparatus for High
`Efficiency High Dynamic Range Power Amplification,” to Myers, et
`al. (“Myers”) (Ex. 1112);
`Kim, D. et al., “High Efficiency and Wideband Envelope Tracking
`Power Amplifier with Sweet Spot Tracking,” Radio Frequency
`Integrated Circuits Symposium (RFIC): 255-258 (2010) (“Kim”) (Ex.
`1113);
`U.S. Patent No. 6,300,826, “Apparatus and Method for Efficiently
`Amplifying Wideband Envelope Signals,” to Mathe, et al. (“Mathe”)
`(Ex. 1114);
`k. Maxim Integrated Products, Inc., MAX9738 – 16VP-P Class G
`Amplifier with Inverting Boost Converter, Datasheet 19-3700, Rev. 0
`(March 2008) (“Maxim”) (Ex. 1115);
`Ertl et al., “Basic considerations and topologies of switched-mode
`assisted linear power amplifiers,” IEEE Transactions On Industrial
`Electronics, Vol. 44, No. 1 at 116-123 (1997) (“Ertl”) (Ex. 1116);
`m. Kang, D. et al., “A Multimode/Multiband Power Amplifier With a
`Boosted Supply Modulator,” IEEE Transactions on Microwave
`Theory and Techniques 58.10 (2010): 2598-2608 (“Kang”) (Ex.
`1117);
`U.S. Patent No. 5,834,977, “Amplifying Circuit with Power Supply
`Switching Circuit,” to Maehara, et al. (“Maehara”) (Ex. 1118);
`U.S. Patent No. 5,870,340, “Multiplexer,” to Ohsawa (“Ohsawa”)
`(Ex. 1119);
`U.S. Patent No. 6,566,935, “Power Supply Circuit With a Voltage,” to
`Renous (“Renous”) (Ex. 1120);
`Certificate of Correction for the ’558 Patent (Ex. 1121);
`-2-
`
`n.
`
`l.
`
`o.
`
`p.
`
`q.
`
`
`
`
`
`r.
`
`s.
`
`Initial Claim Construction Brief, Certain Mobile
`Qualcomm
`Electronic Devices and Radio Frequency and Processing Components
`Thereof, Investigation No. 337-TA-1065 (“Qualcomm Brief”) (Ex.
`1122);
`Order No. 28: Construing Terms of the Asserted Patents, Certain
`Mobile Electronic Devices and Radio Frequency and Processing
`Components Thereof, Investigation No. 337-TA-1065 (“Markman
`Order”) (Ex. 1123);
`Initial Determination and Recommended Determination, Certain
`Mobile Electronic Devices and Radio Frequency and Processing
`Components Thereof, Investigation No. 337-TA-1065 (“Initial
`Determination”) (Ex. 2007).
`PROFESSIONAL BACKGROUND
`4.
`I am an electrical and computer engineering consultant with over 35
`
`t.
`
`I.
`
`years of expertise and experience consulting on semiconductor technologies,
`
`including power management integrated circuits. I have provided my opinions
`
`and/or testimony as an expert witness in topics relating to power electronics in
`
`matters before the International Trade Commission, U.S. district courts, and the
`
`U.S. Patent Trial and Appeals Board.
`
`5.
`
`I earned bachelor’s (summa cum laude), master’s, and Ph.D. degrees
`
`in Electrical Engineering from Duke University. I received my Ph.D. degree in
`
`1984.
`
`-3-
`
`
`
`6.
`
`From 1985 to 1987, I worked as a senior engineer at Sundstrand
`
`Corporation, where I worked on power electronics in the aerospace applications
`
`field, including commercial aircraft, military aircraft, and spacecraft.
`
`7.
`
`From 1987 to 2001, I was a professor with the Department of
`
`Electrical and Computer Engineering at North Carolina State University, where I
`
`was tenured and became Associate Professor in 1993. During this time, I
`
`developed and taught undergraduate and graduate course curricula in power
`
`electronics. I also developed funded research programs in areas including power
`
`electronics, semiconductor devices, and power systems.
`
`8.
`
`From 2000 to 2007, I worked as a senior design engineer at Linear
`
`Technology Corporation, which designs, manufactures, and markets a broad line of
`
`high-performance
`
`integrated circuits for sale worldwide.
`
` My principal
`
`responsibilities in this role involved the design of high-performance analog
`
`integrated circuits for power management. Additionally, I was also responsible for
`
`other aspects of product and technology development, including product definition,
`
`layout, manufacture, debug, ESD, functional test, life test, characterization,
`
`correlation, and applications.
`
`9.
`
`Since September 2007, I have worked as an independent consultant
`
`advising clients in matters related to power electronics, semiconductor designs,
`
`switching regulators, and others.
`
`
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`-4-
`
`
`
`10.
`
`I have authored more than 30 publications on power electronics
`
`topics. I am also an inventor on 9 U.S. patents, all of which relate to power
`
`electronics.
`
`11.
`
`I served as the Editor-in-Chief of the IEEE Power Electronics
`
`Society’s newsletter from 2009 to 2012. From 2000 to 2002, I was the Editor-in-
`
`Chief of IEEE Transactions On Power Electronics, the premier journal in my field.
`
`In 2003, I received the IEEE Power Electronics Society Service Award. And in
`
`1997, I was the program chair for the IEEE Power Electronics Specialists
`
`Conference.
`
`12. These and other qualifications and experiences are described in my
`
`curriculum vitae, which is attached at Appendix A.
`
`II. RELEVANT LEGAL STANDARDS
`13.
`I have been asked to provide my opinion as to whether claims 1-9 of
`
`the ’558 Patent are anticipated by the alleged prior art or would have been obvious
`
`to a person of ordinary skill in the art (“POSA”) at the time of the alleged
`
`invention, in view of the alleged prior art.
`
`14.
`
`I am an engineer by training and profession. The opinions I am
`
`expressing in this Declaration involve the application of my engineering
`
`knowledge and experience to the evaluation of certain alleged prior art with respect
`
`to the ’558 Patent. Aside from my experience in litigation support, my knowledge
`
`
`
`-5-
`
`
`
`of patent law is no different than that of any lay person. Therefore, I have
`
`requested the attorneys from Jones Day, who represent Qualcomm, to provide me
`
`with guidance as to the applicable patent law in this matter. The paragraphs below
`
`express my understanding of how I must apply current principles related to
`
`patentability.
`
`15.
`
`It is my understanding that in determining whether a patent claim is
`
`anticipated or obvious in view of the alleged prior art, the Patent Office must
`
`construe the claim by giving the claim its broadest reasonable interpretation
`
`consistent with the specification as it would have been understood by one of
`
`ordinary skill in the art. For the purposes of this review, I have construed each
`
`claim term in accordance with its plain and ordinary meaning under the required
`
`broadest reasonable interpretation.
`
`16.
`
`It
`
`is my understanding
`
`that a claim
`
`is unpatentable under
`
`35 U.S.C. § 102 if each and every element and limitation of the claim is found
`
`either expressly or inherently in a single prior art reference.
`
`17.
`
`It
`
`is my understanding
`
`that a claim
`
`is unpatentable under
`
`35 U.S.C. § 103 if the claimed subject matter as a whole would have been obvious
`
`to a POSA at the time of the alleged invention. I also understand that an
`
`obviousness analysis takes into account the scope and content of the prior art, the
`
`
`
`-6-
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`
`
`differences between the claimed subject matter and the prior art, and the level of
`
`ordinary skill in the art at the time of the invention.
`
`18.
`
`In determining the scope and content of the prior art, it is my
`
`understanding that a reference is considered appropriate prior art if it falls within
`
`the field of the inventor’s endeavor. In addition, a reference is prior art if it is
`
`reasonably pertinent to the particular problem with which the inventor was
`
`involved. A reference is reasonably pertinent if it logically would have
`
`commended itself to an inventor’s attention in considering his problem. If a
`
`reference relates to the same problem as the claimed invention, that supports use of
`
`the reference as prior art in an obviousness analysis.
`
`19. To assess the differences between prior art and the claimed subject
`
`matter, it is my understanding that 35 U.S.C. § 103 requires the claimed invention
`
`be considered as a whole. This “as a whole” assessment requires showing that one
`
`of ordinary skill in the art at the time of invention, confronted by the same
`
`problems as the inventor and with no knowledge of the claimed invention, would
`
`have selected the elements from the prior art and combined them in the claimed
`
`manner.
`
`20.
`
`It is my understanding that the Supreme Court has recognized several
`
`rationales for combining references or modifying a reference to show obviousness
`
`of claimed subject matter. Some of these rationales include: combining prior art
`
`
`
`-7-
`
`
`
`elements according to known methods to yield predictable results; simple
`
`substitution of one known element for another to obtain predictable results; a
`
`predictable use of prior art elements according to their established functions;
`
`applying a known technique to a known device (method or product) ready for
`
`improvement to yield predictable results; choosing from a finite number of
`
`identified, predictable solutions, with a reasonable expectation of success; and
`
`some teaching, suggestion, or motivation in the prior art that would have led one of
`
`ordinary skill to modify the prior art reference or to combine prior art reference
`
`teachings to arrive at the claimed invention.
`
`21.
`
`It is my further understanding that there are certain limits on
`
`combining references in an obviousness determination. One limit is that the
`
`combination of references cannot be based on impermissible hindsight. I
`
`understand that impermissible hindsight may occur if, for example, different
`
`components are selectively culled from the prior art to fit the parameters of the
`
`invention, without a teaching or suggestion within the prior art, or within the
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`general knowledge of a person of ordinary skill in the field of the invention, to
`
`look to particular sources of information, to select particular elements, and to
`
`combine them in the way they were combined by the inventor. Another limit on
`
`combining references is when a reference teaches away from a specific
`
`combination. I understand that a first prior art reference may teach away from a
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`
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`-8-
`
`
`
`second reference if the first reference discourages a POSA from following the path
`
`set out in the second reference, or would be led in a direction divergent from the
`
`path taken by the applicant. Additionally, I understand that even if a reference is
`
`not found to teach away, its statements regarding preferences are still relevant to a
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`finding regarding whether a POSA would be motivated to combine that reference
`
`with another reference.
`
`III. THE ’558 PATENT
`A. Overview of the ’558 Patent
`22. U.S. Patent No. 8,698,558 (the “’558 Patent”) is titled “Low-Voltage
`
`Power-Efficient Envelope Tracker.” The ’558 Patent was filed on June 23, 2011.
`
`The ’558 Patent relates to an envelope tracking technique used to manage power in
`
`radio frequency (RF) transmission of a mobile device. Specifically, the ’558
`
`Patent discloses employing two different power sources, namely an envelope
`
`amplifier and a switcher, to supply time-varying supply voltage to an RF power
`
`amplifier (“PA”). The RF PA is responsible for amplifying a low-power RF signal
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`into a higher power signal for external transmission via an antenna. As the PA is
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`one of the most power-consuming components in RF circuitries, the performance
`
`and efficiency of a PA is critical for the overall power performance of a mobile
`
`device.
`
`
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`-9-
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`
`
`23.
`
`In the prior art, a PA in RF transmission typically used a constant
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`power supply voltage, as shown in Figure 2A of the ’558 Patent below:
`
`
`
`24. Because the power required by the PA varies depending on the
`
`envelope of the RF signal, using a constant power supply voltage led to
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`unnecessary dissipation of power. In mobile devices, such constant power
`
`provision undesirably and prematurely uses the battery. Furthermore, the unused
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`power is dissipated as residual heat within an electronic device, and overexposure
`
`of integrated circuits and other electrical components to heat may degrade the
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`reliability of the device. As a result, the useful lifetime of the device can be
`
`considerably shortened.
`
`25. The ’558 Patent employs a technique called “envelope tracking” to
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`better tailor power consumption to needed power usage. Envelope tracking works
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`by adaptively increasing or decreasing the power supply voltage of the PA to more
`
`closely match the amplitude of the output RF signal. As a result, wasted power
`
`
`
`-10-
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`
`
`and unnecessary heat is minimized. See Ex. 1101 at 4:26-30. This is shown in
`
`Figure 2C of the ’558 Patent:
`
`
`
`With this configuration, “the difference between the PA supply voltage and the
`
`envelope of the RFout signal is small, which results in less wasted power.” Id.
`
`26. Although envelope tracking is a helpful technique, there are
`
`challenges to implementing it in a mobile device. Unlike base stations that receive
`
`a constant supply of power, a mobile device relies on a battery for its operations,
`
`including powering an RF PA for data transmissions. The battery voltage,
`
`however, decreases as the battery is discharged, and is not always sufficiently high
`
`for the PA to amplify an input RF signal to a desired output power level. See id. at
`
`3:46-56.
`
`27. This is particularly problematic for user experience because, whether
`
`a smartphone is fully charged or at a 10% battery level, a user should be able to
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`perform all normal operations of the device, including web browsing and video
`
`chatting, until the battery dies. But if the PA does not transmit signals accurately
`
`at low battery, then low battery would effectively handicap the operations of a
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`
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`-11-
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`
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`smartphone and prevent the user from squeezing the remaining power out of the
`
`battery.
`
`28. To address this issue, the ’558 Patent discloses an extremely efficient
`
`design for an envelope tracker that utilizes different power sources: a switcher and
`
`a linear envelope amplifier. These two power sources work together to efficiently
`
`generate the PA supply voltage.
`
`29. A switcher—also known as a “switching regulator”—is highly
`
`efficient because it relies on an energy storage element such as an inductor that can
`
`store energy and release it at a desired voltage level, thus dissipating minimal heat.
`
`Because an inductor is charged only when the switcher is “on,” the system can
`
`regulate the output voltage level by controlling the duration of the time the
`
`switcher is “on.”
`
`30.
`
`In contrast, a linear envelope amplifier (or simply an “envelope
`
`amplifier”) is less efficient because it uses a linear topology, meaning it
`
`continuously receives input power and dissipates unused power as heat in order to
`
`set the voltage output at the desired level. An envelope amplifier is easier to
`
`implement than a switcher, however, because there is no need for a switching
`
`mechanism such as charging and discharging of an inductor. The envelope
`
`amplifier is thus better suited than the switcher for supplying rapidly-fluctuating
`
`
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`-12-
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`
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`voltages because, when the output power needs to be quickly increased and
`
`decreased, turning the switcher on and off to handle such variations can be costly.
`
`31.
`
`In light of these unique benefits provided by a switcher and an
`
`envelope amplifier, the overall system efficiency can be optimized if the two
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`suppliers of energy are operated in tandem such that (1) the switcher, which is
`
`more efficient, provides a majority of energy to the PA; and (2) the envelope
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`amplifier, which is less efficient but can more quickly adjust its output, provides
`
`only the fast-changing (i.e., high frequency) portion of the energy to the PA.
`
`32.
`
`In such a system comprising dual sources of PA supply voltage, the
`
`’558 Patent discloses at least two inventive approaches to further improving the
`
`overall efficiency. First, the ’558 Patent discloses connecting a boost converter
`
`(which “boosts” or increases the battery voltage to a higher level) only with the
`
`envelope amplifier, and not the switcher, to reduce overall usage of the boost
`
`converter. Because the switcher provides power most of the time, the efficiency
`
`drag from the boost converter is thus limited to the time in which the envelope
`
`amplifier provides power. See id. at 8:17-23. Moreover, the ’558 Patent teaches
`
`that the boost converter is operated dynamically, i.e., “only when needed for large
`
`amplitude envelope.” See id. at 6:29-33, 5:31-49, 8:55-62. When a boosted
`
`voltage is not needed, the envelope amplifier operates based on the battery voltage
`
`without relying on the boost converter. See id. at 6:29-33, 5:31-49. By
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`
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`-13-
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`
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`minimizing the efficiency drop caused by the addition of a boost converter, the
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`’558 Patent introduces an efficient and practical solution to integrate a boost
`
`converter into an envelope tracking circuitry. I refer to this feature as “selective
`
`boost.”
`
`33. Second, the ’558 Patent discloses that an “offset” may be used to
`
`increase the amount of current generated by the switcher. See Ex. 1101 at 7:41-48.
`
`The switcher includes a current sense amplifier that senses the current generated
`
`from the linear envelope amplifier and uses that current to output voltages that
`
`determine the duty cycle of a switcher.
`
`34. For example, in Figure 5 of the ’558 Patent, when the Current Sense
`
`Amplifier 330 senses a high output current from the Envelope Amplifier, it
`
`provides a low sensed voltage to Driver 332, turning the switcher “on.” See id. at
`
`5:7-10. Conversely, when the Current Sense Amplifier 330 senses a low output
`
`current from the Envelope Amplifier, it provides a high sensed voltage to driver
`
`332, turning the switcher “off.” See id. at 5:18-20. As explained above, it is only
`
`during the “on” state that the Switcher provides current, through the inductor 142,
`
`to the PA. Thus, the longer the switcher is turned “on,” the larger the current
`
`supplied to the PA.
`
`35. By using an offset to change the output of the current sense amplifier,
`
`one can increase the current supplied by the switcher. There are a number of ways
`
`
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`-14-
`
`
`
`to implement such an offset feature. For example, as provided by the ’558 Patent,
`
`one can add an offset to increase “the pulse width of an output signal from current
`
`sense amplifier.” See id. at 7:30-32. A pulse width is a commonly used term in
`
`digital signaling and simply refers to the duration of the time the signal is in a
`
`particular state (i.e., high or low). In the context of the embodiment shown in
`
`Figure 5, increasing the pulse width of an output signal from current sense
`
`amplifier would increase the on-time of the switcher, causing it to generate a larger
`
`current to the PA.
`
`B.
`36.
`
`Prosecution History of the ’558 Patent
`I have reviewed the prosecution history of the ’558 Patent. Following
`
`is a brief summary of key events.
`
`37. The initial application (Application No. 13/167,659) was filed on June
`
`23, 2011.
`
`38. On November 23, 2012, original claims 1, 2, 6-17, 19-21, 24-26 were
`
`rejected under 35 USC 102(a) as being anticipated by Kim, et al., titled “High
`
`Efficiency and Wideband Envelope Tracking Power Amplifier with Sweet Spot
`
`Tracking” (“Kim”) (Ex. 1113). The Examiner reasoned that Kim discloses a
`
`hybrid switching supply modulator for an RF PA consisting of a 3.4 V to 5 V boost
`
`converter and a linear amplifier. See Ex. 1102 at 61-63. The Examiner also
`
`indicated that original claims 4, 5, 18, 22, and 23 would be allowable if rewritten in
`
`
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`-15-
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`
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`independent form. Original claims 4, 5 and 18 recited an op-amp, a driver, a
`
`PMOS transistor having a source receiving either the boosted voltage or the supply
`
`voltage, and an NMOS transistor, and original claims 22 and 23 recited a summer,
`
`a current sense amplifier, and a driver.
`
`39.
`
`In response, the applicants amended certain claims as highlighted
`
`below.
`
`See Ex. 1102 at 79-80.
`
`
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`-16-
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`
`
`
`
`40. The inclusion of selective boost is reflected in both the envelope
`
`amplifier limitation reciting the different modes of operation and also in the PMOS
`
`transistor limitations reciting that its source receives the boosted supply voltage or
`
`the first supply voltage. Thus, with respect to Kim, the applicants explained that
`
`Kim does not teach, among other things, “a [PMOS] transistor having . . . a source
`
`receiving the boosted supply voltage or the first supply voltage.” Id. at 87.
`
`41. The basis on which Kim was distinguished is consistent with my
`
`interpretation of Kim. Kim teaches using a 5 V boost converter to achieve “higher
`
`gain, efficiency, output power and wider bandwidth.” Ex. 1113 at 255; see also id.
`
`at 256 (“By boosting the supply voltage of the linear amplifier, PA’s supply
`
`voltage increases up to 4.5 V and peak output power of the PA also increases to
`
`33.4 dBm.”). Kim’s exemplary implementation of the linear amplifier further
`
`shows that the output stage PMOS transistor is only connected to the output of the
`
`boost converter.
`
`
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`-17-
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`
`
`
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`42. On July 26, 2013, the Examiner allowed all claims but original claim
`
`8, citing U.S. Pub. No. 2012/0293253 (“Khlat”) as allegedly anticipating claim 8.
`
`
`
`-18-
`
`
`
`See Ex. 1102 at 161-162. In response, the applicant cancelled original claim 8 (see
`
`id. at 176), and the patent issued shortly thereafter. See id. at 185-191.
`
`C. Level of Skill in the Art
`43.
`I understand that Petitioner has proposed that a person of ordinary
`
`skill in the art relevant to the ’558 Patent would have had a Master’s degree in
`
`Electrical Engineering, Computer Engineering, or Computer Science plus at least
`
`two years of relevant experience; or a Bachelor’s degree in one of those fields plus
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`at least four years of relevant experience, where “relevant experience,” in the
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`context of the ’558 Patent, refers to experience with mobile device architecture, as
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`well as transmission and power circuitry for radio frequency devices.
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`44.
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`45.
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`I do not dispute Petitioner’s proposed level of ordinary skill in the art.
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`It is my understanding that when interpreting the claims of the ’558
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`Patent, I must do so based on the perspective of one of ordinary skill in the art at
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`the relevant priority date. I understand that the ’558 Patent was filed on June 23,
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`2011.
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`D. Claim Construction
`“Envelope Signal” (Claims 1 and 6-8)
`I understand that Petitioner applied an interpretation of the term
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`46.
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`1.
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`“envelope signal” to mean “signal indicative of the upper bound of the output RF
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`signal.” See Paper 3 at 36-37. I do not contest this claim interpretation.
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`-19-
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`2.
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`Selective Boost Limitations (Claims 6 and 8)
`I understand that Petitioner and Dr. Apsel dispute whether claims 6
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`47.
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`and 8 of the ’558 Patent require a selective boost. See Paper 3 at 53-54; id. at 61;
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`Ex. 1103 at ¶103, n.4; id. at ¶115, n.5. Specifically, claim 6 of the ’558 Patent
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`recites “a P-channel metal oxide semiconductor (PMOS) transistor having… a
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`source receiving the boosted supply voltage or the first supply voltage,” and claim
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`8 of the ’558 Patent recites “a P-channel metal oxide semiconductor (PMOS)
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`transistor [having]… a source that receives the boosted supply voltage or the first
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`supply voltage.” Petitioner argues that these limitations require “that the PMOS
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`transistor’s source receive only one or the other of the boosted supply voltage and
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`the first supply voltage.” See id. I disagree.
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`48.
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`In my opinion, it is clear from the plain language of claims 6 and 8,
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`reading the claims as a whole, and from the specification and prosecution history
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`of the ’558 Patent, that the claims require the PMOS transistor be able to receive,
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`selectively, either the boosted supply voltage or the first supply voltage (referred to
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`herein as a “selective boost”).
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`49.
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`In my opinion, Petitioner’s interpretation would render portions of the
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`claims meaningless. For example, claim 6 of the ’558 Patent recites:
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` An apparatus
`6.
`comprising:
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`for wireless communication,
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`
`
`-20-
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`
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`a power amplifier operative to receive and amplify
`an input radio frequency (RF) signal and provide an
`output RF signal; and
`to receive an
`a supply generator operative
`envelope signal and a first supply voltage, to generate a
`boosted supply voltage having a higher voltage than the
`first supply voltage, and to generate a second supply
`voltage for the power amplifier based on the envelope
`signal and the boosted supply voltage, wherein the
`supply generator incorporates an operational amplifier
`(op-amp) operative to receive the envelope signal and
`provide an amplified signal, a driver operative to receive
`the amplified signal and provide a first control signal and
`a second control signal, a P-channel metal oxide
`transistor having a gate
`semiconductor
`(PMOS)
`receiving a first control signal, a source receiving the
`boosted supply voltage or the first supply voltage, and a
`drain providing the second supply voltage, and an N-
`channel metal oxide semiconductor (NMOS) transistor
`having a gate receiving the second control signal, a drain
`providing the second supply voltage, and a source
`coupled to circuit ground.
`
`50. Ex. 1101, 11:42-63 (emphasis added). Claim 8 of the ’558 Patent
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`recites similar limitations. As I emphasized above, claim 6 requires “a supply
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`generator operative to . . . generate a boosted supply voltage having a voltage
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`higher than the first supply voltage” and further operative “to generate a second
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`supply voltage for the power amplifier based on the envelope signal and the
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`boosted supply voltage.” The “supply generator” must function to generate “a
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`boosted supply voltage.” Otherwise, these claim limitations are meaningless.
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`51. Petitioner’s interpretation requires the source of the PMOS transistor
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`need only be capable of receiving one or the other of the “boosted supply voltage”
`-21-
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`
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`and “first supply voltage.” Petitioner therefore interprets these to be merely
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`optional limitations. According to Petitioner, if the source of the PMOS transistor
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`is capable of receiving one, then it need not be capable of receiving the other,
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`making the other supply voltage purely optional.
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` Applying Petitioner’s
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`interpretation in the context of claim 6 means that the PMOS transistor may be
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`only capable of receiving the first supply voltage. But this interpretation would
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`make no sense in the context of the rest of the claim, because it would be
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`impossible for the PMOS drain to provide “the second supply voltage” that is
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`“based on the envelope signal and the boosted supply voltage,” which claim 6
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`requires. If the PMOS transistor receives the first supply voltage at its source, then
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`it would necessarily “provide” the first supply voltage at its drain, and not a second
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`supply voltage “based on the boosted supply voltage.”
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`52. By similar logic, if the PMOS transistor’s drain provides “the second
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`supply voltage” based on “the boosted supply voltage” then it must be true that the
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`PMOS transistor’s source does not receive the first supply voltage during those
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`occasions.
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`53. The only construction that makes sense is that the claim element “a P-
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`channel metal oxide semiconductor (PMOS) transistor having… a source
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`[receiving/that receives] the boosted supply voltage or the first supply voltage”
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`requires that the PMOS transistor source is capable of receiving, selectively, either
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`
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`-22-
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`
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`the boosted supply voltage or the first supply voltage. In other words, the “boosted
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`supply voltage” and the “first supply voltage” are not purely optional – the claimed
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`PMOS transistor source must be capable of receiving both.
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`54. The specification of the ’558 Patent confirms my opinion that
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`“selective boost” is the only reasonable interpretation of claims 6 and 8. For
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`example, when the specification uses phrases like “the boosted supply voltage or
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`the first supply voltage” and “the first supply voltage or the boosted supply
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`voltage,” it always does so when describing a selective boost. Below are some
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`examples:
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`In one design, the envelope amplifier may further receive
`the first supply voltage and may generate the second
`supply voltage based on either the first supply voltage or
`the boosted supply voltage. For example, the envelope
`a