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`[DOCKETNO.HN00fi
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`LOW-VOLTAGE POWER-EFFICIENT ENVELOPE TRACKER
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`1.
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`Field
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`BACKGROUND
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`[000]]
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`The present disclosure relates generally to electronics, and more Specifically to
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`techniques for generating a power supply for an amplifier andfor other circuits.
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`[1.
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`Backgrmmd
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`[0002]
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`In a communication system, a transmitter may process (c.g., encode and
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`modulate) data to generate output samples. The transmitter may further condition (e.g.,
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`convert
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`to analog, filter, frequency upconvert, and amplify) the Output samples to
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`generate an output radio frequency (RF) signal. The transmitter may then transmit the
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`output RF signal via a communication channel to a receiver. The receiver may receive
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`the transmitted RF signal and perform the complementary processing on the received
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`RF signal to recover the transmitted data.
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`[0003]
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`The transmitter typically includes a power amplifier (PA) to provide high
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`transmit power for the output RF signal. The power amplifier should be able to provide
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`high output power and have high power-added efficiency (PAE). Furthermore,
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`the
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`power amplifier may be required to have good performance and high PAE even with a
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`low battery voltage.
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`[0004]
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`Techniques for efficiently generating a power supply for a power amplifier
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`SUMMARY
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`andfor other circuits are described herein.
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`In one exemplary design, an apparatus (c.g.,
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`an integrated cirCuit, a wireless device, a circuit module, etc.) may include an envelope
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`amplifier and a boost converter. The boost converter may receive a first supply voltage
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`(e.g., a battery voltage) and generate a boosted supply voltage having a higher voltage
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`than the first supply voltage. The envelope amplifier may receive an envelope signal
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`and the boosted supply voltage and may generate a second supply voltage based on the
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`envelope signal and the boosted supply voltage. The apparatus may further include a
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`power amplifier, which may operate based on the second supply voltage from the
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`envelope amplifier.
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`In one design, the envelope amplifier may further receive the first
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`supply voltage and may generate the second supply voltage based on either the first
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`INTEL 1002
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`INTEL 1002
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`[DOCKET NO. It” 005]
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`2
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`supply voltage or the boosted supply voltage. For example, the envelope amplifier may
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`generate the second supply voltage (i) based on the boosted supply voltage if the
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`envelope signal exceeds a first threshold andfor if the first supply voltage is below a
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`second threshold or (ii) based on the first supply voltage otherwise.
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`[0005]
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`In another exemplary design, an apparatus may include a switcher, an envelope
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`amplifier, and a power amplifier. The switcher may receive a first supply voltage (e.g.,
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`a battery voltage) and previde a first supply current. The envelope amplifier may
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`receive an envelope signal and provide a second supply current based on the envelope
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`signal. The power amplifier may receive a total supply current comprising the first
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`supply current and the second supply current. The first supply current may include
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`direct current (DC) and low frequency components. The second supply current may
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`include higher frequency components. The apparatus may further include a boost
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`converter, which may receive the first supply voltage and provide a boosted supply
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`voltage. The envelope amplifier may then operate based on either the first supply
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`voltage or the boosted supply voltage.
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`[0006]
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`In yet another exemplary design, an apparatus may include a switcher that may
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`sense an input current and generate a switching signal to charge and discharge an
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`inductor providing a suppiy current. The switcher may add an offset to the input current
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`to generate a larger supply current than without the offiset. The apparatus may further
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`include an envelope amplifier, a boost converter, and a power amplifier, which may
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`operate as described above.
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`[0007]
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`Various aspects and features of the disclosure are described in fiirther detail
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`below.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`[0008]
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`[0009]
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`[0010]
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`[0011]
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`FIG. I shows a block diagram of a wireless communication device.
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`FIGS. 2A, 23 and 2C show diagrams ofoperating a power amplifier based on a
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`battery voltage, an average power tracker, and an envelope tracker, respectively.
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`FIG. 3 shows a schematic diagram ofa switcher and an envelope amplifier.
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`FIGS. 4A, 4B and 4C show plots of PA supply current and inductor current
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`versus time for different supply voltages for the switcher and the envelope amplifier.
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`[0012]
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`FIG. 5 shows a schematic diagram of a switcher with offset in a current sensing
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`path.
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`[0013]
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`FIG. 6 shows a schematic diagram of a boost converter.
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`[DOCKET NO. 101005]
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`DETAILED DESCRIPTION
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`[0014]
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`The word “exemplary” is used herein to mean “serving as an example, instance,
`99
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`or illustration. Any design described herein as “exemplary" is not necessarily to be
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`construed as preferred or advantageous over other designs.
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`[0015]
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`Techniques for generating a power supply for an amplifier and/or other circuits
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`are described herein. The techniques may be used for various types of amplifiers such
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`as power amplifiers, driver amplifiers, etc. The techniques may also be used for various
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`electronic devices such as wireless communication devices, cellular phones, personal
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`digital assistants (PDAs), handheld devices, wireless modems,
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`laptop computers,
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`cordless phones, Bluetooth devices, consumer electronic devices, etc. For clarity, the
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`use of the techniques to generate a power supply for a power amplifier in a wireless
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`communication device is described below.
`
`[0016]
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`FIG. 1 shows a block diagram ofa design ofa wireless communication device
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`.100. For clarity, only a transmitter portion of wireless device 100 is shown in FIG. 1,
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`and a receiver portion is not shown. Within wireless device 100, a data processor 1 10
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`may receive data to be transmitted, process (e.g., encode, interleave, and symbol map)
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`the data, and provide data symbols. Data processor 110 may also process pilot and
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`provide pilot symbols. Data processor 1 10 may also process the data symbols and pilot
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`symbols for code division multiple access (CDMA),
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`time division multiple access
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`(TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA),
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`single-carrier FDMA (SC-FDMA), andz’or some other multiplexing scheme and may
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`provide output symbols.
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`[0017]
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`A modulator 112 may receive the Output symbols from data processor 110,
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`perform quadrature modulation, polar modulation, or some other type of modulation,
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`and provide Output samples. Modulator 112 may also determine the envelope of the
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`output samples, e.g., by computing the magnitude of each output sample and averaging
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`the magnitude across output samples. Modulator l 12 may provide an envelope signal
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`indicative ofthc envelope ofthe output samples.
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`[0018]
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`An RF transmitter 120 may process (e.g.. convert to analog, amplify, filter, and
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`frequency upconvert) the output samples from modulator 112 and provide an input RF
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`signal (RFin). A power amplifier (PA) 130 may amplify the input RF signal to obtain
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`the desired output power level and provide an output RF signal (RFout), which may be
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`transmitted via an antenna (not shown in FIG. 1). RF transmitter 120 may also include
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`[DOCKET NO. 101005]
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`4
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`circuits to generate the envelope signal, instead of using modulator l 12 to generate the
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`envelope signal.
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`[0019]
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`A PA supply generator 150 may receive the envelope signal from modulator 112
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`and may generate a power supply voltage (Vpa) for power amplifier 130. PA supply
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`generator 150 may also be referred to as an envelope tracker.
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`In the design shown in
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`FIG. 1, PA supply generator 150 includes a switcher 160, an envelope amplifier (Env
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`Amp) 170, a boost converter 180, and an inductor [62. Switcher 160 may also be
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`referred to as a switching-mode power supply (SMPS). Switcher 160 receives a battery
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`voltage (Vbat') and prevides a first supply current (lind') comprising DC and low
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`frequency components at node A.
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`Inductor 162 stores current from switcher 160 and
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`provides the stored current to node A on alternating cycles. Boost converter [80
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`receives the Vbat voltage and generates a boosted supply voltage (Vboost) that is higher
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`than the Vbat voltage. Envelope amplifier 170 receives the envelope signal at its signal
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`input, receives the Vbat voltage and the Vboost voltage at its two power supply inputs,
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`and provides a second supply current (Ienv) comprising high frequency components at
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`node A. The PA supply current (lpa) provided to power amplifier 130 includes the [ind
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`current from switcher 160 and the lenv current from envelope amplifier 170. Envelope
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`amplifier 170 also prevides the proper PA supply voltage (Vpa) at Node A for power
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`amplifier 130. The various circuits in PA supply generator 150 are described in further
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`detail below.
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`[0020]
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`A controller 140 may control the operation of various units within wireless
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`device 100. A memory 142 may store program codes and data for controller 140 and/or
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`other units within wireless device 100. Data processor 110, modulator 112, controller
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`140, and memory 142 may be implemented on one or more application specific
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`integrated circuits (ASICs) and/“or other ICs.
`
`[002]]
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`FIG. 1 shows an exemplary design of wireless device 100. Wireless device 100
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`may also be implemented in other manners and may include different circuits than those
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`shown in FIG. 1. All or a portion of RF transmitter 120, power amplifier 130, and PA
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`supply generator 150 may be implemented on one or more analog integrated circuits
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`([Cs), RF ICs (RFICs), mixed-signal ICs. etc.
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`|0022|
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`It may be desirable to operate wireless device 100 with a low battery voltage in
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`order to reduce power consumption, extend battery life, and/or obtain other advantages.
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`New battery technology may be able to provide energy down to 2.5 volts (V) and below
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`in the near future. However, a power amplifier may need to operate with a PA supply
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`5
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`voltage (e.g._. 3.2V) that is higher than the battery voltage. A boost converter may be
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`used to boost the battery voltage to generate the higher PA supply voltage. However.
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`the use of the boost converter to directly supply the PA supply voltage may increase
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`cost and power consumption, both of which are undesirable.
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`[0023]
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`PA supply generator 150 can efficiently generate the PA supply voltage with
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`envelope tracking to avoid the disadvantages of using a boost converter to directly
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`provide the PA supply voltage. Switcher 160 may provide the bulk of the power for
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`power amplifier I30 and may be connected directly to the battery voltage. Boost
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`converter 180 may provide power to only envelope amplifier I70. PA supply generator
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`150 can generate the PA supply voltage to track the envelope of the RFin signal
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`provided to power amplifier 130, so thatjust the proper amount of PA supply voltage is
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`supplied to power amplifier 130.
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`[0024]
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`FIG. 2A shows a diagram of using a battery voltage for a power amplifier 210.
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`The RFout signal (which follows the RFin signal) has a time-varying envelope and is
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`shown by a plot 250. The battery voltage is shown by a plot 260 and is higher than the
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`largest amplitude of the envelope in order to avoid clipping of the RFout signal from
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`power amplifier 210. The difference between the battery voltage and the envelope of
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`the RFout signal represents wasted power that is dissipated by power amplifier 210
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`instead of delivered to an output load.
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`[0025]
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`FIG. 23 shows a diagram of generating a PA supply voltage (Vpa) for power
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`amplifier 210 with an average power tracker (APT) 220. APT 220 receives a power
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`control signal indicating the largest amplitude of the envelope of the RFout signal in
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`each time interval. APT 220 generates the PA supply voltage (which is shown by a plot
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`270) for power amplifier 210 based on the power control signal. The difference
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`between the PA supply voltage and the envelope of the RFout signal represents wasted
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`power. APT 220 can reduce wasted power since it can generate the PA supply voltage
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`to track the largest amplitude of the envelope in each time interval.
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`[0026]
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`FIG. 2C shows a diagram of generating a PA supply voltage for power amplifier
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`210 with an envelope tracker 230. Envelope tracker 230 receives an envelope signal
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`indicative of the envelope of the RFout signal and generates the PA supply voltage
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`(which is shown by a plot 280') for power amplifier 210 based on the envelope signal.
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`The PA supply voltage closely tracks the envelope of the RFout signal over time.
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`Hence, the difference between the PA supply voltage and the envelope of the RFout
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`[DOCKET NO. 101005]
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`6
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`signal is small, which results in less wasted power. The power amplifier is operated in
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`saturation for all envelope amplitudes in order to maximize PA efficiency.
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`[0027]
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`PA supply generator 150 in FIG.
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`1 can implement envelope tracker 230 in FIG.
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`2C with high efficiency. This is achieved by a combination of (i) an efficient switcher
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`160 to generate a first supply current (lind) with a switch mode power supply and (ii) a
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`linear envelope amplifier 170 to generate a second supply current (lenv).
`
`[0028]
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`FIG. 3 shows a schematic diagram ofa switcher 160a and an envelope amplifier
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`170a, which are one design of switcher 160 and envelope amplifier 170, respectively, in
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`FIG. 1. Within envelope amplifier 170a, an operational amplifier (op-amp) 310 has its
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`non—inverting input receiving the envelope signal,
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`its inverting input coupled to an
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`output of envelope amplifier .l70a (which is node E), and its output coupled to an input
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`ofa class AB driver 312. Driver 312 has its first output (R1) coupled to the gate ofa P-
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`channel metal oxide semiconductor (PMOS) transistor 314 and its second output (R2)
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`coupled to the gate of an N-channel MOS (NMOS) transistor 316. NMOS transistor
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`316 has its drain coupled to node E and its source coupled to circuit ground. PMOS
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`transistor 314 has its drain coupled to node E and its source coupled to the drains of
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`PMOS transistors 318 and 320. PMOS transistor 318 has its gate receiving a C] control
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`signal and its source receiving the Vboost voltage. PMOS transistor 320 has its gate
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`receiving a C2 control signal and its source reCeiving the Vbat voltage.
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`[0029]
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`A current sensor 164 is coupled between node E and node A and senses the Ienv
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`current provided by enveIOpe amplifier 170a. Sensor 164 passes most of the lenv
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`current to node A and prevides a small sensed current (lsen) to switcher 160a. The [sen
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`current is a small fraction of the Icnv current from envelope amplifier 170a.
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`[0030]
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`Within switcher 160a, a current sense amplifier 330 has its input coupled to
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`current sensor 164 and its output coupled to an input ofa switcher driver 332. Driver
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`332 has its first output (S1) coupled to the gate of a PMOS transistor 334 and its second
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`output (82) coupled to the gate of an NMOS transistor 336. NMOS transistor 336 has
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`its drain coupled to an Output of switcher 160a (which is node B) and its source coupled
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`to circuit ground. PMOS transistor 334 has its drain coupled to node B and its source
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`receiving the Vbat voltage. Inductor 162 is coupled between nodes A and B.
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`|0031|
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`Switcher 160a operates as follows. Switcher 160a is in an On state when current
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`sensor 164 senses a high output current From envelope amplifier 170a and provides a
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`low sensed voltage to driver 332. Driver 332 then provides a low voltage to the gate of
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`PMOS transistor 334 and a low voltage to the gate of NMOS transistor 336. PMOS
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`[DOCKET NO. 101005]
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`transistor 334 is turned on and couples the Vbat voltage to inductor 162, which stores
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`energy from the Vbat voltage. The current through inductor 162 rises during the On
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`state, with the rate of the rise being dependent on (i) the difference between the Vbat
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`voltage and the Vpa voltage at node A and (ii)
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`the inductance of inductor 162.
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`Conversely, switcher 160a is in an Off state when current sensor 164 senses a low
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`output current from envelope amplifier 170a and provides a high sensed voltage to
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`driver 332. Driver 332 then provides a high voltage to the gate of PMOS transistor 334
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`and a high voltage to the gate ofNMOS transistor 336. NMOS transistor 336 is turned
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`on, and inductor 162 is coupled between node A and circuit ground. The current
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`through inductor 162 falls during the Off state, with the rate of the fall being dependent
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`on the Vpa voltage at node A and the inductance of inductor 162. The Vbat voltage
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`thus provides current to power amplifier 130 via inductor 162 during the On state, and
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`inductor 120 provides its stored energy to power amplifier 130 during the Off state.
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`[0032 I
`
`In one design, envelope amplifier 170a operates based on the Vboost voltage
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`only when needed and based on the Vbat voltage the remaining time in order to improve
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`efficiency. For example, envelope amplifier 170a may provide approximately 85% of
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`the power based on the Vbat voltage and only approximately 15% of the power based
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`on the Vboost voltage. When a high Vpa voltage is needed for power amplifier 130 due
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`to a large envelope on the RFout signal, the C1 control signal is at logic low, and the C2
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`control signal is at logic high.
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`In this case, boost converter 180 is enabled and generates
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`the Vboost voltage, PMOS transistor 318 is turned on and provides the Vboost voltage
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`to the scarce of PMOS transistor 314, and PMOS transistor 320 is turned off.
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`Conversely, when a high Vpa voltage is not needed for power amplifier 130, the C1
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`control signal is at logic high, and the C2 control signal is at logic low.
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`In this case,
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`boost converter 180 is disabled, PMOS transistor 318 is turned off, and PMOS transistor
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`320 is turned on and provides the Vbat voltage to the source of PMOS transistor 314.
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`[0033]
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`EnveIOpe amplifier 170a operates as
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`follows. When the envelope signal
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`increases, the output of op-amp 310 increases, the RI output of driver 312 deceases and
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`the R2 output of driver 312 decreases until NMOS transistor 316 is almost turned off,
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`and the output of envelope amplifier 170a increases. The converse is true when the
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`envelope signal decreases.
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`The negative feedback from the output of envelope
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`amplifier 170a to the inverting input of op-amp 310 results in envelope amplifier 170a
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`having unity gain. Hence, the output of envelope amplifier 170a follows the envelope
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`signal, and the Vpa voltage is approximately equal to the envelope signal. Driver 312
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`[DOCKETNOJUHmfi
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`8
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`may be implemented with a class AB amplifier to improve efficiency, so that large
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`output currents can be supplied even though the bias current in transistors 314 and 316
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`is very low.
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`[0034]
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`A control signal generator 190 receives the envelope signal and the Vbat voltage
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`and generates the Cl and C2 control signals. The C1 control signal is complementary to
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`the C2 control signal.
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`In one design, generator 190 generates the C1 and C2 control
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`signals to select the Vboost voltage for envelope amplifier 170 when the magnitude of
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`the envelope signal exceeds a first
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`threshold. The first threshold may be a fixed
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`threshold or may be determined based on the Vbat voltage.
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`In another design, generator
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`190 generates the Cl and C2 control signals to select the Vboost voltage for envelope
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`amplifier I70 when the magnitude of the envelope signal exceeds the first threshold and
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`the Vbat voltage is below a second threshold. Generator 190 may also generate the C1
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`and C2 signals based on other signals, other voltages, andx’or other criteria.
`
`[0035]
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`FIG. 3 shows an exemplary design of switcher 160 and envelope amplifier 170
`
`in FIG. I. Switcher 160 and envelope amplifier 170 may also be implemented in other
`
`manners. For example, envelope amplifier 170 may be implemented as described in
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`U.S. Patent No. 6,300,826, entitled “Apparatus and Method for Efficiently Amplifying
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`Wideband Envelope Signals,” issued October 9, 2001.
`
`[0036]
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`Switcher 160a has high efficiency and delivers a majority of the supply current
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`for power amplifier 130. Envelope amplifier 170a operates as a linear stage and has
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`relatively high bandwidth (e.g., in the MHz range"). Switcher 160a operates to reduce
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`the output current from envelope amplifier 170a, which improves overall efficiency.
`
`[0037]
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`It may be desirable to support operation of wireless device 100 with a low
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`battery voltage (e.g., below 2.5V). This may be achieved by operating switcher 160
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`based on the Vbat voltage and operating envelope amplifier 170 based on the higher
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`Vboost voltage. However, efficiency may be improved by operating envelope amplifier
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`I70 based on the Vboost voltage only when needed for large amplitude envelope and
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`based on the Vbat voltage the remaining time, as shown in FIG. 3 and described above.
`
`[0038]
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`FIG. 4A shows plots of an example of the PA supply current (Ipa) and the
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`inductor current (find) from inductor 162 versus time for a case in which switcher 160a
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`has a supply voltage (sz) of 3.7V and envelope amplifier 170a has a supply voltage
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`(Venv) of3.7V. The lind current is the current through inductor I62 and is shown by a
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`plot 410. The lpa current is the current provided to power amplifier 130 and is shown
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`by a plot 420. The [pa current includes the lind current as well as the lenv current from
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`envelope amplifier 170a. Envelope amplifier 170a provides output current whenever
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`the [pa current is higher than the Iind current. The efficiency of switcher 160a and
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`envelope amplifier 170a is approximately 80% in one exemplary design.
`
`[0039]
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`FIG. 4B shows plots of the PA supply current (Ipa) and the inductor current
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`(lind) versus time for a case in which switcher 160a has a supply voltage of 2.3V and
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`envelope amplifier 170a has a supply voltage of 3.7V. The lind current is shown by a
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`plot 412, and the [pa current is shown by plot 420. When the supply voltage of switcher
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`160a is reduced to 2.3V, inductor 162 charges more slowly, which results in a lower
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`average lind current as compared to the case in which the supply voltage of switcher
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`160a is at 3.7V in FIG. 4A. The lower lind current causes envelope amplifier 170a to
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`provide more of the [pa current. This reduces the overall efficiency to approximately
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`65% in one exemplary design because envelope amplifier 1703 is less efficient than
`
`switcher 160a. The drop in efficiency may be ameliorated by increasing the lind current
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`from the switcher.
`
`[0040]
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`FIG. 5 shows a schematic diagram ofa switcher I60b, which is another design
`
`of switcher ]60 in FIG. 1. Switcher 160b includes current sense amplifier 330, driver
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`332, and MOS transistors 334 and 336, which are coupled as described above for
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`switcher 160a in FIG. 3. Switcher 160b further includes a current summer 328 having a
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`first input coupled to current sensor 164, a second input receiving an offset (e.g., an
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`offset current), and an output coupled to the input of current sense amplifier 330.
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`Summer 328 may be implemented with a summing circuit (e.g., an amplifier"), a
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`summing node, etc.
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`|0041|
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`Switcher l60b operates as follows. Summer 328 receives the Iscn current from
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`current sensor 164, adds an offset current, and provides a summed current that is lower
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`than the Iscn current by the offset current. The remaining circuits within switcher 160b
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`operate as described above for switcher 160a in FIG. 3. Summer 328 intentionally
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`reduces the Isen current provided to current sense amplifier 330, so that switcher .160 is
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`turned On for a longer time period and can provide a larger [ind current, which is part of
`
`the Ipa current provided to power amplifier 130. The offset provided to summer 328
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`determines the amount by which the lind current is increased by switcher l60b relative
`
`to the lind current provided by switcher 160a in FIG. 3.
`
`[0042]
`
`In general, a progressively larger offset may be used to generate a progressively
`
`larger inductor current than without the offset.
`
`In one design, the offset may be a fixed
`
`value selected to provide good performance, e.g., good efficiency.
`
`In another design,
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`[DOCKET NO. 101005]
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`10
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`the offset may be determined based on the battery voltage.
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`For example,
`
`a
`
`progressively larger offset may be used for a progressively lower battery voltage. The
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`offset may also be determined based on the envelope signal andfor other information.
`
`[0043]
`
`An offset to increase the inductor current may be added via summer 328, as
`
`shown in FIG. 5. An offset may also be added by increasing the pulse width of an
`
`output signal from current sense amplifier via any suitable mechanism.
`
`[0044]
`
`FIG. 4C shows plots of the PA supply current (lpa) and the inductor current
`
`(Iind) versus time for a case in which switcher 160b in FIG. 5 has a supply voltage of
`
`2.3V and envelope amplifier 170a has a supply voltage of 3.7V. The lind current is
`
`shown by a plot 414, and the Ipa current is shown by plot 420. When the supply voltage
`
`of switcher 16Gb is reduced to 2.3V, inductor 162 charges more slowly, which results in
`
`a lower Iind current as shown in FIG. 4B. The offset added by summer 328 in FIG. 5
`
`reduces the sensed current provided to current sense amplifier 330 and results in
`
`switcher 160b being turned On longer. Hence, switcher 160b with offset in FIG. 5 can
`
`provide a higher lind current than switcher 160a without offset in FIG. 3. The overall
`
`efficiency for switcher l60b and envelope amplifier 170a is improved to approximately
`
`78% in one exemplary design.
`
`[0045]
`
`FIG. 6 shows a schematic diagram ofa design of boost converter 180 in FIGS.
`
`1, 3 and 5. Within boost converter 180, an inductor 612 has one end receiving the Vbat
`
`voltage and the other end coupled to node D. An NMOS transistor 614 has its source
`
`coupled to circuit ground, its gate receiving a Cb control signal, and its drain coupled to
`
`node D. A diode 616 has its anode coupled to node D and its cathode coupled to the
`
`output of boost converter 180. A capacitor 618 has one end coupled to circuit ground
`
`and the other end coupled to the output of boost converter 180.
`
`[0046]
`
`Boost converter 180 operates as follows.
`
`In an On state, NMOS transistor 614 is
`
`closed, inductor 612 is coupled between the Vbat voltage and circuit ground, and the
`
`current via inductor 612 increases.
`
`In an Off state, NMOS transistor 614 is opened, and
`
`the current from inductor 612 flows via diode 616 to capacitor 618 and a load at the
`
`output of boost converter 180 (not shown in FIG. 6). The Vboost voltage may be
`
`expressed as:
`
`l
`Vboost = Vbat -— ,
`l — Duty _ Cycle
`
`Eq (I)
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`Page 10 of 240
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`Page 11 of 240
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`[DOCKET NO. 101005]
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`I
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`1
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`where Duty_Cycle is the duty cycle in which NMOS transistor 614 is turned on. The
`
`duty cycle may be selected to obtain the desired Vboost voltage and to ensure proper
`
`operation of boost converter 180.
`
`[0047]
`
`The techniques described herein enable an enveIOpe tracker to operate at a lower
`
`battery voltage (e.g., 2.5V or lower). The envelope tracker includes switcher 160 and
`
`envelope amplifier 170 for the design shown in FIG. 1.
`
`In one design of supporting
`
`operation with a lower battery voltage, as shown in FIG. 3, switcher 160 is connected to
`
`the Vbat voltage and envelope amplifier 170 is connected to either the Vbat voltage or
`
`the Vboost voltage. Switcher 160 prevides power most of the time, and envelope
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`amplifier 170 provides power during peaks in the envelope of the RFout signal. The
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`overall efficiency of the envelope tracker is reduced by the efficiency of boost converter
`
`180 (which may be approximately 85%) only during the time in which envelope
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`amplifier 170 provides power.
`
`[0048]
`
`In another design of supporting operation with a lower battery voltage, the entire
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`envelope tracker is operated based on the Vboost voltage from boost converter 180.
`
`In
`
`this design, boost converter 180 provides high current required by power amplifier 130
`
`(which may be more than one Ampere), and efficiency is reduced by the efficiency of
`
`boost converter 180 (which may be approximately 85%).
`
`[0049]
`
`In yet another design of supporting operation with a lower battery voltage, a
`
`field effect transistor (FET) switch is used to connect the envelope tracker to (i) the
`
`Vbat voltage when the Vbat voltage is greater than a Vthresh voltage or (ii) the Vboost
`
`voltage when the Vbat voltage is less than the Vthresh voltage. Efficiency would then
`
`be reduced by losses in the F ET switch. However, better efficiency may be obtained for
`
`envelope amplifier 170 due to a lower input voltage.
`
`[0050]
`
`In one exemplary design, an apparatus (e.g., an integrated circuit, a wireless
`
`device, a circuit module, etc.) may comprise an envelope amplifier and a boost
`
`converter, e.g., as shown in FIGS.
`
`1 and 3. The boost converter may receive a first
`
`supply voltage and generate a boosted supply voltage having a higher voltage than the
`
`first supply voltage. The first supply voltage may be a battery voltage, a line-in voltage,
`
`or some other voltage available to the apparatus. The envelope amplifier may receive
`
`an envelope signal and the boosted supply voltage and may generate a second supply
`
`voltage (e.g., the Vpa voltage in FIG. 3') based on the envelope signal and the boosted
`
`supply voltage. The apparatus may further comprise a power amplifier, which may
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`Page 12 of 240
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`[DOCKET NO. 101005]
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`12
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`operate based on the second supply voltage from the envelope amplifier. The power
`
`amplifier may receive and amplify an input RF signal and provide an output RF signal.
`
`[005]]
`
`In one design, the envelope amplifier may further receive the first supply voltage
`
`and may generate the second supply voltage based on the first supply voltage or the
`
`boosted supply voltage. For example, the envelope amplifier may generate the second
`
`supply voltage (i) based on the boosted supply voltage if the envelope signal exceeds a
`
`first threshold, or if the first supply voltage is below a second threshold, or both or (ii)
`
`based on the first supply voltage otherwise.
`
`[0052]
`
`In one design, the envelope amplifier may include an op-amp, a driver, a PMOS
`
`transistor, and an NMOS transistor, e.g., op—amp 310, driver 312, PMOS transistor 314,
`
`and NMOS transistor 316 in FIG. 3. The op-arnp may receive the envelope signal and
`
`provide an amplified signal. The driver may receive the amplified signal and provide a
`
`first control signal (R1) and a second control signal (R2). The PMOS transistor may
`
`have a gate receiving the first control signal, a source receiving the boosted supply
`
`voltage or the first supply voltage, and a drain providing the second supply voltage.
`
`The NMOS transistor may have a gate receiving the second control signal, a drain
`
`providing the second supply voltage, and a source coupled to circuit ground. The
`
`envelope amplifier may further comprise second and third PMOS transistors (e.g.,
`
`PMOS transistors 318 and 320). The second PMOS transistor may have a gate
`
`receiving a third control signal (C1), a source receiving the boosted supply voltage, and
`
`a drain coupled to the source of the PMOS transistor. The third PMOS transistor may
`
`have a gate receiving a fourth control signal (C2), a source receiving the first supply
`
`voltage, and a drain coupled to the source of the PMOS transistor.
`
`[0053]
`
`In another exemplary design, an apparatus (e.g., an integrated circuit, a wireless
`
`device, a circuit module, etc.) may comprise a switcher, an envelope amplifier, and a
`
`power amplifier, c.g., as shown in FIGS.
`
`1 and 3. The switcher may receive a first
`
`supply voltage (e.g., a battery voltage) and provide a first supply current (e.g., the [ind
`
`current in FIG. 3). The envelope amplifier may receive an envelope signal and provide
`
`a second supply current (c.g.,
`
`the Icnv current) based on the envelope signal. The
`
`power amplifier may receive a total supply current (e.g., the [pa current) comprising the
`
`first supply current and the second supply current. The first supply current may
`
`comprise DC and low frequency components. The second supply current may comprise
`
`higher frequency components. The apparatus may further comprise a boost converter,
`
`which may receive the first supply voltage and provide a boosted supply voltage having
`
`Page 12 of 240
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`Page 13 of 240
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`[DOCKET NO. 101005]
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`13
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`a higher voltage than the first supply voltag