`||||||||||||||||l||||||||||||l||||
`U5005887145A
`
`United States Patent
`Harari et al.
`
`[191
`
`[11] Patent Number:
`
`5,887,145
`
`[45] Date of Patent:
`
`Mar. 23, 1999
`
`5.451590 Ill-“itiKJS Barrett cl at.
`5.4?5,44I
`12.51995 Parnlski et al.
`5388.433
`1.11005 Washino cl al.
`s,5a4,tm mime Iiurkart
`.......
`5,611.05?
`3.11%?
`i’cconc et :11.
`5,615,344
`3.51%? Carder
`FOREIGN PATENT DOCUMENTS
`
`.
`
`
`
`
`
`300;“133
`.. 348.552
`3953722
`395.832
`395.032
`.. 395.8139
`
`REMOVABLE MO'I‘HERJI)AUGH'I‘ER
`PERIPHERAL CARI)
`
`Inventors: Eliyahnn Harnri, I_os (ialos; Daniel C.
`Guterman, Fremont: Robert F.
`Wallace, Sunnyvale, all of Calif.
`
`[54]
`
`['51
`
`[5|]
`[53!
`
`I531
`
`[56]
`
`Assignee: SanDlsk Corporation. Sunnyvale.
`Calif.
`
`WUJSE'K‘JEISS
`
`H1993 WlPO.
`
`App]. No.2 781,539
`
`filed:
`
`Jim. 9, 1997
`
`Primary Exmnirter—Meng—Ai T. An
`Assistant Examiner—Waller D. Davis. Jr.
`Attorney. Agent, or Firm—Majestic, Parsons, Sieherl
`Hsue
`
`8c
`
`Related U.S. Application Data
`
`157|
`
`ABSTRACT
`
`I‘J‘JS, abandoned.
`(Tonlinuation of Ser. No. 462,642, Jun. 5.
`which is a continuation of Ser. No. 398,855. Mar. ti, W95.
`abandoned. which is :i uonlinuation of Ser. No. 151,202,
`Nov. 12, 1993, abandoned. which is a continualion—in—pan of
`Ser. No. 1.15.428. Sep. 1. 1903. abandoned.
`Int. Cl.“ .
`US. Cl.
`
`G061“ 12J'00
`
`
`395;?!33; 395t882:
`.. 3951282;
`7|]t’103; 7|1e’l [5
`Field of Search ..................................... 395800. 282,
`395.5283. 309, 800.01, 800.37, 500. 833.
`821, 882; 71152, 103, 115; 365;“52, 99
`
`References Cited
`
`US. PATENT DOCUMENTS
`{”1089
`Sasaki
`..................................... 358t209
`
`5,-‘1‘JFJI
`Sasaki cl al.
`......
`.. 3583200
`33'] 994
`Adachi el al.
`348f23l
`
`$1994
`Moore .
`350.!152
`
`$1995
`Aoki
`.. 348320?
`
`4.837.628
`5.018.017
`5.293.235
`5.343519
`5,438,359
`
`A peripheral card having a Personal (‘omputer (“PC") card
`l'orm I'aclor and removably coupled externally to a host
`system is further partitioned into a mother card portion and
`a daughler card portion. The daughter card is removalaly
`coupled to the mother card. In Ihc preferred embodiment, a
`low cosl flash "floppy" is accomplished wilh Ilre daughter
`card containing only Hash EEPROM chips and being eon—
`troiled by a memory controller residing on [he molhcr card.
`Other aspects of Ihc invention includes a comprehensive
`controller on the mother card able lo conlro] a predefined set
`ol‘ peripherals on daughter cards conneclable to Ihe mother
`card;
`reloealion of some host resident hardware to the
`mother card to allow for a minimal hosl syslem; a mother
`card that can accommodate multiple (laughter cards; (laugh-
`ter cards that also operates directly with hosts having
`embedded controllers; daughter cards carrying cnooded dala
`and inftln'nation for decoding il; and daughter cards with
`secitrit}.r features.
`
`22 Claims, 9 Drawing Sheets
`
`HOST SYSTEM 1
`
`200
`
`
`
`100
`
`Renew-hie
`Removable
`"other bard
`Daughter card
`
`42
`
`
`
`HOST SYSTEM I'I
`
`200'
`
`
`
`Toshiba_Apricorn 1004-0001
`Toshiba_Apricorn 1004-0001
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 1 of 9
`
`5,887,145
`
`100
`
`|_'——"'—‘——“"‘—'|
`
`200
`
`
`
`Removable
`
`Mother card
`
`
`
`Removable
`
`Daughter
`
`
`HOST SYSTEM
`
`
`
`12
`
`14
`
`10
`
`K 20
`
`4
`
`40
`
`MOTHER CARD
`
`10
`
`DAUGHTER CARD
`30
`
`25'
`
`I—_"_7 _
`Heart—Mermsz _
`54
`_.._.
`|
`Processor
`I
`50
`
`.l.|JlUJlJ
`
`,1l
`._I._I—d
`
`_|
`
`
`
`FIG. 3
`
`Toshiba_Apricorn 1004-0002
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 2 of9
`
`5,887,145
`
`16
`
`MOTHER CARD
`
`10
`
`.
`
`DAUGHTER CARD
`
`20
`
`
`
`
`
`Toshiba_Apricorn 1004-0003
`Toshiba_Apricorn 1004-0003
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 3 or 9
`
`5,887,145
`
`
`Flash System Controller
`‘_
`__
`Host Interface
`Memory
`Interface
`
`56
`
`
`Flash Memory
`
`, 1
`
`
`
`
`Toshiba_Apricorn 1004-0004
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 4 of 9
`
`5,887,145
`
`41
`
`
`'— ______________________
`
`DAUGHTER CARD
`
`2O
`
`MOTHER CARD
`10
`
`
`F———"I
`
`Host Interface I
`T """""""""""""" _
`
`
`
`llJlLIJI:
`I
`‘ Daughtercard
`
`
` FLASH EEPROM
`I
`|
`Interface
`
`3'
`I -_ I
`
`
`Z"
`‘
`Power
`I
`' '
`Converter
`
`L _ _ _ J
`
`-I1
`
`COMMUNICATION
`DEVICE
`
`MAGNETIC
`HARD DISK
`
`FIG. 5A
`
`Toshiba_Apricorn 1004-0005
`Toshiba_Apricorn 1004-0005
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 5 of 9
`
`5,887,145
`
`41
`
`MOTHER CARD
`
`10
`
`Comprehensive
`Controller
`
`—l
`—I
`=—I
`_.
`—I
`II
`II
`III
`_.—l—‘
`
`....'
`
`Functional
`
`Module(s)
`
`FIG. 5B
`
`Toshiba_Apricorn 1004-0006
`Toshiba_Apricorn 1004-0006
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`
`

`

`US. Patent
`
`Mar. 23,1999
`
`Sheet 6 of9
`
`5,887,145
`
`47
`
`MOTHER CARD
`
`10
`
`Comprehensive
`
`Controller
`
`FIG. 6
`
`100
`
`MOTHER CARD
`DAUGHTER CARD
`
`HOST
`
`ROM
`
`
`COMPREHENSIVE
`CONTROLLER
`
`DATA
`
`CONTRO
`
`20
`
`REMOVABLE
`
`MEDIA
`
`(FLASH EEPROM,
`HARD DISK.
`ROM.
`
`FLOPPY,
`
`
`
`
`"MAIN" MEMORY
`
`(DRAMISRAMI
`ROMIFLASH)
`
`
`I 32KB TO 32MB
`
`
`
`FIG. 7
`
`Toshiba_Apricorn 1004-0007
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`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 7 of 9
`
`5,887,145
`
`
`
`Toshiba_Apricorn 1004-0008
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`|PR2018—01067
`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 8 01'9
`
`5,887,145
`
`100
`290
`HOST SYSTEM 1
`
`Rgmovable
`42 Mother card
`
`Removable
`Daughter card
`
`* Com
`cm
`
`'
`
`‘ ‘F
`— -)
`
`12
`
`41
`
`14
`
`,0
`
`24
`
`HOST SYSTEM [1
`
`200'
`
`2’0
`
`
` Com
`
`. _-_. _._ _ __ _ _ ._ .._
`
`41' 14'
`
`FIG. 9
`
`Toshiba_Apricorn 1004-0009
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`
`

`

`US. Patent
`
`Mar. 23, 1999
`
`Sheet 9 01'9
`
`5,887,145
`
`100
`'—_—_|
`
`Removable
`
`42 Mother card
`
`Removable
`
`Daughter card
`
`' * Com
`cm
`
`— -}
`I __’
`
`12
`
`41
`
`14
`
`10
`
`\20
`
`24
`
`i
`
`|
`
`| | |
`
`I
`
`HOST SYSTEM
`
`200"
`
`
`
`"""""
`
`
`
`FIG. 10
`
`I
`
`220
`
`24
`
`FIG. 11
`
`\20
`
`Toshiba_Apricorn 1004-0010
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`
`

`

`5 £87,145
`
`1
`REMOVABLE MOTHERIDAUGHTER
`Pl‘lRIl’l-l l‘lRAl. CARI)
`
`This is a continuation of application Ser. No. 083162.642,
`filed Jun. 5, 1995, now abandoned, which is a continuation
`of application Ser. No. 08898856, filed Mar. 6, [995, now
`abandoned, which is a continuation of application Ser. No.
`OSKlSl ,292 lilcd Nov. 12, 1993, now abandoned, which is a
`continuation-impart of application Ser. No. 08t115,428 filed
`Sep. 1, 1993, now abandoned.
`BACKGROUND OF THE INVENTION
`
`This invention relates generally to host computer systems
`and peripherals. More specifically, the peripherals have a
`Personal Computer ("PC") card form factor. the card being
`externally and removably coupled to a host system. The
`invention relates to structures and configurations of such a
`card, particularly for implementing mass storage peripherals
`such as electrically erasable programmable read-only-
`memories (EEPROM) or Flash EEPROM system.
`Computer systems typically use high speed semiconduc-
`tor random access memory (RAM) for storing temporary
`data. However, RAM is volatile memory;
`that
`is, when
`power to the computer system is disconnected, data stored in
`RAM is lost.
`I-‘or long-term, non-volatile storage, two types of memory
`are typically employed. One type is magnetic disk memory
`intended for mass storage with practically unlimited number
`of write operations. The other type is semiconductor
`memory, traditionally intended for storing a relatively small
`amount of data (eg. system parameters) with no or limited
`number of write operations.
`When mass storage is desired, magnetic disk drives,
`whcthcr fixed or removable, are generally more economical
`and more amenable to write operations than solid-state
`memory. Typically, a computer system employs a combina-
`tion of fixed and removable (floppy) magnetic disks.
`However. they are relatively slow, bulky and require high
`precision moving mechanical parts. Consequently, they are
`not rugged and are prone to reliability problems, as well as
`being slower and consuming significant amounts of power.
`The undesirable features of magnetic disks become even
`more acute with the advent of portable and mobile comput-
`ing. Disk drives are obstacles in the quest towards greater
`portability and lower power consumption of computer sys-
`tems.
`Non—volatile semiconductor or solid—state memories have
`the advantage of being speedy, light-weight and low—power.
`Examples are ROM, EEPROM and Flash EEPROM which
`retain their memory even after power is shut down.
`llowever, ROM and PROM cannot be reprogrammed.
`UVPROM cannot be erased electrically. EEI‘ROM and
`Flash EEl’ROM do have the further advantage of being
`electrically writable (or programmable) and erasable.
`Traditionally,
`these semiconductor memories has been
`employed in small amount for permanent storage of certain
`computer system codes or system parameters that do not
`change.
`to apply non-
`There is currently underway an effort
`volatile Flash EEPROM memory systems for mass storage
`applications. For example,
`they are intended to replace
`either of the existing fixed or removable floppy magnetic
`disk systems, or both. Such systems are disclosed in com-
`monly assigned and copending US. patent application Ser.
`No. 075684.034,
`filed Apr.
`ll, 195'], COMPUTER
`MEMORY CARD HAVING A LARGE NUMBER 017
`
`It)
`
`15
`
`2|)
`
`30
`
`,
`
`40
`
`4:1
`
`50
`
`55
`
`fit]
`
`as
`
`2
`EEPROM INTEGRATED CIRCUIT CHIPS AND
`MEMORY SYSTEMS WITH SUCH CARDS, now aban—
`doned and Ser. No. (t7r’736,732 filed Jul. 26, l99l, COM-
`PUTER MEMORY CARDS USING FI ASH EEPROM
`INTEGRATED CIRCUIT CHIPS AND MEMORY—
`CON’I'ROLLER SYSTEMS, now abandoned, a continua-
`tion thereof being granted as U.S. Pat. No. 5,663,901.
`Relevant portions of these disclosures are incorporated
`herein by reference. It is now becoming possible to fabricate
`a low megabytes of Flash EEI’ROM on a single semicon-
`ductor integrated circuit chip. As a result, several megabytes
`to tens of megabytes of memory can readily be packaged in
`a physically compact memory card, the sire of an ordinary
`credit card.
`
`Indeed. a series of industry "PC Card Standards" are now
`being promulgated by the Personal Computer Memory Card
`International Association {PCMCIAL Sunnyvale, Calif,
`USA. Excerpts of the current PCMCIA Standards, Edition
`Release 2, dated November 1992 are incorporated herein by
`reference. These standards set mechanical (Types I, II and
`III) and technical (Revision 1.0, it!) specifications [or a
`memory card and its connection to a host.
`The PCMCIA card has the form factor approximately the
`sire of a credit card and is externally connectable to a host
`computer system via the. PCMCIA interface. Originally,
`these cards were intended as memory card add-ons for
`portable or mobile computing systems. Snort thereafter their
`standards were expanded to accommodate other peripherals
`such as modems, network adapters, and hard disks. Thus,
`PCMCIA Type I card is 3.3 mm in overall outside thickness,
`less than 5.5 cm in width, and less than 9.0 cm in length.
`Types II and [II have similar dimensions, except Type II card
`is 5 mm thick and Type III card is 10.5 mm thick. Revision
`1.0 ol'the technical specification dated September [990. is a
`memory-only standard for memory card applications. Revi-
`sion 2.0. dated September 1991. is a standard with added
`inputr’output (IIO) capabilities and software support suitable
`for other non-memory types of peripherals.
`In memory card applications, such PC cards have been
`commercially implemented primarily using either ROM or
`SRAM, with SRAM made non-volatile through backup
`battery.
`'I‘hcse solid-state memories operate and function
`under similar conditions as RAM. in that they are directly
`connected to the host’s bus and addressable by the host's
`processor. Thus, similar to RAM, they can be simply added
`to a host computer system without additional hardware or
`software.
`
`On the other hand, PC cards using EEPROM and Flash
`EEPROM have quite dillcrent properties and operating
`requirements that make their incorporation into a host com—
`puter system not as straight forward. 'l‘ypically, additional
`hardware such as a controller and software are required to
`control the operations of the EEPROM or Flash EEPROM.
`The controller generally provides the necessary voltage
`conditions for the various memory operations.
`In more
`sophisticated implementations, it can communicate with a
`host via a standard disk drive interface, store the data under
`a prescribed file structure in the Flash memory (e.g. com—
`patible with a standard disk operation system). and handle
`any errors that may arise.
`The requirement for additional support hardware (e.g.
`controller) and software (e.g. microcode or firmware and
`drivers) in these devices poses isSUes of cost and inflexibility
`in memory configuration as well as system updating and
`upgrading. For example, when Hash EEI’ROM PC cards are
`used to replace magnetic floppies or other removable
`
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`

`5 £87,145
`
`3
`storage, the additional support hardware to implement the
`control functions may contribute significantly to the cost and
`other overhead of the product relative to the memory capac-
`ity they provide.
`types of
`Similar considerations also apply to other
`peripherals, such as hard disks, modems and network adapt—
`ers. Their support hardware and software tend to add cost.
`overhead and inflexibility to the final products.
`Accordingly, it
`is a general object of the invention to
`prtWide a peripheral in the form of a PC card that can be
`removably connected to a host system from the external of
`the host system, and that
`is cost-effective and flexible in
`configuration.
`[I is an object of the invention to provide such a PC card
`with a specific type of semiconductor memory system
`ltaving non-volatility. ease of erasing and rewriting, speed of
`access. and furl her being compact, light-weight, low power.
`low cost, reliable, and flexible in configuration.
`it is another object of the invention to provide a remov-
`able memory card that is removably coupled externally to a
`host system via a standard interface such as a PCMCIA
`interface.
`
`It)
`
`15
`
`2|)
`
`it is another object of the invention to provide a compre-
`hensive PC card that is adapted for Use in a number of -
`peripheral applications.
`[I is a particular object of the invention to provide low cost
`Flash EEPROM memory cards, for example to replace
`floppy disks. magnetic tapes, or photographic recording
`films.
`
`30
`
`[I is another object of the invention to provide a remov-
`able PC card that can accommodate components off—loaded
`from the host system in order to minimize the size and cost
`of the host system and to provide flexibility in system
`configuration.
`It
`is yet another object of the invention to provide a
`removable card that can interface either directly to a host
`system via an interface native to the card or indirectly via a
`standard interface to the host system.
`it is yet another object of the invention to provide a
`removable card that stores encoded data that can be decoded
`when the card is relocated from one host system to another.
`SUMMARY OF T] [E [NVENTION
`
`"these and additional objects are accomplished by the
`various aspects of the present invention, either alone or in
`combination, the primary aspects being briefly summarized
`as below.
`
`The externally removable PC card is constituted from a
`mother card portion and a daughter card portion. The
`daughter card portion is removably coupled mechanically
`and electrically to the mother card by means of a mothert
`daughter interface. The mother cattd portion can be remov-
`ably coupled to a host system externally by means of a
`standard interface that provides both mechanical and elec‘
`trical connection. in operation, the mother card portion and
`the daughter card portion are coupled by the mother;f
`daughter interface to form an integral PC card, and the
`integral PC card is removably coupled to the host system.
`Partitioning the externally removable PC card into a
`mother card and daughter card portion allows the functional
`components of a peripheral implemented on a PC card to be
`advantageously partitioned.
`According to one aspect of the invention, the peripheral
`implemented on the PC card is a flash EEPROM system.
`comprising flash [if-PROM chips and supporting hardware
`
`40
`
`$5
`
`50
`
`55
`
`fit]
`
`as
`
`4
`circuits that form a controller for controlling the operations
`of the flash EEPRDM and for interfacing to the host system.
`The flash EEPROM system is partitioned such that
`the
`controller resides on the mother card and the flash EEPROM
`chips reside on the daughter card.
`In this way, a more cost-effective memory system is
`possible, especially in applications Where magnetic floppy
`disks are to be replaced. This is because each daughter card
`containing only flash EEPROM acLs eswntially like a semi—
`conductor flash EEPROM "floppy disk", and need not have
`a controller on it. The one cotttroller on the mother card can
`then serve any number of these flash EEPROM "floppy
`dis “'. The cost of each flash EEPROM "floppy disk" is
`therefore significantly reduced by elimination of the con-
`troller on the “floppy disk" itself. The other advantage is an
`increase in system flexibility. The user can add or decrease
`memory capacity by choosing among daughter cards with
`various amount of installed memory chips. Also, with each
`update or upgrade of the controller, only the mother card
`need be replaced, the daughter card “floppy disk" being fully
`usable with the new mother card.
`According to another aspect of the invention. a PC card is
`implemented with a comprehensive mother card portion
`containing the common functional components of a number
`of peripherals. Each peripheral
`then has the rest of the
`functional components residing on a daughter card. For
`example. a magnetic hard disk. a modem, and a network
`adapter all have common functional components similar to
`that of a flash EEPROM system, such as a host interface. a
`processor, and a ROM. By moving these common functional
`components to a comprehensive mother card, each indi-
`vidual peripheral will have less components on the daughter
`card. thereby reducing cost.
`According to another aspect of the invention, some of the
`hardware originally residing in the host system is relocated
`to the mother card. One example of such a hardware is
`system memory (DRAM, SRAM, or flash) or even the host
`microprocessor. The relocation is advantageous because
`most small palmtoptnotebook computers will not have suf-
`ficient room (Le. Motherboard space) to include a lot of
`system memory. Furthermore. these min; are too small for
`users to open up and upgrade with memory SIMM modules.
`Also, most manufacturers prefer to ship out the lowest cost
`base unit with minimum memory. This can be accomplished
`by using the Mothertdaughter PC card. with the mother card
`carrying the controller and main memory (capacities can be
`e.g. 13.5 MB, 1 MB. 2 MB. 4 MB, 8 MB. etc.), and the
`daughter card carrying either flash memory "floppy drive“ or
`a small form factor magnetic hard disk (e.g. just the head,
`disk and motor assembly portions of a 1.8" or 1.3" hard disk
`without
`its controller logic). or a microlloppy, or even a
`miniature tape backup drive. Essentially,
`the Mother{
`daughter PC card contains all the memory requirements of
`the host system, i.e. the palmtopt'notebook computer, which
`will free up precious space on the computer motherboard.
`According to another aspect of the invention, the mother
`card is adapted to removably receive a plurality of daughter
`cards. In this case, more than one mothert‘daughter connector
`may be provided on the mother card for removably receiving
`a plurality of daughter cards. The same controller on the
`mother card controls and services any number of daughter
`cards that are coupled to it. In one embodiment where the
`daughter cards are flash EEPROM, they are all controlled by
`the same controller on the mother card. This is similar to
`having a multiple floppy drive capability. In another embodi-
`ment where the daughter cards are a mixture of peripherals,
`such as flash memory and a modem or other communication
`
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`

`According to another aspect of the invention, the remov-
`able daughter card has the option of working with a host
`system in conjunction with a mother card externally coupled
`to the host system. The motlter card serves to furnish support
`components, such as a comprehensive controller and
`optional functional components. necessary for the operation
`of the peripheral device implemented on the daughter card.
`At
`the same time.
`it adapts the native interface of the
`daughter card to the standard interface of the host system. At
`the same time, the daughter card has the option of working
`directly with a host system via the native interface of the
`daughter card if the support components are built into the
`host system.
`In this manner. a comprehensive, removable daughter
`card functions with a host system either directly when the
`host system is customized with the support components or
`indirectly via a mother card having the support components
`thereon,
`the mother card being connectable to the host
`system via a standard interface. This provides flexibility and '
`system compatibility on the one hand and economy and
`convunience on the other.
`According to another aspect of the invention, when the
`support components includes data encoding and decoding
`processing functions such as compression and
`decompression, encryption and decryption, the key or algo-
`rithm for recovering the data is stored with the daughter
`card. In this way, irrespectively of how the data is encoded
`by one host system. when the daughter card is reloeated to
`another host,
`the information for decoding it
`is always ‘
`available.
`
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`According to another aspect of the invention, the remov-
`able daughter card has identifying data that is readable by
`the mother card or the host system coupled thereto. The
`identifying data includes information that
`identifies what
`type of peripheral device is implemented on the daughter
`card. In another embodiment, the identifying data includes
`an identity code assignable to the daughter card for opera~
`lional expediency and security applications. The device type
`identilication allows the support components such as a
`comprehensive controller as well as the host system to
`configure and adapt accordingly. It further provides a form
`of acknowledge signal
`in a connection protocol for the
`native interface of the daughter card. The unique identity
`code provides a basis for matching each removable daughter
`card to a specific host system or mother card, for managerial
`or security reasons.
`Additional objects, features and advantages of the present
`invention will be understood from the following description
`of the preferred embodiments, which description should be
`taken in conjunction with the accompanying drawings.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`is a schematic representation of the mother:t
`FIG, 1
`daughter PC card that can be removahly coupled externally
`to a host system. according to a general aspect of the
`invention;
`FIG, 2A illustrates, according to one embodiment, a
`mother card having an integral back-to-back connector with
`one side serving as the standard connector and the other side
`being the native interface connector;
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`peripherals such as LAN adapter, or wireless fax modem.
`The same controller acts as a coprocessor or a sub-host
`system services the mixture of peripherals coupled to it. For
`example. the controller can receive fax data through a fax
`modem daughter card and store it in a flash memory daugh—
`ter card.
`
`6
`FIG. 23 is a partial cross-sectional view of the mother
`card along the line 213—le shown in FIG. 2A;
`FIG. 3 illustrates a panitioning of the functional compu-
`nents of a flash EEPRUM system between the mother card
`and the daughter card;
`FIG. 4 is a system block diagram illustrating in more
`detail the functional components of a flash EEPROM system
`and related data and control paths, according to a preferred
`embodiment;
`FIG. 5A illustrates schematically an integrated controller
`on the mother card for controlling a variety of peripherais on
`daughter cards that may be connected to it;
`FIG. SB illustrates a comprehensive mother card with
`additional functionalities provided by one or more func—
`tional modules:
`FIG. 6 illustrates schematically the relocation of host
`"main memory” onto the mother card;
`FIG. 7 isa system block diagram illustrating the memory
`partition and related data and control paths among a host,
`mother card and daughter card;
`FIG. 3A is an exploded view showing the mother card
`removably connectable to a daughter card. according to one
`aspect of the inVention;
`FIG. 8B is an exploded view showing the mother card
`removany connectable to a plurality of daughter cards,
`according to another aspect of the invention;
`FIG. 9 illustrates a removable daughter card that can
`interface either directly to a host system via an interface
`native to the daughter card or indirectly via a mother card
`removably coupled to a standard interface of the host
`system;
`FIG. 19 illustrates a host system having both an interface
`native to the daughter card for receiving the daughter card
`directly, and a standard interface for receiving the daughter
`card via a mother card; and
`FIG. 11 illustrates schematically a removable daughter
`card containing identifying data.
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`Semiconductor "Fioppies"
`There are applications where a very low cost memory
`card is required, for example to replace floppy disks or tape
`or film. At the same time it is important that the memory card
`preserve the PCMCIA standard interface to the host system.
`The present invention is to integrate a memory controller
`chipsel on the memory card in a configuration that mini—
`mizes cost and provides maximum flexibility. To reduce the
`cost of the memory card to meet the cost requirements of a
`floppy card, it is necessary to either integrate the controller
`chips with the memory chip, which require greater shopli-
`tication of the control functionality, or performing most of
`the control functions by the host CPU which makes this
`approach host dependent. To solve this problem a lower cost
`approach is proposed in which the memory card is made up
`of a mother card and a daughter card.
`FIG.
`I
`is a schematic representation of the mother;r
`daughter PC card 101]
`that can be removably coupled
`externally to a host system 21m, according to a general
`aspect of the invention.
`The PC card 100 comprises a mother card portion 10 and
`a daughter card portion 20. The mother card portion 10 is a
`PCMCIA form-factor PC card with the standard 68-pin
`connector 12 on one side and a native interface connector 14
`(typically less than 68 pins) on the other side. The mother
`
`Toshiba_Apricorn 1004-0013
`Toshiba_Apricorn 1004-0013
`IPR2018-01067
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`card 10 can he rcmovably connected to the host system 200
`by plugging the connector 12 to a connector 212 of the host
`system.
`The daughter card 10 has an edge connector 24 and it
`directly plugs into the mother card by mating with the
`connector 14 on the mother card.
`FIG. 2A illustrates, according to one embodiment, a
`mother card 10 having an integral. back-tta~back. connector
`16 with one side serving as the standard connector 12 and
`the other side being the native interface connector 14. The
`integral connector 16 is formed in one step to reduce the cost
`of manufacturing. A PC board 18 provides a platform for
`mounting the integral connector 16 and mother card cir‘
`cuitry 19.
`FIG. 2B is a partial cross-sectional view of the mother
`card along the line 2B—2B shown in FIG. 2A. The PC board
`and the mounted mother card circuitry 19 such as a con~
`troller ehipset
`take up about half of the mother card’s
`thickness. This leaves the other half for the integral connec-
`tor 16 and an inlay 21 for a daughter card to dock in. The
`integral connector 16 is mounted on the back side to one
`edge of the PC board 18. A daughter card can removahly
`dock into the inlay 21.
`FIG. 3 illustrates a preferred partitioning ofthe functional
`components of a flash EEPROM system between the mother -
`card and the daughter card. As discussed earlier. a flash
`EEI’ROM system typically requires additional hardware
`such as processor-based circuits forming a memory control-
`ler with software to control
`Ihe operations of the Flash
`EEPROM.
`The daughter card 20 contains essentially flash EEPROM
`memory chip(s) 30 and associated decoupling capacitors.
`The daughter card is preferably a low cost molded card for
`mounting lhc llash EEPROM chips. The edge connector 24
`has a minimum of pin-count since communication wilh a .‘
`peripheral is normally in serial form.
`The mother card 10 contains a memory controller 40 bul
`does not contain any substantial amount of flash ElSl-‘ROM
`mass storage. Preferred memory controllers are disclosed in
`and commonly assigned U.S. patent application, FIASH
`EEPROM SYSTEM, Ser. No. UTE963,837, filed Oct. 20,
`1992, now abandoned, a continuation thereof being granted
`as US. Pat. No. 5.611329, and DEVICE AND METHOD
`FOR CONTROLLING SOLID-S'I‘A'I'E. MEMORY
`SYSTEM, Scr. N0. 07.3736333, filed Jul. 25, 1991, now U.S.
`Pat. No. 5,430,859. Relevant portions of both disclosures are
`incorporated herein by reference.
`The controller 40 is typically composed of functional
`componean such as a processor 50, driven by rnicrocodes
`stored in a ROM 52. The small amount of ROM 52 could
`also he replaced by other types of non—volatile memory such
`as EEPROM or flash EEPROM. The controller interfaces
`with the host system via a host interface 54, and with the
`flash memory via a memory interface 56. In the preferred
`embodiment, the host interface 54 communicates with the
`host system 200 in accordance with the PCMCIA specifi-
`cations or any other standard card interface. The controller
`may also include other functional components such as a
`power converter 58 for providing the necessary voltage
`conditions for [he various memory operalions. The func—
`lional components are interlinked by an internal has (not
`shown in FIG. 3). In practice, these functional components
`are implemented as a controller chipset.
`FIG. 4 is a system block diagram illustrating in more
`detail the functional components of a flash EEI’ROM system
`and related data and control paths, according to a preferred
`embodiment. The controller 40 is a flash system controller
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`on a mother card and controls flash memory on a daughter
`card. The flash system controller 40 interfaces with the host
`by means of the host interface 54 via the host connector 12.
`The host interface 54 typically includes a Imflcr memory for
`buffering data between the host and the peripheral. In one
`embodiment it may also emulate a disk drive interface, so
`that the flash memory system appears like a magnetic disk
`drive to [he host. An internal has 55 interconnects the
`processor 50 with the host
`interface 54 and the memory
`interface 56. The processor 50, under the program control of
`microcode stored in a nonvolatile store 52, controls the
`interoperation of the functional components in the flash
`EEPROM system. The flash system controller 41] interfaces
`with the [lash memory chips 30 on a daughter card 20 by
`means of a memory interface 56 via the host-daughter card
`connector 14. A flash controller 59 in the memory interface
`56 conlrols the specific operations of the llash memory 30.
`It also controls a power converter 58 that provides voltages
`require to operate the flash memory. Serial communication
`between the flash system controller 56 on the mother card
`and the flash memory 30 on the daughter card requires a
`minimum of pins in the connectors 14 and 24.
`Comprehensive Mother Card
`The I’CMCIA Mothen‘Daughter Card 100 is further
`extended according to two other aspects of the invention.
`Referring to FIG. 5A, according to one aspect of the
`invention,
`the hardware placed on the mother card 10 is
`generalized into a comprehensive controller 41. The com-
`prehensive controller 41 functions as a controller or an
`interface for a predefined set of peripheral devices imple-
`mented on daughter cards that may hc connected to the host
`via the mother card. The comprehensive controller 41 incor-
`porates a common set of functional components (similar to
`that of the memory controller 40 described in FIG. 3). This
`common set is common to the predefined set of peripheral
`devices. In this way each peripheral in the predefined set can
`eliminale these common functional components on each
`daughter card and instead access them in the comprehensive
`controller 41 on the mother card.
`For example, the daughter card 20 may be carrying either
`flash memory “floppy drive" or a small form factor magnetic
`hard disk (cg. just
`the head, disk and motor assembly
`portions of a 1.8" or 1.3" hard disk without its