throbber
3GPP TSG RAN1 #50
`Athens, Greece
`August 20-24, 2007
`
` R1-073361
`
`7.3
`Motorola
`Uplink channel interleaving
`Discussion and Decision
`
`Agenda Item:
`Source:
`Title:
`Document for:
`1. Summary
`For LTE uplink channel interleaving we propose:
`• After rate matching, codeword bits for each code block are mapped to modulation symbols separately.
`• Interleaving is a modulation symbol-level operation that occurs after the modulation mapper.
`• Interleaving span is the entire subframe, but is created by a simple mapping rule.
`• The simple mapping alternates turbo code block symbols between first and second halves of the
`subframe as much as possible when a subframe is composed of two slots
`o The simple mapping rule should take into account that there may not be the same number
`of symbols in each slot due to the presence of UL sounding LB.
`• A simple row-column interleaver offers performance as good as a random interleaver with ideal channel
`estimation, and will have advantages for advanced ISI-cancellation receivers.
`• If more simplicity is desired, a time-first alternating mapping provides superior performance to a
`frequency first alternating mapping. This is reflects the benefits of time diversity while there is almost no
`frequency diversity within a SC-FDMA symbol due to DFT-spreading on the UL.
`• Simple symbol-based channel interleavers are beneficial for advanced receiver algorithms; with the
`time-first alternating mapping provides superior performance to a frequency first alternating mapping.
`2. Background
`This document discusses the performance of uplink channel interleaving candidates for LTE. In LTE,
`transport blocks (TBs) greater than 6144 bits in length are segmented into multiple smaller code block
`segments [1]. In a 20 MHz deployment there may be 13,600 resource elements in a (short CP, n=2 control
`symbols) 1ms TTI, resulting (with 64QAM) in as many as 13 segments per TB. A detailed description of
`the impact of channel interleaving in receiver latency and efficient processing of multi-segment TBs was
`described in [2].
`
`There are two aspects to the channel interleaver design - interleaving depth (or span) and the interleaving
`unit. A proper combination of these two aspects can be used to reduce latency (and receiver complexity)
`while still achieving a diversity benefit.
`
` Options for interleaving depth
`i) within a code block segment
`iii) within a slot
`
`ii) within a OFDM / SC-FDMA symbol
`iv) within a subframe
`
`v) none
`
` Options for interleaving unit
`i) code bit (i.e., bit-level interleaving)
`
`ii) modulation symbol (i.e., symbol-level interleaving)
`
`As part of LTE rate-matching discussion, it was agreed to do rate-matching (RM) per code block when the
`TB consists of multiple code blocks (segments, or codewords). The RM is performed on each code block
`separately using the circular buffer rate-matching (CBRM) technique. Since the output of the CBRM is a
`permuted version of the codeword (corresponding to each code block), an inherent bit-level interleaving
`exists within each code block. Therefore, it might be possible to avoid another bit-level interleaver to mix
`the bits from all the code blocks together thereby avoiding additional processing latency at the receiver.
`
`Page 1 of 11
`
`

`

`3. Channel interleaver
`It is proposed that the output of CBRM for each code block be mapped to a distinct set of modulation
`symbols. Furthermore, the modulation symbols for different code blocks of a TB are mixed using a
`symbol-level interleaver to obtain diversity benefits. With proper design, the resultant performance should
`be close to that obtained with a full bit-level channel interleaver that mixes bits from all the segments
`together before mapping onto modulation symbols. The symbol interleaver may be designed (with the
`desired span) to attain the desired time/frequency diversity while the bit-interleaving may be limited (as is
`with the CBRM interleaver) to within a code block segment. Therefore, it is recommended
`
` No bit-level interleaving after CBRM.
`For the uplink, the span of symbol interleaver should be within a subframe (or two slots most
`
`commonly) to fully exploit the diversity.
`
`As discussed earlier, the bit-level interleaving is inherent in CBRM. Priority mapping can be considered
`another type of bit-level interleaving, if used to map systematic bit to more reliable bit positions within a
`QAM symbol.
`
`Unlike downlink, the SC-FDMA uplink requires a different channel interleaver design to exploit the
`following.
`i)
`
`ii)
`
`iii)
`
`Similar frequency diversity for all QAM symbols within a SC-FDMA long block due to DFT
`spreading on the UL.
`Frequency diversity, time diversity, and channel estimation error averaging1 can be obtained
`by intra-subframe (inter-slot) hopping with frequency-diverse allocations.
`(Limited) time-diversity and channel estimation error averaging for frequency-selective
`allocations.
`Therefore, in case of a transport block with multiple codewords, each codeword should enjoy the
`inter-slot hopping diversity. Further, to reduce implementation complexity, it is desirable to use the same
`channel interleaver for all variations, including (a) frequency-diverse or frequency selective allocations, (b)
`for subframes with or without sounding LB, (c) for subframes of one or two slots,.
`
`The input to the symbol-level channel interleaver consists of all the modulation symbols for code block
`segment 1 followed by all modulation symbols of code block segment 2 and so on. The function of the
`channel interleaver is to assign each input symbol to a DFT-spreading code of a SC-FDMA symbol prior to
`DFT precoding on the uplink.
`
`The following are some candidate channel interleaver options possible for LTE uplink:
`Option 1. Channel interleaver is a simple mapping that alternates code block symbols between
`first and second halves of the subframe in a frequency first manner
`Option 2. Channel interleaver is a simple mapping that alternates code block symbols between
`first and second halves of the subframe in a time first manner. This is shown in Figure 1 where
`the inter-column permutation can be defined suitably. For example, when L = 12, an example
`permutation could be [0 2 4 6 8 10 1 3 5 7 9 11]. The permutation rule in option 2 comprises of
`writing input symbols row-wise, perform column-wise permutation and map each column onto
`symbols in a SC-FDMA symbol as shown in Figure 2.
`Option 3. Channel interleaver is a simple mapping that alternates code block symbols between
`first and second halves of the subframe using a row-column permutation (See Figure 2)
`assuming sub-carriers (as denoting the columns) and SC-FDMA symbols (as denoting the rows).
`
`The permutation rule in option 3 can be very simple, for e.g, writing input symbols column-wise, perform
`row-wise cyclic shifting and map each column onto symbols in a SC-FDMA symbol as shown in Figure 2.
`
`1 Each LB will have different channel estimation errors relative to the RS. By mixing code block segments
`within a LB, overall channel estimation error averaging occurs within the code block segments. Having the
`code block segments of similar quality is desired since ACK/NAK is for a TB of the multiple code blocks.
`
`Page 2 of 11
`
`

`

`For reduced complexity the cyclic shift values can be made periodic. Option 3 is useful as it tends to
`interlace code blocks within an SC-FDMA symbol which is beneficial for advanced (MMSE + Decision-
`directed ISI cancellation) receivers as shown in Section 5.
`
`An example of period-12 cyclic shift values for the case with no sounding LB within the UL sub-frame,
`(number of LBs per subframe is L= 12), is [0 8 2 6 1 7 3 11 5 9 4 10] (P0 =0, P1 = 8, …), while with a
`sounding LB in the second slot of the UL sub-frame (L=11) is [0 7 2 6 1 8 5 10 3 9 4] (period-11). Another
`example of a L=12 periodic sequence is
`
`Similarly, Options 1 and 2 can also be easily modified to accommodate the sounding LB.
`
`MSC×L
`
`Time
`L (Number of
`OFDMA Symbols)
`
`2nd : Inter-column permutation
`
`Segment 0
`
`Segment 0
`
`Segment 0
`
`Segment 1
`Segment 1
`
`Segment 2
`
`…….
`
`Segment C-1
`
`Option 2
`
`1st : Fill array row-by-row
`with modulation symbols
`
`MSC (Number of sub-carriers)
`
`Frequency
`
`To SC-FDMA symbol L-1
`
`…….
`
`3rd : Read array column-by-
`column, symbols in each
`column are DFT-spread to
`one SC-FDMA symbol
`
`To SC-FDMA symbol 1
`
`To SC-FDMA symbol 0
`
`Figure 1. Symbol-level channel interleaver Option 2 (time-first alternating). The picture illustrates
`the segments after first step of fill array row-by-row.
`
`Page 3 of 11
`
`

`

`1st : Fill array column-by-column with
`the modulation symbols
`
`Option 3
`
`MSC×L
`
`2nd : Cyclic shift each row by
`a different value
`
`…….
`
`Rotate by P0
`
`Rotate by P1
`
`Rotate by P2
`
`…….…….
`…….…….
`
`Time
`L (Number of
`OFDMA Symbols)
`
`Segment C-1
`
`To SC-FDMA symbol L-1
`
`…….
`…….
`
`Segment 2
`
`Segment 1
`
`Segment 1
`
`Segment 0
`
`Segment 1
`
`Segment 0
`
`Segment 0
`
`MSC (Number of sub-carriers)
`Frequency
`
`…….
`
`3rd : Read array column-by-
`column, symbols in each
`column are DFT-spread to
`one SC-FDMA symbol
`
`To SC-FDMA symbol 1
`
`To SC-FDMA symbol 0
`
`Figure 2. Symbol-level channel interleaver Option 3. The picture illustrates the segments after first
`step of fill array column-by-column.
`
`4. Simulation results
`The uplink simulations were performed for the agreed parameters for the above three options. Futhermore,
`the results are also shown for Option 4 : completely random bit-level channel interleaver and Option 5
`no interleaving. For Option 4, a new random interleaving pattern is drawn for each transport block. For
`Option 5, modulation symbols are mapped sequentially frequency first (on inter-slot diversity exploited for
`the segments). The simulations assume Ideal Channel Estimation with eight turbo decoding iterations and
`max-log-map decoding kernel. The inter-slot frequency hopping mode is enabled.
`
`Figures 1-5 show the block error rate (BLER) of a transport block of size 1500 bytes for two different
`speeds (the parameters for simulations were discussed on the email reflector under the channel coding
`thread on the 3gpp RAN1 email reflector). Figures 1-3 show the performance of three MCS with code rates
`≈ ½ for a velocity=120 kmph. Figures 4-5 show the performance when the velocity = 3 kmph.
`
`The result shows that Option 5 (no interleaving) suffers performance loss (up to 0.5 dB) due to lack of
`time diversity. Furthermore, Option 1 that alternates code symbols and fills freq first is slightly worse
`(~0.25 dB) than Options 2,3,4. The performance difference between Options 1-4 is minimal at low speeds.
`Simulations results for the other TB sizes (40 byte and 3000 byte) also indicate the same performance
`trend. See Figures 7-10 in the Appendix for the 40 byte and 3000 byte simulation results (3000 bytes, code
`rate ≈ ¾ simulations are not reported here).
`
`It is encouraging to note that Options 1, 2 and 3 which use simple symbol-level channel interleavers have a
`performance very close to Option 4 that has a channel interleaver that randomly mixes bits from all the
`segments. Since Option 3 can benefit advanced receiver algorithms, it is preferred to adopt Option 3 for
`LTE UL channel interleaving. If more simplicity is desired, a time-first alternating mapping provides
`superior performance to a frequency first alternating mapping.
`
`Page 4 of 11
`
`

`

`
`
`Figure 3. k=1500 bytes transport block, Code Rate ≈ ½, speed 120 kmph.
`
`
`
`
`Figure 4. k=1500 bytes transport block, Code Rate ≈ ½, 16QAM with 42 RBs, 120 kmph (zoomed in on
`Figure 3).
`
` Page 5 of 11
`
`

`

`
`
`Figure 5. k=1500 bytes transport block, Code Rate ≈ 3/4, 120 kmph.
`
`
`
`
`
`Figure 6. k=1500 bytes transport block, Code Rate ≈ ½, 3 kmph.
`
`
` Page 6 of 11
`
`

`

`
`
`Figure 7. k=1500 bytes transport block, Code Rate ≈ 3/4, 3 kmph.
`
`
`5. Simulation results with advanced receiver
`The impact of the different channel interleaver options on the performance of advanced receivers is shown
`in this section. The simulation settings used here are different than those in Section 4, especially the code
`block segmentation rule is slightly modified to allow simulation of multiple segments with small segment
`sizes. The results are indicative of the trends that can be expected with real segment sizes.
`
`The simulation parameters for the advanced receiver simulations are as follows.
`5MHz BW, 512-pt FFT
`
` Turbo code, Max-log-MAP kernel, 6 iterations
` GSM TU-6 ray channel
`1Tx/2Rx
`
`
`2600 information bits, 1300 bits/segment. Two code block segments are generated and modulated on
`QAM symbols after rate-matching.
` Effective code rate ≈ 0.75
` Channel estimation: 2D-MMSE channel estimation
` Receivers: MMSE or advanced receiver (denoted as Advanced Rx in plots)
`1ms TTI consisting of two slots, 7 LBs for each slot
`
`
`
`The symbol-base channel interleavers (Options 1, 2, and 3) and no channel interleaving (Option 5) were
`tested, and the Option 4 (completely random bit interleaver) was omitted. The results are shown in Figures
`7 and 8 for two different velocities.
`
`The results indicate that
` Both Option 2 and Option 3 outperform Option 1 since they can exploit time-diversity more
`effectively. Of these, Option 3 performs slightly better (~0.1dB gain) than Option 2 for the advanced
`receiver.
`
` Page 7 of 11
`
`

`

`
`
`Figure 8. 16QAM, 60km/h, FH localized, 2600bits, 6RB allocation.
`
`
`
`
`
`
`Figure 9. 16QAM, 120km/h, localized, 2600bits, 6RB allocation.
`
` Page 8 of 11
`
`

`

`6. Conclusions
`The simulation results suggest that Option 2 and Option 3 perform very close to the optimal channel
`interleaving case (option 5). Therefore it is recommended to adopt Option 2 or Option 3 for LTE uplink
`channel interleaver as they are more suitable for advanced receiver algorithms.
`
`7. References
`[1] 3GPP TS 36.212 V1.1.0 (2007-03), 3rd Generation Partnership Project, Technical Specification Group
`Radio Access Network, Multiplexing and Channel Coding (Release 8).
`[2] R1-072140, Motorola, “On Enabling Pipelining of Channel Coding Operations in LTE,” 3GPP
`RAN1#49, Kobe, Japan, May 07-11, 2007.
`
`Appendix
`
`Figure 10. k=40bytes simulations, with QPSK, 2 RBs and 3 RBs, 120 kmph.
`
`
`
` Page 9 of 11
`
`

`

`Figure 11. k=40bytes simulations, with QPSK, 2 RBs and 3 RBs, 3 kmph.
`
`
`
`
`
`
`Figure 12. k=3000bytes simulations, for two modulations, code rate ≈ ½ 120 kmph.
`
` Page 10 of 11
`
`

`

`Figure 13. k=3000bytes simulations, for two modulations, code rate ≈ ½, 3kmph.
`
`Page 11 of 11
`
`

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