FOURTH EDITION
`
`E · ECTRONIC
`I
`CIRCUITS
`
`Adel S. Sedra
`University of Toronto
`
`Kenneth C. Smith
`University of Toronto and Hong Kong
`University of Science and Technology
`
`New York Oxford
`OXFORD UNIVERSITY PRESS
`
`LGE-1018 / Page 1 of 11
`LGE v. Fundamental
`
`

`

`Oxford University Press
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`
`Library of Congress Cataloging-in-Publication Data
`
`Sedra, Adel S.
`Microelectronic circuits I Adel S. Sedra, Kenneth C. Smith. -
`4th ed.
`p.
`cm. -
`(Oxford series in electrical and computer engineering)
`Includes bibliographical references and index.
`ISBN 0-19-511663-1
`2. Integrated circuits.
`I. Electronic circuits.
`III. Series.
`II. Title.
`Kenneth Carless.
`1997
`TK7867.S39
`621.381-dc21
`
`I. Smith,
`
`97-11254
`CIP
`
`9 8 7 6 5 4 3 2
`
`Printed in the United States of America on acid-free paper
`
`Cover Illustration: The chip shown is the ADXL-50 surface-micromachined accelerometer. For the first time, sensor
`and signal conditioning are combined on a single monolithic chip. In its earliest application, it was a key factor in
`the improved reliability and reduced cost of modern automotive airbag systems. Photo reprinted with permission of
`Analog Devices, Inc.
`
`LGE-1018 / Page 2 of 11
`
`

`

`,;···,
`
`k
`
`JbkTAILED TABLE OF CONTENTS
`,,
`,,
`
`,·
`
`'
`
`PREFACE v
`
`Chapter 1
`
`INTRODUCTION TO ELECTRONICS J
`
`1.1
`1.2
`1.3
`1.4
`1.5
`1.6
`1.7
`
`Introduction 1
`Signals 2
`Frequency Spectrum of Signals 3
`Analog and Digital Signals 6
`Amplifiers 9
`Circuit Models f?r Amplifiers 19
`Frequency Response of Amplifiers 28
`The Digital Logic Inverter 39
`Summary 47
`Bibliography 48
`Problems 48
`
`PART I DEVICES AND BASIC CIRCUITS 58
`
`Chapter 2
`
`OPERATIONAL AMPLIFIERS 60
`
`Introduction 60
`2.1 The Op-Amp Terminals 61
`2.2 The Ideal Op Amp 62
`2.3 Analysis of Circuits Containing Ideal Op Amps-The Inverting Configuration 64
`2.4 Other Applications of the Inverting Configuration 71
`2.4.1 The Inverting Configuration with General Impedances Z1 and Z2 71
`2.4.2 The Inverting Integrator 73
`2.4.3 The Op Amp Differentiator 78
`2.4.4 The Weighted Summer 80
`2.5 The Noninverting Configuration 81
`2.6 Examples of Op-Amp Circuits 85
`2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance 92
`2.8 Large-Signal Operation of Op Amps 97
`2.9 DC Imperfections 101
`Summary 108
`Bibliography 109
`Problems 110
`
`XlV
`
`LGE-1018 / Page 3 of 11
`
`

`

`DETAILED TABLE OF CONTENTS
`
`xv
`
`Chapter 3
`
`DIODES 122
`
`Introduction 122
`3.1 The Ideal Diode 123
`3.2 Terminal Characteristics of Junction Diodes 131
`3.3 Physical Operation of Diodes 137
`3.3.1 Basic Semiconductor Concepts 138
`3.3.2 The pn Junction Under Open-Circuit Conditions 143
`3.3.3 The pn Junction Under Reverse-Bias Conditions 146
`3.3.4 The pn Junction in the Breakdown Region 149
`3.3.5 The pn Junction Under Forward-Bias Conditions 151
`3.3.6 Summary 155
`3.4 Analysis of Diode Circuits 155
`3.5 The Small-Signal Model and Its Application 163
`3.6 Operation in the Reverse Breakdown Region-Zener Diodes 172
`3.7 Rectifier Circuits 179
`3.8 Limiting and Clamping Circuits 191
`3.9 Special Diode Types 196
`3.10 The SPICE Diode Model and Simulation Examples 199
`Summary 206
`Bibliography 206
`Problems 207
`
`Chapter 4
`
`BIPOLAR JUNCTION TRANSISTORS (BJTs) 221
`
`Introduction 221
`4.1 Physical Structure and Modes of Operation 222
`4.2 Operation of the npn Transistor in the Active Mode 223
`4.3 The pnp Transistor 232
`4.4 Circuit Symbols and Conventions 234
`4.5 Graphical Representation of Transistor Characteristics 238
`4.6 Analysis of Transistor Circuits at DC 241
`4.7 The Transistor as an Amplifier 253
`4.8 Small-Signal Equivalent Circuit Models 259
`4.9 Graphical Analysis 272
`4.10 Biasing the BJT for Discrete-Circuit Design 276
`4.11 Basic Single-Stage BJT Amplifier Configurations 282
`4.12 The Transistor as a Switch-Cutoff and Saturation 295
`4.13 A General Large-Signal Model for the BJT: The Ebers-Moll (EM) Model 303
`4.14 The Basic BJT Logic Inverter 310
`4.15 Complete Static Characteristics, Internal Capacitances, and Second-Order Effects 315
`4.16 The SPICE BJT Model and Simulation Examples 326
`Summary 331
`Bibliography 332
`Problems 333
`
`-------- - - - - - - - - - -
`
`LGE-1018 / Page 4 of 11
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`

`

`xvi
`
`DETAILED TABLE OF CONTENTS
`
`Chapter 5
`
`FIELD-EFFECT TRANSISTORS (FETs) 353
`
`Introduction 353
`5.1 Structure and Physical Operation of the Enhancement-Type MOSFET 354
`5.2 Current-Voltage Characteristics of the Enhancement MOSFET 366
`5.3 The Deletion-Type MOSFET 376
`5.4 MOSFET Circuits at DC 380
`5.5 The MOSFET as an Amplifier 389
`5.6 Biasing in MOS Amplifier Circuits 400
`5.6.1 Biasing of Discrete MOSFET Amplifiers 400
`5.6.2 Biasing in Integrated-Circuit MOS Amplifiers 402
`5.7 Basic Configurations of Single-Stage IC MOS Amplifiers 408
`5.7.1 The CMOS Common-Source Amplifier 409
`5.7.2 The CMOS Common-Gate Amplifier 413
`5.7.3 The Common-Drain or Source-Follower Configuration 416
`5.7.4 All-NMOS Amplifier Stages 419
`5.7.5 A Final Remark 425
`5.8 The CMOS Digital Logic Inverter 425
`5.9 The MOSFET as an Analog Switch 436
`5.10 The MOSFET Internal Capacitances and High-Frequency Model 441
`5.11 The Junction Field-Effect Transistor (JFET) 447
`5.12 Gallium Arsenide (GaAs) Devices-The MESFET 452
`5.13 The SPICE MOSFET Model and Simulation Examples 458
`Summary 464
`Bibliography 464
`Problems 466
`
`PART II ANALOG CIRCUITS 484
`
`Chapter 6
`
`DIFFERENTIAL AND MULTISTAGE AMPLIFIERS 487
`
`Introduction 487
`6.1 The BJT Differential Pair 487
`6.2 Small-Signal Operation of the BJT Differential Amplifier 492
`6.3 Other Nonideal Characteristics of the Differential Amplifier 504
`6.4 Biasing in BJT Integrated Circuits 508
`6.5 The BJT Differential Amplifier with Active Load 522
`6.6 MOS Differential Amplifiers 527
`6.7 BiCMOS Amplifiers 537
`6.8 GaAs Amplifiers 542
`6.9 Multistage Amplifiers 551
`6.10 SPICE Simulation Example 558
`Summary 563
`Bibliography 564
`Problems 564
`
`LGE-1018 / Page 5 of 11
`
`

`

`Chapter 7
`
`FREQUENCY RESPONSE 583
`
`DETAILED TABLE OF CONTENTS
`
`xvn
`
`Introduction 583
`s-Domain Analysis: Poles, Zeros, and Bode Plots 584
`7.1
`7 .2 The Amplifier Transfer Function 590
`7.3 Low-Frequency Response of the Common-Source and Common-Emitter
`Amplifiers 602
`7.4 High-Frequency Response of the Common-Source and Common-Emitter
`Amplifiers 610
`7.5 The Common-Base, Common-Gate, and Cascode Configurations 619
`7.6 Frequency Response of the Emitter and Source Followers 626
`7.7 The Common-Collector Common-Emitter Cascade 630
`7.8 Frequency Response of the Differential Amplifier 635
`7.9 SPICE Simulation Examples 645
`Summary 649
`Bibliography 650
`Problems 650
`
`Chapter 8
`
`FEEDBACK 667
`
`Introduction 667
`8.1 The General Feedback Structure 668
`8.2 Some Properties of Negative Feedback 670
`8.3 The Four Basic Feedback Topologies 675
`8.4 The Series-Shunt Feedback Amplifier 679
`8.5 The Series"Series Feedback Amplifier 688
`8.6 The Shunt-Shunt and the Shunt-Series Feedback Amplifiers 696
`8.7 Determining the Loop Gain 708
`8.8 The Stability Problem 713
`8.9 Effect of Feedback on the Amplifier Poles 715
`8.10 Stability Study Using Bode Plots 725
`8.11 Frequency Compensation 729
`8.12 SPICE Simulation Examples 735
`Summary 740
`Bibliography 740
`Problems 741
`
`Chapter 9
`
`OUTPUT STAGES AND POWER AMPLIFIERS 751
`
`Introduction 751
`9.1 Classification of Output Stages 752
`9.2 Class A Output Stage 753
`9.3 Class B Output Stage 758
`
`LGE-1018 / Page 6 of 11
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`xviii
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`DETAILED TABLE OF CONTENTS
`
`9.4 Class AB Output Stage 764
`9.5 Biasing the Class AB Circuit 767
`9.6 Power BJTs 773
`9.7 Variations on the Class AB Configuration 780
`IC Power Amplifiers 785
`9.8
`9.9 MOS Power Transistors 792
`9.10 SPICE Simulation Example 797
`Summary 802
`Bibliography 802
`Problems 803
`
`Chapter 10 ANALOG INTEGRATED CIRCUITS 810
`
`Introduction 810
`10.1 The 741 Op-Amp Circuit 811
`10.2 DC Analysis of the 741 815
`10.3 Small-Signal Analysis of the 741 Input Stage 822
`10.4 Small-Signal Analysis of the 741 Second Stage 828
`10.5 Analysis of the 741 Output Stage 830
`10.6 Gain and Frequency Response of the 741 835
`10.7 CMOS Op Amps 840
`10.8 Alternative Configurations for CMOS and BiCMOS Op Amps 850
`10.9 Data Converters-An Introduction 856
`10.10 DIA Converter Circuits 860
`10.11 AID Converter Circuits 864
`10.12 SPICE Simulation Example 870
`Summary 874
`Bibliography 875
`Problems 876
`
`Chapter 11
`
`FILTERS AND TUNED AMPLIFIERS 884
`
`Introduction 884
`11. l Filter Transmission, Types, and Specification 885
`11.2 The Filter Transfer Function 889
`11.3 Butterworth and Chebyshev Filters 892
`11.4 First-Order and Second-Order Filter Functions 900
`11.5 The Second-Order LCR Resonator 909
`11.6 Second-Order Active Filters Based on Inductor Replacement 915
`11.7 Second-Order Active Filters Based on the Two-Integrator-Loop Topology 923
`11.8 Single-Amplifier Biquadratic Active Filters 929
`11.9 Sensitivity 938
`
`LGE-1018 / Page 7 of 11
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`DETAILED TABLE OF CONTENTS
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`xix
`
`11.10 Switched-Capacitor Filters 941
`11.11 Tuned Amplifiers 946
`11.12 SPICE Simulation Examples 959
`Summary 965
`Bibliography 966
`Problems 967
`
`Chapter 12 SIGNAL GENERATORS AND WAVEFORM-SHAPING CIRCUITS 973
`
`Introduction 973
`12. l Basic Principles of Sinusoidal Oscillators 974
`12.2 Op Amp-RC Oscillator Circuits 980
`12.3 LC and Crystal Oscillators 988
`12.4 Bistable Multivibrators 994
`12.5 Generation of Square and Triangular Waveforms Using Astable
`Multivibrators 1002
`12.6 Generation of a Standardized Pulse-The Monostable Multivibrator 1007
`12.7
`Integrated-Circuit Timers 1009
`12.8 Nonlinear Waveform-Shaping Circuits 1014
`12.9 Precision Rectifier Circuits 1018
`12.10 SPICE Simulation Examples 1026
`Summary 1030
`Bibliography 1030
`Problems 1031
`
`PART III DIGITAL CIRCUITS 1040
`
`Chapter 13 MOS DIGITAL CIRCUITS 1042
`
`Introduction 1042
`13.1 Digital Circuit Design: An Overview 1043
`13.1.1 Digital IC Technologies and Logic-Circuit Families 1043
`13.1.2 Logic-Circuit Characterization 1045
`13.1.3 Styles for Digital System Design 1048
`13.1.4 Design Abstraction and Computer Aids 1048
`13.2 Design and Performance Analysis of the CMOS Inverter 1049
`13.3 CMOS Logic-Gate Circuits 1058
`13.4 Pseudo-NMOS Logic Circuits 1070
`13.5 Pass-Transistor Logic Circuits 1080
`13.6 Dynamic Logic Circuits 1090
`13.7 Latches and Flip-Flops 1097
`13.8 Multivibrator Circuits 1106
`13.9 Semiconductor Memories: Types and Architectures 1113
`
`i--.... _____________________ --- ------- ---- -
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`LGE-1018 / Page 8 of 11
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`xx
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`DETAILED TABLE OF CONTENTS
`
`13.10 Random-Access Memory (RAM) Cells 1116
`13.11 Sense Amplifiers and Address Decoders 1125
`13.11.1 The Sense Amplifier 1125
`13.11.2 The Row-Address Decoder 1131
`13.11.3 The Column-Address Decoder 1133
`13.12 Read-Only Memory (ROM) 1133
`13.13 SPICE Simulation Example 1140
`Summary 1144
`Bibliography 1146
`Problems 1146
`
`Chapter 14 BIPOLAR AND ADVANCED-TECHNOLOGY DIGITAL CIRCUITS 1158
`
`Introduction 1158
`14.1 Dynamic Operation of the BJT Switch 1159
`14.2 Early Forms of BJT Digital Circuits 1163
`14.3 Transistor-Transistor Logic (TTL or T2L) 1167
`14.4 Characteristics of Standard TTL 1180
`14.5 TTL Families with Improved Performance 1187
`14.6 Emitter-Coupled Logic (ECL) 1195
`14.7 BiCMOS Digital Circuits 1211
`14.8 Gallium-Arsenide Digital Circuits 1216
`14.9 SPICE Simulation Example 1224
`Summary 1230
`Bibliography 1231
`Problems 1232
`
`APPENDIXES
`
`A VLSI FABRICATION TECHNOLOGY A-1
`B Two-PoRT NETWORK PARAMETERS B-1
`c AN INTRODUCTION TO SPICE C-1
`D
`INPUT FILES FOR THE SPICE EXAMPLES D-1
`E
`SOME USEFUL NETWORK THEOREMS E-1
`SINGLE-TIME-CONSTANT CIRCUITS F-1
`F
`G DETERMINING THE PARAMETER VALUES OF THE HYBRID-'7T BJT Model G-1
`H
`STANDARD RESISTANCE VALUES AND UNIT PREFIXES H-1
`I
`ANSWERS TO SELECTED PROBLEMS 1-1
`
`INDEX
`
`IN-1
`
`I
`I
`
`- - ...
`
`l
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`LGE-1018 / Page 9 of 11
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`

`

`3.7 RECTIFIER CIRCUITS
`
`179
`
`by substituting
`7.3 V Next we
`if and hmax =
`A. Thus
`
`load current varies over the range 0 to 15 mA. Find a suitable value for the resistor R. What is the maximum
`power dissipation of the zener diode?
`
`Ans. 470 fi; 112 mW
`
`3.26 A shunt regulator utilizes a zener diode whose voltage is 5.1 Vat a current of 50 mA and whose incre(cid:173)
`mental resistance is 7 n. The diode is fed from a supply of 15-V nominal voltage through a 200-fi resistor.
`What is the output voltage at no load? Find the line regulation and the load regulation.
`
`Ans. 5.1 V; 33.8 mVN; -6.8 mV/mA
`
`3.7 RECTIFIER CIRCUITS
`One of the most important applications of diodes is in the design of rectifier circuits. A
`diode rectifier forms an essential building block of the de power supplies required to power
`electronic equipment. A block diagram of such a power supply is shown in Fig. 3.36. As
`indicated, the power supply is fed from the 120-V (rms) 60-Hz ac line, and it delivers a de
`voltage V0 (usually in the range of 5 to 20 V) to an electronic circuit represented by the
`load block. The de voltage Vo is required to be as constant as possible in spite of variations
`in the ac line voltage and in the current drawn by the load.
`The first block in a de power supply is the power transformer. It consists of two
`separate coils wound around an iron core that magnetically couples the two windings. The
`primary winding, having N1 turns, is connected to the 120-V ac supply; and the secondary
`winding, having N2 turns, is connected to the circuit of the de power supply. Thus an ac
`voltage vs of 120(N2/Ni) volts (rms) develops between the two terminals of the secondary
`winding. By selecting an appropriate turns ratio (N1/N2 ) for the transformer, the designer
`can step the line voltage down to the value required to yield the particular de voltage output
`of the supply. For instance, a secondary voltage of 8-V rms may be appropriate for a de
`output of 5 V. This can be achieved with a 15: 1 turns ratio.
`In addition to providing the appropriate sinusoidal amplitude for the de power supply,
`the power transformer provides electrical isolation between the electronic equipment and
`the power-line circuit. This isolation minimizes the risk of electric shock to the equipment
`user.
`The diode rectifier converts the input sinusoid vs to a unipolar output, which can have
`
`Power
`•
`+ ac line
`120 V (rms)
`60 Hz
`
`0
`,.
`. v t
`
`Fig. 3.36 Block diagram of a de power supply.
`
`t
`
`ts of its temper(cid:173)
`ly expressed in
`le the TC varies
`t 5 V exhibit a
`ve TC. The TC
`. the diode at a
`ice voltage with
`tperature coeffi(cid:173)
`he forward-con(cid:173)
`{ /°C, the series
`
`Jf son. What
`zener model?
`
`e knee current.
`V supply. The
`
`LGE-1018 / Page 10 of 11
`
`

`

`180
`
`DIODES
`
`the pulsating waveform indicated in Fig. 3.36. Although this waveform has a nonzero av(cid:173)
`erage or a de component, its pulsating nature makes it unsuitable as a de source for electronic
`circuits, hence the need for a filter. The variations in the magnitude of the rectifier output
`are considerably reduced by the filter block in Fig. 3.36. In the following we shall study a
`number of rectifier circuits and a simple implementation of the output filter.
`The output of the rectifier filter, though much more constant than without the filter,
`still contains a time-dependent component, known as ripple. To reduce the ripple and to
`stabilize the magnitude of the de output voltage of the supply against variations caused by
`changes in load current, a voltage regulator is employed. Such a regulator can be imple(cid:173)
`mented using the zener shunt regulator configuration studied in Section 3.6. Alternatively,
`an integrated-circuit (IC) regulator can be used [see, for example, Soclof (1985)].
`
`The Half-Wave Rectifier
`
`The half-wave rectifier utilizes alternate half cycles of the input sinusoid. Figure 3.37(a)
`shows the circuit of a half-wave rectifier. This circuit was analyzed in Section 3.1 (see Fig.
`3.3) assuming an ideal diode. Using the more realistic battery-plus-resistance diode model,
`we obtain the equivalent circuit shown in Fig. 3.37(b), from which we can write
`
`Vo= 0,
`
`vs< Vvo
`
`vo =
`
`R
`R
`vs - Vvo---
`R + rv'
`R + rv
`
`vs 2: Vvo
`
`(3.63a)
`
`(3.63b)
`
`The transfer characteristic represented by these equations is sketched in Fig. 3.37(c). In
`many applications, rv << R and the second equation can be simplified to
`
`Vo= vs - Vvo
`
`(3.64)
`
`where Vvo = 0.7 or 0.8 V. Figure 3.37(d) shows the output voltage obtained when the input
`vs is a sinusoid.
`In selecting diodes for rectifier design, two important parameters must be specified: the
`current-handling capability required of the diode, determined by the largest current the diode
`is expected to conduct, and the peak inverse voltage (PIV) that the diode must be able to
`withstand without breakdown, determined by the largest reverse voltage that is expected to
`appear across the diode. In the rectifier circuit of Fig. 3.37(a) we observe that when vs is
`negative the diode will be cut off and v0 will be zero. It follows that the PIV is equal to
`the peak of vs,
`
`PIV = V,
`
`It is usually prudent, however, to select a diode that has a reverse breakdown voltage at
`least 50% greater than the expected PIV.
`Before leaving the half-wave rectifier, the reader should note two points. First, it is
`possible to use the diode exponential characteristic to determine the exact transfer charac(cid:173)
`teristic of the rectifier (see Problem 3.82). However, the amount of work involved is usually
`too great to be justified in practice. Of course, such an analysis can be easily done using a
`computer circuit-analysis program such as SPICE (see Section 3.10 and Appendix C).
`Second, whether we analyze the circuit accurately or not it should be obvious that this
`circuit does not function properly when the input signal is small. For instance, this circuit
`
`LGE-1018 / Page 11 of 11
`
`