(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2001/0016890 A1
`Sonoda
`(43) Pub. Date:
`Aug. 23, 2001
`
`US 20010016890A1
`
`(54) INTERFACE DISTINGUISHING APPARATUS
`
`Publication Classi?cation
`
`(75) Inventor: Yuko Sonoda, Fukushima-ken (JP)
`
`Correspondence Address:
`Brinks Hofer Gllson & Llone
`PO. Box 10395
`Chlcago’ IL 60610 (Us)
`-
`_
`-
`(73) Asslgnee' Alps Electnc Co" Ltd‘
`(21) APPL NO;
`09/771,301
`
`(22) Filed;
`
`Jam 25, 2001
`
`(30)
`
`Foreign Application Priority Data
`
`Feb. 7, 2000 (JP) .................................... .. 2000-029014
`
`..... .. G06F 13/00; G06F 13/38
`(51) Int. Cl.7 .
`(52) US. Cl. ............................................................ .. 710/129
`
`(57)
`
`ABSTRACT
`
`In order to determine, Where a terminal device and a
`computer main frame are connected by a PS/2 interface or
`a USB interface, Which interface is connected, the main
`frame and the terminal device monitor the states of tWo
`signal lines after the PS/2 or USB interface is connected to
`a port of the terminal device, and the interface is determined
`to be one for PS/2 use if the states are (H, H) or (H, L). If
`the states are (L, L), a distinguishing signal assigning section
`on the terminal device side turns on a sWitching means to
`give an H signal to the signal lines.
`
`1a
`
`1A
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`
`21
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`10A
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`
`LGE-1017 / Page 1 of 10
`LGE v. Fundamental
`
`

`

`Patent Application Publication Aug. 23, 2001 Sheet 1 0f 3
`
`US 2001/0016890 A1
`
`FIG. 1
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`LGE-1017 / Page 2 of 10
`
`

`

`Patent Application Publication Aug. 23, 2001 Sheet 2 0f 3
`
`US 2001/0016890 A1
`
`FIG. 2
`
`LGE-1017 / Page 3 of 10
`
`

`

`Patent Application Publication Aug. 23, 2001 Sheet 3 0f 3
`
`US 2001/0016890 A1
`
`FIG. 3
`
`Vcc
`
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`k TE
`
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`LGE-1017 / Page 4 of 10
`
`

`

`US 2001/0016890 A1
`
`Aug. 23, 2001
`
`INTERFACE DISTINGUISHING APPARATUS
`
`BACKGROUND OF THE INVENTION
`
`[0001] 1. Field of the Invention
`
`[0002] The present invention relates to an interface dis
`tinguishing apparatus Which, When a terminal device, such
`as a keyboard, to Which, for instance, PS/2 and USB
`interfaces are connectable, is connected to a computer main
`frame via one of these interfaces, can automatically distin
`guish the type of interface via Which the terminal device is
`connected.
`
`[0003] 2. Description of the Related Art
`
`[0004] Keyboards and mice are extensively used for input
`ting data to computers. With such a keyboard or a mouse, an
`interface knoWn as a Personal System/2 (PS/2) is mainly
`used. In recent years, hoWever, in place of PS/2 interfaces,
`different interfaces knoWn as universal serial bus (USB)
`have come to be increasingly used With keyboards, mice or
`other peripheral devices.
`
`[0005] If a PS/2 interface is to be used, it is connected to
`a PS/2 port provided in advance on a computer main frame
`or, if a USB interface is to be used, it is connected to a USB
`port.
`
`[0006] HoWever, in the above-described con?guration, it
`is impossible to use a conventional PS/2 interface-compat
`ible keyboard unit (the terminal device) if a PS/2 port ceases
`to be provided on the computer (the main frame), resulting
`in the inconvenience that a USB interface-compatible key
`board unit has to be neWly purchased. To eliminate this
`inconvenience, there is available a keyboard unit provided
`With both a PS/2 interface and a USB interface. Where such
`a keyboard unit is used, it is necessary to determine on the
`keyboard unit side Whether it is connected to the computer
`main frame via the PS/2 port or via the USB port.
`
`[0007] Although the PS/2 interface and the USB interface
`are entirely different from each other in connector shape and
`data format, they have common features that poWer is
`supplied from the main system to the terminal device and
`that tWo signal lines are used.
`
`[0008] Therefore, even if only a dedicated PS/2 port is
`provided on the terminal side, the use of a conversion cable
`Would enable USB signals to be inputted and outputted via
`a dedicated PS/2 port, and there also is a keyboard unit
`Which realiZes a USB interfacing function by appropriately
`processing signals Within the terminal.
`
`[0009] In this case, hoWever, it is necessary to determine
`on the keyboard unit side Whether a dedicated PS/2 cable or
`a conversion cable is connected to the dedicated PS/2 port.
`
`SUMMARY OF THE INVENTION
`
`[0010] The present invention is intended to solve this
`problem With the prior art, and the object of the present
`invention is to provide an interface distinguishing apparatus
`Which enables both a computer main frame and a terminal
`device to automatically determine Whether a PS/2 interface
`or a USB interface is connected by merely connecting a
`cable betWeen the computer main frame and the terminal
`device.
`
`[0011] According to the invention, there is provided an
`apparatus in Which a terminal permitting data inputting/
`outputting via a ?rst interface and data inputting/outputting
`via a second interface can be connected to both a ?rst port
`for the ?rst interface and a second port for the second
`interface on a main frame side, Wherein:
`
`[0012] both the ?rst interface and the second inter
`face have tWo signal lines each; the ?rst port has a
`circuit Which holds, When the combination of the
`potentials of the tWo signal lines is determined and
`the potential of one of the signal lines is varied, that
`potential; and the second port permits setting of
`diverse combinations of the potentials of the tWo
`signal lines including the combination of potentials
`of the ?rst port and has a circuit Which can return the
`varied potentials of the signal lines to their original
`potentials; and
`
`[0013] there is provided a distinguishing means for
`varying on the terminal side, When a state in Which
`the terminal is connected to either one of the ports or
`a state in Which the poWer supply to the main frame
`is turned on after that connection is recogniZed on
`the terminal side and the potentials of the port are
`recogniZed to be the combination of potentials of the
`?rst interface, the potential of either signal line and
`determining Whether the ?rst port or the second port
`is used on the main frame side according to Whether
`or not the varied potential is held.
`
`[0014] According to the invention, even Where, for
`instance, only a dedicated PS/2 input/output port is provided
`on the terminal side, inputting/outputting of USB standard
`signals is made possible by using a conversion cable, and it
`is possible to determine Whether a PS/2 interface is con
`nected by a dedicated PS/2 cable or a USB interface is
`connected via a conversion cable betWeen the terminal and
`the computer main frame, or Where both a PS/2 port and a
`USB port are provided on the terminal side, it is made
`possible to determine Which interface is connected to Which
`port.
`
`[0015] Further according to the invention, not only in the
`case of connection of a cable but also in the case of
`turning-on of poWer supply, distinction can be carried out, so
`that stable communication can be ensured all the time.
`
`[0016] There is provided on the terminal, for instance, a
`sWitching means for sWitching the potential of either signal
`line to H When a state in Which the potentials of both signal
`lines of the ?rst port are L and the terminal is connected to
`either port or a state in Which poWer supply to the main
`frame is turned on is recogniZed on the terminal side after
`the connection and the potentials of both signal lines of the
`port are recogniZed to be L, and the distinguishing means
`identi?es the ?rst port if the potential of the signal line holds
`H or identi?es the second port if the potential of the signal
`line returns to L.
`
`[0017] It is preferable for the sWitching means in the
`foregoing to be positioned betWeen resistors to pull up one
`of the signal lines and the poWer supply line.
`
`[0018] Where, for instance, the tWo signal lines conform
`to the USB standard, it is necessary on the terminal side to
`pull up either signal line according to the data transfer speed.
`
`LGE-1017 / Page 5 of 10
`
`

`

`US 2001/0016890 A1
`
`Aug. 23, 2001
`
`For this reason, the switching means can be used both as
`means to distinguish one interface from the other and means
`to pull up a USB signal line.
`
`[0019] Thus, of these interfaces, the ?rst is a USB inter
`face With tWo signal lines being a D— signal line and a D+
`signal line, and the second is a PS/2 interface With tWo signal
`lines being a Data signal line and a CLK signal line.
`
`[0020] In this case, Where the main frame connected to the
`terminal is provided With a USB interface, the sWitching
`means resistance-divides the potential of either the D
`signal line or the D+ signal line of the ?rst interface into the
`H level output potential of a differential input signal.
`
`[0021] The computer main frame and the terminal device,
`folloWing the connection of a cable or after the lapse of a
`certain period of time from the turning-on of poWer supply,
`periodically monitor the tWo signal lines (the D— signal line
`and the D+ signal line), and can immediately determine
`connection to the ?rst port (the ?rst interface (PS/2)) unless
`both of the tWo signal lines are at an L level.
`
`[0022] Alternatively, if, after monitoring for a certain
`period of time, the sWitching means is operated after con
`?rming that both of the tWo signal lines are at an L level,
`distinction betWeen the ?rst port and the second port can be
`made Without fail.
`
`[0023] The combination of the potentials of the tWo signal
`lines of the second port for PS/2 use may be L and L, H and
`L or H and H.
`
`[0024] Further, Where the terminal is a device in a loW
`speed mode, it is preferable for the sWitching means to give
`H to the D— signal line, or Where the terminal is a device in
`a high speed, it is preferable for the sWitching means to give
`H to the D+ signal line.
`
`[0025] As described above, it is made possible to select a
`data transfer speed matching the type of the terminal device.
`For instance, for a keyboard or a mouse unit, the data
`transfer speed can be set loW, While the data transfer speed
`can be set high for a terminal device handling a large
`quantity of data, such as a ?oppy disk drive, a scanner unit
`or a digital camera.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0026] FIG. 1 illustrates the con?guration of computer
`main frames and a terminal device.
`
`[0027] FIG. 2 illustrates the con?guration of the interface
`on the computer main frame side.
`
`[0028] FIG. 3 illustrates the circuitry of the interface on
`the terminal device side.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`
`[0029] A preferred embodiment of the present invention
`Will be described in detail beloW With reference to the
`accompanying draWings.
`[0030] FIG. 1 illustrates the con?guration of computer
`main frames and a terminal device. FIG. 2 illustrates the
`con?guration of the interface on the computer main frame
`side. FIG. 3 illustrates the circuitry of the interface on the
`terminal device side.
`
`[0031] As shoWn in FIG. 1, one computer main frame 1 is
`provided With a PS/2 port 1A, While the other computer
`main frame 2 is provided With a USB port 2A. On the
`terminal device 10 side is provided a port 10A. The terminal
`device 10 may be, for eXample, a keyboard unit, a mouse
`unit, a ?oppy disk drive or a scanner unit.
`
`[0032] By connecting a PS/2 cable 21 betWeen the com
`puter main frame 1 and the terminal device 10 and connect
`ing a conversion cable 22 betWeen the computer main frame
`2 and the terminal device 10, communication is made
`possible betWeen them.
`[0033] As shoWn in FIG. 2, the PS/2 port 1A of the
`computer main frame 1 and the port 10A of the terminal
`device 10 are provided With round siX-pin structured con
`nectors 1a and 50, respectively. The pin arrangement is such
`that a ?rst pin is for Data (Data1 signal), a third pin is for the
`ground (GND), a fourth pin is for a source voltage Vcc
`(+5VDC), and a ?fth pin is for a clock (CLK1 signal).
`Second and siXth pins are unoccupied, so that the structure
`has in effect only four pins.
`[0034] On the other hand, the USB port 2A of the com
`puter main frame 2 is provided With a rectangular four-pin
`structured connector 2a. In the pin arrangement, a pair of
`signal terminals D— and D+ and a pair of poWer supply
`terminals Vcc and GND constitute the four-pin structure.
`[0035] The signal levels of Data1 and CLK1 of the PS/2
`are TTL level outputs (0-5 V). The signals D— and D+ of the
`USB are differential signal outputs, Whose signal output
`levels are in a range of an L level output of no more than 0.3
`V and an H level output of 2. 8V to 3.6 V.
`[0036] Incidentally, the communication cable 21 for con
`necting the connector 1a of the computer main frame 1 and
`the connector 50 of the terminal device 10 is provided With
`a PS/2 connector at each of its both ends. On the other hand,
`the conversion cable 22 for connecting the connector 2a of
`the computer main frame 2 and the connector 50 of the
`terminal device 10 has a PS/2 connector at its one end and
`a USB connector at the other end. This cable connects the
`poWer supply terminal Vcc on one side to that on the other
`and the ground terminal GND on one side to the other, the
`Data terminal to the D— terminal and the CLK terminal to
`the D+ terminal.
`[0037] As shoWn in FIG. 2, the computer main frame 1 is
`provided With a communication control means 4 for con
`trolling communication on the basis of a PS/2 protocol as
`instructed by a CPU. The communication control means 4 of
`the computer main frame 1 has a Data input/output section
`4a and a CLK input/output section 4b, and performs input/
`output control of the Data signal and the CLK signal
`betWeen the computer main frame 1 and the terminal device
`10 on the basis of the PS/2 protocol. BetWeen the commu
`nication control means 4 and the connector 1a are provided
`buffer means 7a and 7b. The buffer means 7a is provided on
`a Data line L1 betWeen the Data input/output section 4a of
`the communication control means 4 and the connector 1a.
`The buffer means 7b is provided on a CLK line L2 betWeen
`the CLK input/output section 4b of the communication
`control means 4 and the connector 1a. Both the Data line L1
`and the CLK line L2 are pulled up by pull-up resistors Ra
`and Rb (both 2.2 KQ) relative to the poWer source Vcc.
`[0038] On the other hand, the computer main frame 2 is
`provided With a communication control means 5 for con
`
`LGE-1017 / Page 6 of 10
`
`

`

`US 2001/0016890 A1
`
`Aug. 23, 2001
`
`trolling communication on the basis of a USB protocol as
`instructed by the CPU. The communication control means 5
`has a D— input/output section 5a and a D+ input/output
`section 5b, and performs input/output control betWeen the
`computer main frame 2 and the terminal device 10. BetWeen
`the communication control means 5 and the connector 2a are
`provided buffer means 8a and 8b. The buffer means 8a is
`provided on a D— line I3 connecting the D— input/output
`section 5a of the communication control means 5 and the D
`terminal of the connector 2a. The buffer means 8b is
`provided on a D+ line L4 connecting the D+ input/output
`section 5b and the D+ terminal of the connector 2a. The D
`line L3 and the D+ line L4 are connected to the ground GND
`by pull-doWn resistors Rc and Rd (both 15
`Therefore,
`When the connector 2a is not connected, the D— terminal and
`the D+ terminal are in a high impedance state, and the D
`line L3 and the D+ line L4 are at an L level (GND potential).
`[0039] As shoWn in FIG. 3, on the terminal device 10 side
`are provided the connector 50 and a distinguishing means
`40. The connector 50 is provided With a poWer supply input
`terminal 51, signal input/output terminals 52 and 53, and a
`grounding input terminal 54.
`[0040] The distinguishing means 40 is provided With a
`general control section 41 exercising general control over
`the distinguishing means 40, a sWitching section 42, a PS/2
`controller 43, a USB controller 44, a distinguishing signal
`assigning section 45 and a voltage supplying section 46.
`[0041] The signal input/output terminals 52 and 53 of the
`connector 50 are connected to the sWitching section 42 via
`signal lines L5 and L6, respectively. The sWitching section
`42 is so set as to connect the signal lines L5 and L6 to the
`PS/2 controller 43 side in a default state. When the connector
`50 is connected to the computer main frame 2 via the
`conversion cable 22, ie When the USB interface is used, the
`sWitching section 42 so operates as to sWitch the signal lines
`L5 and L6 over to the USB controller 44 side.
`[0042] The distinguishing signal assigning section 45,
`upon receiving an instruction from the general control
`section 41, sets the output to the L level potential, and the
`voltage supplying section 46, at the instruction of the general
`control section 41, supplies a prescribed voltage (source
`voltage Vcc).
`[0043] Incidentally, the signal lines L5 and L6 are con
`nected to the ground GND via pull-doWn resistors R5 and
`R6 (both 220 KS2) . The poWer supply input terminal 51 is
`connected to a poWer supply line Within the terminal device
`10, and similarly a grounding input terminal 54 is connected
`to a grounding line Within the terminal device 10. PoWer is
`supplied to the terminal device 10 side from the computer
`main frame 1 or 2 via the poWer supply input terminal 51 and
`the grounding input terminal 54 of the connector 50.
`[0044] Further as shoWn in FIG. 3, the distinguishing
`means 40 of the terminal device 10 is provided With a
`sWitching means 60. The sWitching means 60 consists of, for
`instance, a pnp bipolar type transistor Tr1 and a plurality of
`resistors. The collector terminal Tc of the transistor Tr1 is
`connected to, for instance the signal line L5, and the base
`terminal TB is connected to the distinguishing signal assign
`ing section 45. The emitter terminal TE of the transistor Tr1
`is connected to the poWer source Vcc.
`[0045] Further, the output of the voltage supplying section
`46 is connected to the signal lines L5 and L6 via diodes DO1
`
`and D02 and pull-up resistors R3 and R4, respectively. The
`pull-up resistor R1 should preferably be about 7 KS2, and the
`pull-up resistor R3 and R4, both 2.2 KQ.
`
`[0046] The operation of the interface distinguishing appa
`ratus con?gured above Will be described beloW.
`
`[0047] (1) Where no cable is connected:
`
`[0048] First, Where there is no connection betWeen the
`terminal device 10 and the computer main frame 1 or the
`computer main frame 2, the folloWing state Will prevail.
`
`[0049] To denote the states of the Data line L1 and the
`CLK line L2 of the PS/2 port 1A of the computer main frame
`1 by Q1 (Data1, CLK1), Q1 (Data1, CLK1) can be set in one
`of three Ways (H, H), (L, L) and (H, L) depending on hoW
`the computer is started up, Where H represents an H level
`output and L, an L level output.
`
`[0050] To denote the states of the D— line L3 and the D+
`line L4 of the USB port 2A of the computer main frame 2
`by Q2 (D—, D+), Q2 (D—, D+)= (L, L).
`[0051] On the other hand, to denote the states of the I/O
`sections 42a and 42b of the sWitching section 42 of the
`terminal device 10 (the states of the signal lines L5 and L6)
`by Q3 (D1, D2), the states of the both the I/O sections 42a
`and 42b are inde?nite (Q3 (D1, D2)= inde?nite) because no
`poWer from the computer main frame 1 or 2 is supplied to
`the terminal device 10 side.
`
`[0052] The computer main frame 1 monitors the states of
`the Data line L1 and the CLK line L2 (Q1 (Data1, CLK1)),
`the computer main frame 2 monitors those of the D— line I3
`and the D+ line L4 (Q2 (D—, D+)), and the terminal device
`10 monitors those of the I/O sections 42a and 42b (Q3 (D1,
`D2)).
`[0053] These states can be put in order as shoWn in Table
`1 beloW.
`
`TABLE 1
`
`Q2
`(D—, D+)
`(L, L)
`
`Q3
`(D1, D2)
`Inde?nite
`
`Q1
`(Data 1, CLKl)
`(H H)
`(H, L)
`(L, L)
`
`[0054] (2) Where the PS/2 communication cable 21 is
`connected:
`
`[0055] Next, When the connector la of the computer main
`frame 1 and the connector 50 of the terminal device 10 are
`connected by the PS/2 cable 21, the Data line L1 on the
`computer main frame 1 side and the signal line L5 on the
`terminal device 10 are connected, and so are the CLK line
`L2 on the computer main frame 1 side and the signal line L6
`on the terminal device 10 side. Thus the Data input/output
`section 4a and the CLK input/output section 4b of the
`communication control means 4 on the computer main
`frame 1 side and the I/O sections 42a and 42b of the
`sWitching section 42 on the terminal device 10 side are
`connected, respectively.
`[0056] As a result, the state Q1 (Data1, CLK1) of the Data
`line L1 and the CLK line L2 of the computer main frame 1
`
`LGE-1017 / Page 7 of 10
`
`

`

`US 2001/0016890 A1
`
`Aug. 23, 2001
`
`and the state Q3 (D1, D2) of the signal lines L5 and L6 on
`the terminal device 10 side are set to be identical (Q1 (Data1,
`CLK1)= o3 (D1, D2)).
`[0057] Incidentally, Whereas the state described above
`refers to the state in Which the PS/2 cable 21 is connected
`betWeen the connector 1a on the computer main frame 1 side
`to Which poWer supply is already on and the connector 50 on
`the terminal device 10 side, the state immediately after the
`turning-on of poWer supply to the computer main frame 1 to
`Which the cable 21 is already connected is the same.
`
`[0058] Therefore the states immediately after connection
`by the PS/2 communication cable 21 can be put in order as
`shoWn in Table 2 beloW. As the computer main frame 2 side
`is not yet connected, Q2 (D1, D2) does not vary.
`
`Q1
`(Datal, GHQ)
`(H, H)
`(H, L)
`(L, L)
`
`TABLE 2
`
`Q2
`(13-, D+)
`(L, L)
`
`Q3
`(D1, D2)
`(PL H)
`(H, L)
`(L, L)
`
`[0059] (3) Where the USB conversion cable 22 is con
`nected
`
`[0060] When, from the state of (1) above in Which no
`cable is connected, the connector 2a on the computer main
`frame 2 side and the connector 50 on the terminal device 10
`side are connected by the conversion cable 22, the poWer
`source Vcc and the ground GND are connected to their
`respective counterparts. The D— line L3 and the D+ line L4
`on the computer main frame 2 side and the signal lines L5
`and L6 on the terminal device 10 side are respectively
`connected. As a result, the state Q2 (D—, D+) of the D— line
`L3 and the D+ line L4 on the computer main frame 2 side
`and the state Q3 (D1, D2) of the signal lines L5 and L6 of
`the distinguishing means 40 on the terminal device 10 side
`are set to be identical (Q2 (D—, D+ )= Q3 (D1, D2)).
`
`[0061] In this state, the D— line L3 (signal line L5) is
`connected to the ground GND by the parallel resistor of the
`pull-up resistor Rc and pull-up resistor R5, and so is the D+
`line L4 (signal line L6) by the parallel resistor of the pull-up
`resistor Rd and pull-up resistor R6. As a result, both the state
`Q2 (D—, D+) and the state Q3 (D1, D2) become identical to
`Q1 (D—, D+)= Q3 (D1, D2)= (L, L).
`[0062] Further as the PS/2 port of the computer main
`frame 1 is not yet connected, the state Q1 (Data1, CLK1) of
`the Data line L1 and the CLK line L2 is equal to (H, H) or
`(H, L) or (L, L).
`
`[0063] These states are shoWn in Table 3.
`
`TABLE 3
`
`Q2
`(D—, D+)
`(L, L)
`
`Q3
`(D1, D2)
`(L, L)
`
`Q1
`(Datal, CLKl)
`(H, H)
`(H, L)
`(L, L)
`
`[0064] (4) Interface distinguishing action
`[0065] When the cable 21 is connected from the uncon
`nected state, the states Q1 (Data1, CLK1) and Q3 (D1, D2)
`are set to Q1 (Data1, CLK1)= Q3 (D1, D2)= (H, H) or (H,
`L) or (L, L) as shoWn in Table 1 or Table 2 above.
`[0066] On the other hand, When the conversion cable 22 is
`connected from the unconnected state, the states of the I/O
`sections 42a and 42b of the sWitching section 42 on the
`terminal device 10 side are alWays Q3 (D1, D2)= (L, L), but
`there is no case of Q3 (D1, D2)= (H, H) or (H, L).
`[0067] Therefore, if immediately after the communication
`cable 21 or the conversion cable 22 is connected betWeen
`either computer main frame and the terminal device 10, the
`state Q3 (D1, D2)= (H, H) or (H, L) is detected on the
`terminal device 10 side, and it can be immediately deter
`mined that the terminal device 10 is connected by the
`communication cable 21 to the PS/2 port 1A of the computer
`main frame 1.
`[0068] Incidentally, the foregoing also holds true of a case
`in Which the source voltage is actuated from a state Wherein
`the communication cable 21 is already connected, and
`poWer is supplied to the terminal device 10 side to start
`periodic monitoring by the general control section 41 on the
`terminal device 10 side.
`[0069] Then, When the computer main frame 2 and the
`terminal device 10 are connected by the conversion cable 22
`as shoWn in Table 3, the state Q2 (D—, D+) of the computer
`main frame 2 and the state Q3 (D1, D2) of the terminal
`device become identical: Q2 (D—, D+)= Q3 (D1, D2)= (L,
`L). Also in a state Wherein the computer main frame 1 and
`the terminal device 10 are connected as shoWn in Table 2,
`Q3 (D1, D2)= (L, L) may hold true. Therefore, When Q3
`(D1, D2)= (L, L) is detected on the terminal device 10 side,
`it is impossible to determine Whether the PS/2 cable 21 is
`connected or the conversion cable 22 for USB use is
`connected. Therefore in this case, distinguishing is accom
`plished in the folloWing manner.
`[0070] The distinguishing means 40 on the terminal device
`10 side supplies from its distinguishing signal assigning
`section 45 a stepWise L level signal after the lapse of a
`prescribed length of time (eg 100 msec) from the connec
`tion of a cable, and turns on the sWitching means 60. This
`causes a current to flow from the poWer source Vcc to the
`signal line L5 to place this signal line L5 in a pulled-up state.
`Incidentally, the use of a USB interface means that a
`stepWise H level signal is given as the D— signal substan
`tially on the USB protocol.
`[0071] If the USB conversion cable 22 is connected in this
`case, the signal line L5 is set to a voltage level of about 3.3
`V. The voltage level of the signal line L5 is determined by
`the resistance-voltage division ratio betWeen the parallel
`pull-doWn resistor Rc and pull-doWn resistor R5 on the one
`hand and the pull-up resistor R1 on the other, and since the
`resistance-voltage division ratio in the above-cited case
`(Rc= 15 KS2, R1=7 KQ, R5=220 K9) is about Z/3, the
`voltage level of the signal line L5 is about 3.3 V When the
`source voltage Vcc is 5V (TTL level) . Incidentally, the
`voltage level of this signal line L5 is Within the range of the
`H level output (2.8 V to 3.6 V) on the USB protocol, and
`detection of this H level output by the computer main frame
`2 and the terminal device 10 makes it possible to determine
`the connected cable to be the conversion cable 22. This
`
`LGE-1017 / Page 8 of 10
`
`

`

`US 2001/0016890 A1
`
`Aug. 23, 2001
`
`enables the terminal device 10 to judge that connection to
`the port 2A of the computer main frame 2 has been accom
`plished by means of the USB interface.
`
`[0072] On the other hand, if after the signal line L5 is
`pulled up by the sWitching means 60 the voltage level of the
`signal line L5 is held at the L level of the ground GND
`potential (=0 V), the terminal device 10 is determined to be
`connected to the PS/2 port 1A on the computer main frame
`1 side via the PS/2 communication cable 21.
`
`[0073] Thus, as the Data line L1 on the computer main
`frame 1 side and the signal line L5 on the terminal device 10
`side are connected When the connected cable is the com
`munication cable 21, the voltage level (potential) of the
`signal line L5 (Data line L1) is determined by the resistance
`voltage division ratio betWeen the parallel pull-up resistor
`Ra and pull-up resistor R1 on the one hand and the pull
`doWn resistor R5 on the other. HoWever, since the Data line
`L1 is pulled to the L level in the state of Q1 (Data1, CLK1)=
`Q3 (D1, D2)= (L, L), the state of Q1 (Data1, CLK1)= Q3
`(D1, D3)= (L, L) is maintained.
`[0074] Once the PS/2 interface is distinguished by the
`above-described procedure, the general control section 41 of
`the distinguishing means 40 inverts the output of the dis
`tinguishing signal assigning section 45 to an H level output
`to turn off the sWitching means 60. Further, a voltage of 5 V
`corresponding to the poWer source voltage Vcc is supplied
`from the voltage supplying section 46, and the signal lines
`L5 and L6 are pulled up by the pull-up resistors R3 and R4.
`The communication in conformity With the PS/2 protocol is
`started via the PS/2 controller 43.
`[0075] If the above-described procedure distinguishes the
`USB interface, the output of the distinguishing signal
`assigning section 45 is maintained at the L level, and the
`state in Which the signal line L5 (D—) is pulled up is
`maintained. Then the general control section 41 of the
`distinguishing means 40 on the terminal device 10 side
`sWitches over the sWitching section 42 to select the USB
`controller 44, thereby enabling communication based on the
`USB protocol to take place betWeen the computer main
`frame 2 and the terminal device 1.
`
`[0076] In the above-described embodiment of the inven
`tion, as the signal line D— on the USB protocol is pulled up,
`the data transfer speed is set in a loW speed mode of 1.5
`Mbits/s, Which matches a keyboard unit or a mouse unit.
`
`[0077] On the other hand, by pulling up the D+ signal line
`L6 side instead of pulling up the D— line L5, the data transfer
`speed can be set to a high speed mode of 12 Mbits/s, Which
`matches a ?oppy disk drive or a scanner unit.
`
`[0078] Although connection to the PS/2 interface or the
`USB interface on the main frame side is accomplished via
`one port 10A of the terminal device 10 in the above
`described embodiment, the con?guration may as Well be
`such that both a PS/2 interface and a USB interface port are
`provided on the terminal device 10 side, and can be sWitched
`betWeen each other With a sWitching section provided Within
`the distinguishing means 40.
`
`[0079] According to the present invention hitherto
`described in detail, it is possible to determine Whether a PS/2
`interface or a USB interface is connected by merely con
`necting a terminal device to the computer main frame.
`
`[0080] Furthermore, signal lines can be pulled up to a
`prescribed voltage level matching each interface protocol.
`
`[0081] Where a USB interface is used, the data transfer
`speed can be set in a mode matching the given terminal
`device.
`
`What is claimed is:
`1. An interface distinguishing apparatus in Which a ter
`minal permitting data inputting/outputting via a ?rst inter
`face and data inputting/outputting via a second interface can
`be connected to both a ?rst port for the ?rst interface and a
`second port for the second interface on a main frame side,
`Wherein:
`
`both the ?rst interface and the second interface have tWo
`signal lines each; the ?rst port has a circuit Which holds,
`When the combination of the potentials of the tWo
`signal lines is determined and the potential of one of the
`signal lines is varied, that potential; and the second port
`permits setting of diverse combinations of the poten
`tials of the tWo signal lines including the combination
`of potentials of the ?rst port and has a circuit Which can
`return the varied potentials of the signal lines to their
`original potentials; and
`
`there is provided a distinguishing means for varying on
`the terminal side, When a state in Which the terminal is
`connected to either one of the ports or a state in Which
`the poWer supply to the main frame is turned on after
`the connection is recogniZed on the terminal side and
`the potentials of the port are recogniZed to be the
`combination of potentials of the ?rst interface, the
`potential of either signal line and determining Whether
`the ?rst port or the second port is used on the main
`frame side according to Whether or not this varied
`potential is held.
`2. The interface distinguishing apparatus according to
`claim 1, Wherein a sWitching means for sWitching the
`potential of either signal line to H When a state in Which the
`potentials of both signal lines of the ?rst port are L and the
`terminal is connected to either port or a state in Which poWer
`supply to the main frame is turned