IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`HUAWEI DEVICE CO., LTD.
`Petitioner,
`
`v.
`
`FUNDAMENTAL INNOVATION SYSTEMS INTERNATIONAL LLC
`Patent Owner.
`
`Case No. To Be Assigned
`Patent No. 7,834,586
`
`PETITION FOR INTER PARTES REVIEW OF U.S. PATENT NO. 7,834,586
`UNDER 35 U.S.C. §§ 311-319 AND 37 C.F.R. § 42.100 et seq.
`
`

`

`LIST OF EXHIBITS
`
`
`Exhibit Description
`Ex. 1001 U.S. Patent No. 7,834,586
`Ex. 1002 File History for U.S. Patent No. 7,834,586 B2
`Ex. 1003 U.S. Provisional Application 60/273,021
`Ex. 1004 U.S. Provisional Application 60/330,486
`Ex. 1005 Declaration of Dr. John Levy in Support of the
`Petition for Inter Partes Review of U.S. Patent
`7,834,586
`Ex. 1006 U.S. Patent 5,859,522
`Ex. 1007 Universal Serial Bus Specification, Revision 2.0,
`April 27, 2000
`Ex. 1008 U.S. Patent 5,959,601
`Ex. 1009 U.S. Patent 6,625,738
`Ex. 1010 U.S. Patent 7,360,004
`Ex. 1011 Universal Serial Bus Specification, Revision 1.1,
`September 23, 1998
`Ex. 1012 U.S. Patent Application Publication
`2003/0135766
`Ex. 1013 U.S. Patent 6,625,790
`Ex. 1014 Cypress CY7C63722/23 CY7C63742/43
`enCoRe™ USB Combination Low-Speed USB
`& PS/2 Peripheral Controller (Cypress enCoRe
`or Cypress Datasheet), by Cypress
`Semiconductor Corporation, published May 25,
`2000
`Ex. 1015 U.S. Patent 6,531,845
`Ex. 1016 U.S. Patent 6,353,334
`Ex. 1017 U.S. Patent 6,178,514
`Ex. 1018 U.S. Patent 5,884,086
`Ex. 1019 U.S. Patent 6,556,564
`Ex. 1020 U.S. Patent 6,936,936
`Ex. 1021 Prosecution History of U.S. Patent 6,936,936
`Ex. 1022 USB 2.0 Documents Index,
`http://www.usb.org/developers/docs/usb20_docs/
`Ex. 1023 P.R. 4-3 Joint Claim Construction and
`Prehearing Statement, Ex. A1, Fundamental
`Innovation Systems Int’l LLC v. LG Electronics,
`
`- i -
`
`
`
`Short Name
`’586 patent
`’586 file history
`’021 provisional
`’486 provisional
`Levy
`
`Theobald
`USB 2.0
`
`’601 patent
`Shiga
`Dougherty
`USB 1.1
`
`Zyskowski
`
`Casebolt
`Cypress datasheet
`
`Kerai
`’334 patent
`Wood
`Amoni
`Rogers
`’936 patent
`’936 file history
`USB Doc
`
`JCC, Ex. A1
`
`

`

`
`
`Exhibit Description
`Inc., 2:16-cv-01425-JRG-RSP (E.D. Tex. Dec.
`29, 2017) (Dkt. 103-1)
`Ex. 1024 Patent Owner’s P.R. 4-2 Preliminary Claim
`Constructions and Extrinsic Evidence, served by
`Patent Owner on Dec. 13, 2017 in connection
`with Fundamental Innovation Systems Int’l LLC
`v. LG Electronics, Inc., 2:16-cv-01425-JRG-RSP
`(E.D. Tex.)
`Ex. 1025 TIA/EIA-644 Electrical Characteristics of Low
`Voltage Differential Signaling (LVDS) Interface
`Circuits
`Ex. 1026 U.S. Patent 6,366,128
`Ex. 1027 File History for U.S. Patent 6,366,128
`Ex. 1028 Curriculum vitae of Dr. John Levy
`
`
`
`Short Name
`
`P.R. 4-2
`
`TIA/EIA-644
`
`’128 patent
`’128 file history
`Levy CV
`
`
`
`- ii -
`
`

`

`
`
`TABLE OF CONTENTS
`I. Mandatory Notices (37 C.F.R. § 42.8) ............................................................... 4
`A.
`Real Parties-in-Interest (§ 42.8(B)(1)) ..................................................... 4
`B.
`Related Matters (§ 42.8(B)(2)) ................................................................. 4
`C.
`Counsel Information (§ 42.8(B)(3)) ......................................................... 4
`II.
`Fees (§ 42.15(A)) ................................................................................................ 5
`III. Grounds for Standing (§ 42.104(A)) ................................................................... 5
`IV. Summary of Challenge ........................................................................................ 5
`V. Overview of the ’586 Patent ............................................................................... 6
`A.
`Prosecution History .................................................................................. 7
`B.
`Priority Date .............................................................................................. 8
`VI. Person of Ordinary Skill in the Art ..................................................................... 8
`VII. Summary of the Prior Art .................................................................................... 9
`A.
`Background and History of USB Technology ......................................... 9
`B.
`USB 2.0 (Ex. 1007) .................................................................................. 9
`C. Use of SE1 State in Various Contexts .................................................... 13
`1.
`Shiga (Ex 1009) ........................................................................... 13
`2.
`Zyskowski (Ex. 1012) .................................................................. 14
`3.
`Casebolt (Ex. 1013) ..................................................................... 15
`4.
`Cypress Semiconductor ............................................................... 16
`5.
`Kerai (Ex. 1015) ........................................................................... 16
`Theobald (Ex. 1006) ............................................................................... 17
`Dougherty (Ex. 1010) ............................................................................. 21
`
`D.
`E.
`
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`

`

`
`
`1.
`“charged battery scenario” ........................................................... 24
`2.
`“dead battery scenario” ................................................................ 25
`F.
`TIA/EIA-644 (Ex. 1025) ........................................................................ 26
`VIII. Claim Construction (§ 42.104(B)(3)) ............................................................... 27
`A.
`“USB enumeration” (claims 1 and 8)..................................................... 27
`B.
`Preambles ................................................................................................ 28
`IX. Application of the Prior Art to the Challenged Claims .................................... 30
`A. Ground 1: Theobald, USB 2.0, and Shiga, in Combination,
`Renders Obvious Claims 1-3 and 8-13 .................................................. 30
`1.
`Application of the Combination of Theobald, USB 2.0, and Shiga
`to Claims 1-3 and 8-13................................................................. 31
`2.
`The Theobald/USB 2.0/Shiga Combination ............................... 43
`Ground 2: Dougherty and Shiga, in Combination, Renders
`Obvious Claims 1-2, 8-9, and 11-12 ...................................................... 50
`1.
`Application of the Combination of Dougherty and Shiga to
`Claims 1-2, 8-9, and 11-12 .......................................................... 51
`2.
`The Dougherty/Shiga Combination............................................. 59
`C. Ground 3: Dougherty, Shiga, and TIA/EIA-644 in Combination,
`Renders Obvious Claims 3, 10, and 13 .................................................. 64
`1.
`The Combination of Dougherty, Shiga, and TIA/EIA-644 and its
`Application to Claims 3, 10, and 13 ............................................ 64
`Conclusion ......................................................................................................... 67
`
`B.
`
`X.
`
`- iv -
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`

`

`TABLE OF AUTHORITIES
`
`
`
`Page(s)
`
`Cases
`Cuozzo Speed Techs., LLC v. Lee,
`136 S. Ct. 2131 (2016) ........................................................................................ 27
`KSR Int’l Co. v. Teleflex Inc.,
`550 U.S. 398 (2007) .....................................................................................passim
`Torrent Pharms. Ltd. v. Novartis AG & Mitsubishi Pharma Corp.,
`IPR2014-00784, Final Written Decision, (P.T.A.B. Sept. 24, 2015) ................. 29
`Toyota Motor Corp. v. Blitzsafe Texas, LLC
`IPR2016-00422, Institution Decision (P.T.A.B. July 6, 2016) .......................... 29
`In re Translogic Tech., Inc.,
`504 F.3d 1249 (Fed. Cir. 2007) .......................................................................... 27
`Statutes
`35 U.S.C. § 103 .......................................................................................................... 6
`35 U.S.C. § 325 .................................................................................................. 30, 31
`Other Authorities
`37 C.F.R. § 42.100 ................................................................................................... 27
`
`
`
`
`- v -
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`

`

`
`
`Huawei Device Co., Ltd. (“Petitioner”) requests inter partes review (“IPR”) of
`
`claims 1–3 and 8–13 of U.S. Patent No. 7,834,586 (“’586 patent”) (Ex. 1001). As
`
`explained below, there is a reasonable likelihood that Petitioner will prevail on at least
`
`one claim challenged in this petition.
`
`The alleged invention of the ’586 patent consists principally of a mobile device
`
`that both (i) charges its battery via the power line of an industry-standard Universal
`
`Serial Bus (“USB”) connection, and (ii) detects a non-standard signal on the data lines
`
`of that connection, where the signal indicates the availability of power to the mobile
`
`device. These concepts were known in the art prior to the ’586 patent’s claimed
`
`priority date of March 1, 2001.
`
`The connector. Industry leaders widely adopted USB after it was released in
`
`1998. Its technical attributes were well-known by 2001. The USB connector, like the
`
`predecessor “J3” accessory connector, consists of a power connection and a data
`
`connection. The power connection consists of a VBUS line and a ground line, “GND.”
`
`The data connection consists of two lines, D+ and D- , which are used for signaling.
`
`The power limit. Soon after USB debuted, practitioners recognized that the
`
`USB standard interface was of limited utility because it imposed a strict current draw
`
`limit of 500 mA on devices connected to a USB hub or host. This limit posed problems
`
`in many contexts requiring more power. For example, Amoni indicates that:
`
`One problem with the universal serial bus is that it provides only one voltage.
`Devices that operate at different voltages or have high power requirements are
`
`- 1 -
`
`

`

`
`
`required to supply their own voltage sources and power sources. In some
`environments, for instance, the retail point-of-sale environment, this additional
`cabling for power creates a non-aesthetic appearance at the store front.
`
`
`Amoni (Ex. 1018), 2:19-26.
`
`
`
`Similarly, in the context of a USB speakerphone system, Rogers discloses that:
`
`One difficulty with the existing USB is that it has only a limited capability to
`provide power to a connected device. As it is generally known, USB has two
`wires in the cable, which supply 5 VDC. Current is limited to 0.5 Amp.
`Additionally, any given device can only use 0.1 Amp. USB allows devices to
`be chained, so all chained devices must share the same power. This means that
`the maximum power available is 2.5 Watts, with 0.5 Watt for each device.
`This is too little for many potential devices.
`
`Rogers (Ex. 1019), 10:67-11:2-8.
`
`
`Practitioners overcame the limit and created systems in which a device
`
`connected through USB to a second device drew power from the latter in excess of the
`
`500 mA standard. For example, Amoni discloses that two devices connected through
`
`USB could negotiate the amount of current to be drawn by one of the devices from the
`
`other, and that through such negotiation, the one device could draw more than 3
`
`Amperes of current from the other. Amoni, 7:16-26. Similarly, Dougherty discloses
`
`that a mobile computer connected to a docking station through USB could charge its
`
`battery by drawing up to 2.5 Amperes of current “across the USB connectors.”
`
`Dougherty (Ex. 1010), 7:49-53.
`
`Non-standard signaling. Drawing this amount of current from a device through
`
`USB connectors was not compliant with the USB specification because it was over the
`
`- 2 -
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`

`

`
`
`USB standard limit. Accordingly, it was apparent that the devices needed to signal one
`
`another regarding their intention or capability to make such a current draw. See, e.g.,
`
`Dougherty, 5:53-6:3; Amoni, 6:33-7:26. There was also a need for the signal to not be
`
`confused with standard USB data transfer.
`
`The technique of signaling non-USB compliant features when two devices are
`
`connected by a USB connector was well known before 2001. A simple signaling
`
`mechanism to achieve that purpose is suggested by the USB 2.0 Specification itself.
`
`USB 2.0 indicates that the Single Ended (SE)1 signal (i.e., when both the D+ and D-
`
`data lines are at a high voltage level) must never be intentionally generated within
`
`USB. E.g., USB 2.0, 123, 148 (citations to USB 2.0 refer to native numbers, not
`
`stamped numbers). This SE1 signal, which was not used by the USB standard, was
`
`described for the very purpose of signaling a non-USB compliant feature when two
`
`devices were connected through a USB connector. E.g., Shiga (Ex. 1009), 6:34-58
`
`(disclosing use of “fourth-mode” signaling, in which both D+ and D- are set high, for
`
`waking up a computer that is in a sleep mode); Zyskowski (Ex. 1012), ¶ 19 (disclosing
`
`use of D+ and D- set to high levels to signal a full power state of the host device);
`
`Casebolt (Ex. 1013), 7:30-46 (disclosing use of SE1 to signal the connected device that
`
`a PS/2 interface is being used instead of USB interface).
`
`Taken together, the prior art renders obvious the alleged invention of the ’586
`
`patent. As of 2001, it would have been obvious to implement a mobile device that
`
`- 3 -
`
`

`

`
`
`charged its battery with more than 500 mA of current drawn over the power line of the
`
`industry-standard USB connector. Furthermore, it would have been obvious to
`
`communicate the availability of this non-standard current through the use of non-
`
`standard SE1 signaling. Such a combination would be a “predictable use of prior art
`
`elements according to their established functions.” KSR Int’l Co. v. Teleflex Inc., 550
`
`U.S. 398, 401 (2007).
`
`I. MANDATORY NOTICES (37 C.F.R. § 42.8)
`A. Real Parties-in-Interest (§ 42.8(B)(1))
`Huawei Device Co., Ltd., Huawei Technologies Co., Ltd., Huawei Device USA
`
`Inc., Huawei Investment & Holding Co., Ltd., Huawei Device (Dongguan) Co., Ltd.,
`
`Huawei Tech. Investment Co., Ltd., and Huawei Device (Hong Kong) Co., Ltd. are
`
`the real parties-in-interest.
`
`B. Related Matters (§ 42.8(B)(2))
`The ’586 patent is the subject of Civil Action Nos. 2:17-cv-00145-JRG,
`
`2:16-cv-01424-JRG-RSP, and 2:16-cv-01425-JRG-RSP (the “Litigation”), pending
`
`in the U.S. District Court for the Eastern District of Texas, and Civil Action No.
`
`3:17-cv-01827-N, pending in the U.S. District Court for the Northern District of
`
`Texas. Petitioner is unaware of any other pending matter that would affect, or by
`
`affected by, a decision in this proceeding.
`
`C. Counsel Information (§ 42.8(B)(3))
`Petitioner designates as lead counsel David A. Garr (Reg. No. 74,932,
`
`- 4 -
`
`

`

`
`
`dgarr@cov.com) of Covington & Burling LLP, One CityCenter, 850 Tenth Street,
`
`NW, Washington, DC 20001 (postal and hand delivery), telephone: 202-662-6000,
`
`facsimile: 202-662-6291. Back-up counsel is Anupam Sharma (Reg. No. 55,609,
`
`asharma@cov.com) of Covington & Burling LLP, 333 Twin Dolphin Dr # 700,
`
`Redwood City, CA 94065, telephone: 650-632-4700. Petitioner consents to electronic
`
`service by email provided in the designation of counsel above, as well as in the
`
`signature block of this petition.
`
`II.
`
`FEES (§ 42.15(A))
`The Office is authorized to charge the filing fee and, as well as any other
`
`necessary fees that might be due in connection with this Petition, to Deposit Account
`
`No. 50-0740 for the fees set forth in 37 C.F.R. § 42.15(a).
`
`III. GROUNDS FOR STANDING (§ 42.104(A))
`Petitioner certifies that the ’586 patent is available for IPR and that Petitioner is
`
`not barred or estopped from requesting an IPR challenging the ’586 patent on the
`
`grounds identified in this petition.
`
`IV. SUMMARY OF CHALLENGE
`Petitioner requests that the Board review and cancel claims 1–3 and 8–13 (the
`
`“challenged claims”) of the ’586 patent based on the following grounds.
`
`- 5 -
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`

`

`Ground Claims
`1
`1-3, 8-13
`
`2
`
`3
`
`1-2, 8-9, 11-
`12
`3, 10, 13
`
`
`
`References
`Basis
`pre-AIA 35 U.S.C. § 103(a)1 Theobald, USB 2.0,
`and Shiga
`pre-AIA 35 U.S.C. § 103(a) Dougherty and Shiga
`
`pre-AIA 35 U.S.C. § 103(a) Dougherty, Shiga, and
`TIA/EIA-644
`
`
`V. OVERVIEW OF THE ’586 PATENT
`The ’586 patent is entitled “Multifunctional Charger System and Method” and
`
`claims priority to provisional applications filed in March and October 2001. All of its
`
`independent claims recite in the preamble a “mobile device configurable for use in a
`
`wireless telecommunications network.” The patent describes “a powering system for
`
`a mobile device having a USB connector.” ’586 patent, 2:66-67. The powering system
`
`“is operable to receive energy through the USB connector and to distribute the energy
`
`to at least one component in the mobile device.” Id., 3:1-4. The energy is received
`
`“via the Vbus and Gnd pins of the primary USB connector 102,” id., 7:33-35, and the
`
`energy can be used “to provide power to the mobile device 10, charge the battery 60,
`
`or both,” id., 7:62-63.
`
`The ’586 patent also discloses a mobile device that can draw power over its
`
`
`1 Because the application for the ’586 patent was filed prior to March 16, 2013, the
`
`pre-AIA conditions for patentability apply. Citations to the applicable statutes refer
`
`to the pre-AIA versions.
`
`- 6 -
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`

`

`
`
`connector “without regard to the USB specification,” which ordinarily “limits the
`
`electrical current that can flow across the USB.” Id., 8:3-14. The mobile device
`
`recognizes an “identification signal” transmitted by a power source to which the
`
`mobile device is connected. Id., 8:64. The mobile device uses this signal to identify
`
`the power source as one that is “not subject to the power limits imposed by the USB
`
`specification.” Id., 8:62-67. The USB 2.0 Specification, which was published in 2000,
`
`specifies that a device may consume “up to five unit loads,” where a unit load is 100
`
`mA. Ex. 1007, 171, 178, 245 (citations to USB 2.0 refer to native numbers, not
`
`stamped numbers). Thus, as of 2001, a POSITA would understand that USB 2.0
`
`imposed a current draw limit of 500 mA. Declaration of Dr. John Levy (Ex. 1005),
`
`¶38
`
`Finally, both claims 1 and 8 of the ’586 patent recite that the mobile device
`
`detects an identification signal over the USB data lines, “the identification signal being
`
`different than USB enumeration.” As explained below, “enumeration” is a device
`
`handshaking process specified in the USB standard.
`
`Prosecution History
`A.
`The ’586 patent issued on November 16, 2010 from U.S. Patent Application No.
`
`12/714,204 (“the ’204 application”), filed on February 26, 2010. In the office action
`
`dated August 5, 2010, the Examiner rejected claims 1-13 on the ground of nonstatutory
`
`obviousness-type double patenting as being unpatentable over the claims of U.S. patent
`
`- 7 -
`
`

`

`
`
`no. 7,737,657. Ex. 1002, 41-45. The applicants in the response dated August 20, 2010
`
`filed a terminal disclaimer with respect to U.S. patent no. 7,737,657. Id., 27-35. This
`
`terminal disclaimer was approved on August 27, 2010. Id., 26. Notices of Allowances
`
`and Allowability issued on September 7, 2010. Id., 16-19. There were no examiner’s
`
`Reasons for Allowance.
`
`Priority Date
`B.
`The ’586 patent claims priority through a series of continuations to two
`
`provisional applications: (1) the ’021 provisional (Ex. 1003), filed March 1, 2001; and
`
`(2) the ’486 provisional (Ex. 1004), filed October 23, 2001. Thus, the earliest potential
`
`priority date is March 1, 2001.
`
`VI. PERSON OF ORDINARY SKILL IN THE ART
`The person of ordinary skill in the art (“POSITA”) of the subject matter of the
`
`’586 patent would have had either (i) a bachelor’s degree in electrical engineering,
`
`computer science, or a related field, plus 2-4 years of experience in design of systems
`
`with Universal Serial Bus (“USB”) or equivalent buses, or (ii) a master’s degree in
`
`electrical engineering, computer science, or a related field, plus 1-2 years of
`
`experience in design of systems with USB or equivalent buses at the time of the ’586
`
`patent’s priority date. Along with this petition, Petitioner submits the declaration of
`
`John Levy, who has been a POSITA since at least the ’586 patent’s claimed priority
`
`date. Levy, ¶¶22-24.
`
`- 8 -
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`

`

`
`
`VII. SUMMARY OF THE PRIOR ART
`All of the elements of the challenged claims were already well-known in the
`
`art before the claimed priority date of the ’586 patent. Id., ¶48. There is nothing
`
`novel or non-obvious about the alleged invention of the challenged claims. Id.
`
`A. Background and History of USB Technology
`As of March 1, 2001, a POSITA would have been familiar with USB
`
`Implementers Forum, Inc. (“USB-IF”), which consists of representatives of industry
`
`leading companies that have been and continue to be responsible for the development,
`
`adoption, and advancement of USB technology since 1995. Levy, ¶¶49-52. Similarly,
`
`a POSITA would have had access to and been familiar with the USB Specification in
`
`its various revisions, including Revision 1.1 (“USB 1.1”) (Ex. 1011), which was first
`
`released on September 23, 1998, and Revision 2.0 (“USB 2.0”) (Ex. 1007), which was
`
`released on April 27, 2000. Id.; see Ex. 1022.
`
`USB-IF continued to improve upon USB technology and continues to do so
`
`even today. Levy, ¶52. For example, the USB 2.0 Documents Index of the USB 2.0
`
`web page (Ex. 1022) lists 36 available documents, including the original USB 2.0
`
`Specification, representing evolution and modifications of USB 2.0 from April 27,
`
`2000 through February 2, 2017. Id.
`
`B. USB 2.0 (Ex. 1007)
`USB 2.0 was published on April 27, 2000 and bears a copyright date of 2000,
`
`and was disseminated and available to POSITAs in the USB technology field. Levy,
`
`- 9 -
`
`

`

`
`
`¶53. Thus, USB 2.0 is prior art to the ’586 patent under at least pre-AIA §102(a).
`
`USB 2.0 describes an architecture in which a USB host is connected to one or
`
`more USB devices through USB connectors and USB cables. USB 2.0, 15-18; Levy,
`
`¶53. A USB host includes a USB controller, and a USB device may be a hub (that
`
`provides additional USB connections to other USB devices) or a function (that
`
`provides a capability to a host, e.g., a keyboard or mouse). Id. In general, the USB
`
`cable has four wires: a VBUS line and GND (ground) line that provide power, and
`
`D+ and D- lines that carry signals for communication, as shown in Figure 4-2 from
`
`USB 2.0 below. USB 2.0, 17-18, 85-89; Levy, ¶53. Each USB connector has
`
`corresponding pins that each connect to the corresponding line in a USB cable. Id.
`
`
`USB 2.0 also describes how a USB host configures a USB device when they
`
`are connected. Levy, ¶54. For example, USB 2.0 states that “[w]hen a USB device
`
`is attached to or removed from the USB, the host uses a process known as bus
`
`enumeration to identify and manage the device state changes necessary.” USB 2.0,
`
`243.
`
`USB 2.0 further specifies limits on the current a device may draw from a host
`
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`
`

`

`
`
`or another device. Id., 171, 178, 245. USB 2.0 specifies that a device may not draw
`
`more than 500 mA from USB via VBUS. Levy, ¶55.2
`
`A POSITA would have known about the different signaling states on the D+
`
`and D- lines in USB based on the USB 2.0 specification, as USB 2.0 defines a
`
`number of such signaling states that are used for various purposes. USB 2.0, Table
`
`7-2; Levy, ¶¶58-59. Additionally, USB 2.0 discloses that a USB device attached to
`
`a USB hub or host sets either the D+ or the D- line to a high logical voltage level to
`
`signal the USB hub or host regarding the connection. USB 2.0, 149-51; Levy, ¶60.
`
`This is also shown below in Figures 7-27 (D+ is high) and 7-28 (D- is high) of USB
`
`2.0.
`
`
`2 As discussed, POSITAs widely recognized that this limit was a problem in contexts
`
`requiring more power, as Amoni and Rogers have noted. E.g., Amoni, 2:19-26;
`
`Rogers, 11:2-8. Amoni and Rogers are prior art to the ’586 patent under pre-AIA
`
`§§102(b) and 102(e), respectively, as Amoni’s issuance date is March 16, 1999 and
`
`Roger’s filing date is February 8, 2001.
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`
`
`
`
`
`
`This connection-detection signaling takes place before USB enumeration. USB 2.0,
`
`243-44. Thus, USB 2.0 itself discloses that an identification signal comprises a
`
`voltage level on at least one data line in the USB connector. Levy, ¶61.
`
`USB 2.0 also discloses the SE1 state, which is of particular relevance for this
`
`petition. “SE1 is a state in which both the D+ and D- lines are at a voltage above
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`VOSE1 (min), which is 0.8 V.” USB 2.0, 123, 148. USB 2.0 also teaches that both
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`low and full-speed USB drivers “must never ‘intentionally’ generate an SE1 on the
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`bus.” Id. In other words, according to USB 2.0, an abnormal data condition would
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`occur if D+ and D- were both intentionally set in a high state above 0.8 V from a
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`connected USB host or device. Levy, ¶62.
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`C. Use of SE1 State in Various Contexts
`A POSITA at the time of the alleged invention of the ’586 patent would have
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`understood that the SE1 condition would be a logical choice for signaling
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`information to a device without interfering with USB signaling. Levy, ¶63.
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`Numerous prior art references disclose the use of the SE1 condition for this very
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`purpose.
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`Shiga (Ex 1009)
`1.
`U.S. Patent No. 6,625,738 (“Shiga”) was filed on December 6, 1999, and thus,
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`is prior art to the ’586 patent under at least pre-AIA § 102(e).
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`Shiga recognizes that, according to USB standards at the time, there are three
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`(D+, D-) signal line states representing three modes: (1) low-speed mode; (2) full-
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`speed mode; and (3) unconnected mode. Levy, ¶64; Shiga, 5:38-54. This is
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`summarized in Shiga’s Table 1, below.
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`
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`In the low-speed mode, the D+ signal line is set to a low level (designated “L”)
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`while the D- signal line is set to a high level (designated “H”). Shiga, 5:55-60; Levy,
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`¶65. In the full-speed mode, the D+ and D- states are flipped; D+ is high while D- is
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`low. Id. In the unconnected mode, both D+ and D- are low. Id.
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`In contrast to these three USB standard modes, Shiga also explains that the
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`“fourth mode” signal, which is when both D+ and D- are in the H level state, is “not a
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`USB standard state” and can therefore “be easily distinguished from USB standard
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`data signals.” Shiga, 5:60-62, 6:48-58; Levy, ¶¶66-68. Shiga uses this fourth mode
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`signal to extend the functionality of “computers connected with the USB interface by
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`providing a function that the USB does not have.” Shiga, 2:5-6. Specifically, Shiga
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`uses a fourth mode signal transmitted over USB from a keyboard to a computer to
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`wake up the computer when the computer is in an off state. Id., 2:11-17. A “wake-up
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`means” inside the computer is configured to detect the fourth mode signal on the D+
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`and D- data lines. Id., 6:59-7:8. After the wake-up means detects the fourth mode
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`signal, the main power supply for the computer is turned on. Id., 7:9-16.
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`Zyskowski (Ex. 1012)
`2.
`As another example, Zyskowski teaches that SE1 (with D+ and D- being set
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`at 5 V) could be used by a host device (e.g., computer) to signal that it is in a full
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`power state to a connected device (e.g., mass storage device, consumer electronic
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`device). Zyskowski, ¶¶ 19, 17; Levy, ¶69.3
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`3 Under pre-AIA §102(e), Zyskowski is prior art to the ’586 patent, as Zyskowski’s
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`filing date is December 3, 1999.
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`Casebolt (Ex. 1013)
`3.
`Casebolt also teaches that SE1 could be used as a special signaling mode.4
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`Specifically, as shown below, the D+ and D- data lines would be connected to Vcc
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`(+5V) to signal the presence of a PS/2 adapter.5 Casebolt, Fig. 2C, 7:41-54, Table
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`1; Levy, ¶70.
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`Indeed, the SE1 state for USB occurs when both the D+ and D- data lines are
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`at a H level, as shown in Casebolt’s Table 1 below. Levy, ¶71.
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`4 Under pre-AIA §102(e), Casebolt (Ex. 1013) is prior art to the ’586 patent, as
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`Casebolt’s filing date is October 1, 1999.
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`5 As Dr. Levy explains, a PS/2 port is a now-obsolete 6-pin mini-DIN connector that
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`was used for connecting keyboards and mice to an IBM PS/2 computer system.
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`Levy, ¶70.
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`Cypress Semiconductor
`4.
`Knowledge of use of a state in which D+ and D- are both high was so common
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`that Cypress Semiconductor integrated it into its enCoRe product in 2000, stating
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`“USB D+ and D- lines can also be used for PS/2 SCLK and SDATA pins,
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`respectively. With USB disabled, these lines can be placed in a high impedance state
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`that will pull up to VCC .” Cypress datasheet (Ex. 1014), 21-22, 24-25, 41; Levy,
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`¶72.6
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`5. Kerai (Ex. 1015)
`Kerai also used a high state on USB D+ and D- for charging. Kerai, Fig 3,
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`6 Under pre-AIA §102(b), Cypress datasheet is prior art to the ’586 patent, as Cypress
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`datasheet’s publication date is May 25, 2000.
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`- 16 -
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`5:43-51; Levy, ¶73.7 As shown below, both USB D+ and D- (yellow) are brought
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`to a high state in cooperation with the charging system (green) for a special charging
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`mode.
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`
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`In short, a POSITA would have understood that a high state on USB D+ and
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`D- lines could be used in a variety of contexts, including PS/2 (e.g., Casebolt’s PS/2
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`adapter), standard USB (e.g., the keyboard in Shiga), and others (e.g., Zyskowski’s
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`signaling of full power state, Kerai’s charging scheme) and was not restricted to a
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`single application. Levy, ¶74.
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`D. Theobald (Ex. 1006)
`U.S. Patent No. 5,859,522 (“Theobald”) was granted on January 12, 1999, and
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`
`7 Kerai is contemporaneous art to the ’586 patent, as Kerai’s filing date is May 25,
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`2001.
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`thus, is prior art to the ’586 patent under at least pre-AIA § 102(b).
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`Theobald discloses an accessory identification component in an electronic
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`device, such as a cell phone. Theobald, 1:12-13, 1:53-55, 3:52-58; Levy, ¶75. The
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`electronic device may be connected to the accessory using a J3 connector, although
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`any connector having an external supply pin and at least one information pin may be
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`used. Theobald, 3:5-10; Levy, ¶75. Theobald discloses multiple accessories that may
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`be connected to the electronic device, including two types of chargers: (1) a fast-rate
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`charger that provides 850 mA of current, and (2) a mid-rate charger that provides 340
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`mA of current. Theobald, 4:29-33; Levy, ¶75. As shown in the figure below, the
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`electronic device in Theobald determines which accessory (e.g., the fast-rate charger
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`or the mid-rate charger) is connected by measuring the voltage on the audio in pin of
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`its connector. Theobald, 4:55-67; Levy, ¶75.
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`This voltage is generated through, for example, a resistor placed between the
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`audio out pin and the power out pin of the accessory that has a unique resistance value
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`for each type of accessory that could be connected to the electronic device. Theobald,
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`4:55-67; Levy, ¶76. For example, for the mid-rate charger, the resistance is 120 kΩ,
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`whereas for the fast-rate charger, the resistance is 36 KΩ. Id.; Levy, ¶76. Theobald
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`refers to this resistor as “identification element 174,” which is highlighted below in
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`annotated Fig. 1. Levy, ¶76. The identification element could also be connected to
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`- 19 -
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`another information pin of the accessory, instead of the audio out pin. Theobald, 7:54-
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`61; Levy, ¶76.
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`
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`
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`If the accessory provides a voltage in the range 1.6-1.9 V at the audio in pin of
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`the electronic device’s connector, the electronic device determines that the connected
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`device is a mid-rate charger. Theobald, 6:14-41; Levy, ¶77. If the voltage at the audio
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`in pin is in the range 3.6-4.2 V, the electronic device determines that the connected
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`device is a fast-rate charger. Theobald, 6:14-41; Levy, ¶77. The processing required
`
`to distinguish a connected mid-rate charger from a connected fast-rate charger is
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`carried out by the controller using an accessory lookup table in memory that stores the
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`relevant voltage value ranges. Theobald, 6:14-41; Levy, ¶77. Theobald further
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`discloses that power from the charger accessory may be used t