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`US 20030135766A1
`
`as) United States
`a2) Patent Application Publication (0) Pub. No.: US 2003/0135766 Al
`Zyskowski et al. Jul. 17, 2003 (43) Pub. Date:
`
`
`
`(54) METHOD AND APPARATUS TO CONTROL
`COMPUTER SYSTEM POWER
`
`(76)
`
`Inventors: Paul J. Zyskowski, Chandler, AZ (US);
`Greg E. Scott, Higley, AZ (US)
`
`Correspondence Address:
`CHARLES A MIHRO INTEL CORPORATION
`BLAKELY SOKOLOFF TAYLOR & ZAFMAN
`LLP
`12400 WILSHIRE BOULEVARD
`7TH FLOOR
`LOS ANGELES, CA 90025
`,
`This is a publication of a continued pros-
`ceution application (CPA) filed under 37
`CFR 1.53(d).
`
`(*) Notice:
`
`(21) Appl. No.:
`
`09/453,656
`
`(22)
`
`Filed:
`
`Dec. 3, 1999
`Publication Classification
`
`
`(SL) Tite C07 aeesseesssssessscecssseccenneesn GO6F 1/26
`(52) US. Che oes cccneecsneseeeesneseneesanesssneennees 713/300
`
`(57)
`
`ABSTRACT
`
`.
`Asystem includes a power supply adapted to supply power
`to a device on a peripheral bus at least when the computer
`system is in a reduced powerstate. The system also includes
`a power control circuit adapted to receive a power control
`signal from the device at least when the computer system is
`in the reduced powerstate. The power control circuit tran-
`sitions the computer system [rom the reduced powerslate as
`a result of receiving the power control signal.
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`Huaweiv. FISI Exhibit No. 1012 - 1/8
`
`

`

`Patent Application Publication
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`Jul. 17,2003 Sheet 1 of 3
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`US 2003/0135766 Al
`
` Host
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`Huaweiv. FISI Exhibit No. 1012 - 2/8
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`

`

`Patent Application Publication
`
`Jul. 17,2003 Sheet 2 of 3
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`US 2003/0135766 Al
`
`
`
`
`206
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`FIG. 3
`
`Huawei v. FISI Exhibit No. 1012 - 3/8
`
`

`

`Patent Application Publication
`
`Jul. 17,2003 Sheet 3 of 3
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`US 2003/0135766 Al
`
` LoeocAL
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`Huaweiv. FISI Exhibit No. 1012 - 4/8
`
`

`

`US 2003/0135766 Al
`
`Jul. 17, 2003
`
`METHOD AND APPARATUS TO CONTROL
`COMPUTER SYSTEM POWER
`
`BACKGROUND
`
`1. Ficld
`[0001]
`[0002] The inventionrelates to controlling the powerstate
`of an electronic device, and, moreparticularly, to controlling
`the powerstate of a computer system from a device on a bus.
`[0003]
`2. Background Information
`[0004] As used herein, a computer system is any device
`comprising a processor
`to execute instructions and a
`memory to store the instructions. Computer systems often
`interface with other devices, called peripheral devices, by
`wayof a bus. As described herein, a bus is one or more
`conductors for sending and recciving signals between clec-
`tronic circuits, along, with protocols associated with sending
`and recciving the signals. The bus may be internal or
`external to the physical casing comprising the circuits and
`other components of the computer system. An example of an
`internal busis the Peripheral ComponentInterconnect (PCD
`bus, as described for example in the PCI Local Bus Speci-
`fication, Product Version, Revision 2.1, published June
`11995. An example of an external peripheral bus is the
`Universal Serial Bus (USB), as described for example in the
`Universal Serial Bus Specification, Revision 1.0, published
`January 1996.
`[0005]
`In some environments the host device may enter a
`reduced powerstate in which the host consumes less power
`thanin a fully-powered state. In this low powerstate, power
`consumption by certain components of the computer system
`may be curtailed in order to reduce overall power consump-
`tion. For example, a mass storage device such as a hard drive
`within the computer system may have powercurtailed in the
`reduced powerstate, in order to reduce overall system power
`consumption. When the host enters a low powerstate, it may
`also attempt to place devices on internal and external buses
`into a reduced power state as well. For devices on an
`external bus, this mayinvolve the host sending the devices
`a commandor request to enter the reduced powerstate. This
`command or request may be sent over the external bus.
`Some implementations may even enable a device on an
`internal or external bus to send a commandor request to the
`host, in orderto place the host in a reduced power consump-
`tion state. For example, USB supports such a feature.
`
`[0006] The host may have two sources of power for
`components; a primary power source and a standby power
`source. Essential components may derive power from the
`standby power source. Non-essential components, e.g. com-
`ponents to whom power maybe discontinued to place the
`host in a reduced powerstate, may derive power from the
`primary power source. Placing the host in a reduced power
`consumption state may thus involve cutting off the primary
`powersource. The standby power source may remain avail-
`able while the host is in the reduced powerstate. Restoring
`the primary power source may cause the host to enter the
`fully power state again.
`[0007] The host maytransition from the reduced power
`consumption state to a fully-powered state (or some power
`state between the reduced consumption state and the fully-
`powered stale) when an operation is carried oul which
`employs a component to which power has been cutoff. For
`
`
`
`
`example, powerto the hard drive component may becutoff
`in the reduced consumption state. Power maybe restored to
`the hard drive when the host performs an operation which
`employs the hard drive, such as reading or writing data to a
`hard disk. Such restoration of power may be referred ta as
`“waking up” the host. Throughout this document, the term
`“wake up” may be used interchangeably with the term
`“transition” to signify the transitioning of the host from a
`reduced power stale to another slate in which the host
`consumes more power than in the reduced powerstate.
`
`
`
`[0008] Abus device maybe in a reduced power consump-
`tion state when it receives a command which it cannol
`process in the reduced powerstate. To process the command
`(or subsequent commands whichare expected to follow), the
`device may “wake up” itself and the host to which it is
`coupled via the bus. For example, a bus device operating in
`a reduced power consumption state mayreccive a “power
`on” command from a remote control unit (much like a
`typical television remote control). The power on command
`may result from a person pressing a power toggle button on
`the remote control. The device may receive the power on
`commandandtransition to a fully-powered state. To process
`subsequent commands which are expected to follow (for
`example, channel change commandsif the device is a media
`player), the device may attempt to communicate with the
`host. However, if the host is operating in a reduced power
`state it may not be possible for the device to communicate
`with the host. Such communication may not be possible
`because, upon entering the reduced power consumption
`state, the host may have disabled transfer of signals via the
`bus. ‘The host may need to be woken up before signals may
`be exchanged between the device and the host over the bus,
`but the bus cannot be used to wake up the host becauseit is
`disabled. There therefore exists a continuing need for a
`mechanism whereby a bus device may wake up a host from
`a reduced power consumptionstate.
`
`SUMMARY
`
`[0009] A system includes a power supply adapted to
`supply power to a device on a peripheral bus at least when
`the computer system is in a reduced power state. The system
`also includes a power control circuit adapted to receive a
`power control signal from the device at
`least when the
`computer system is in the reduced powerstate. The power
`control circuit
`transitions the computer system from the
`reduced power state as a result of receiving the power
`control signal.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0010] The subject matter regarded as the invention is
`particularly pointed out and distinctly claimed in the con-
`cluding portion of the specification. The invention, however,
`may be further understood by reference to the following
`detailed description read with reference to the accompany-
`ing drawings.
`
`[0011] FIG. 1 shows a block diagram illustrating onc
`embodiment of a system in accordance with the present
`invention.
`
`[0012] FIG. 2 shows a block diagram of an embodiment
`of a host computer system in accordance with the present
`invention.
`
`Huawei v. FISI Exhibit No. 1012 - 5/8
`
`

`

`US 2003/0135766 Al
`
`Jul. 17, 2003
`
`FILG. 3 shows an embodiment of device in accor-
`[0013]
`dance with the present invention.
`
`[0014] FIG. 4 shows an embodiment of a method in
`accordance with the present invention.
`
`DETAILED DESCRIPTION
`
`[0015] The cmbodiments described herein are merely
`illustrative, and one skilled in the art will appreciate that
`numerous modifications can be made which nonethelessfall
`within the scope of the present invention.
`
`In accordance with one embodimentof the present
`[0016]
`invention, a bus device operates from an independent source
`of power, or from standby power supplied from the com-
`puter system. A power control signal path is established
`between the device and the computer system to cnable to
`device to wake the computer system from a reduced power
`state.
`
`[0017] FIG. 1 shows a block diagram illustrating one
`embodiment 100 of a system in accordance with the present
`invention. Host 104 is coupled to a bus device 106 by way
`of a bus 108. In one embodiment, host 104 is a computer
`system which may comprise a personal computer (PC),
`laptop computer, or handheld computer, among manypas-
`sibilities. Device 106 may be virtually any electronic device,
`including mass storage devices (hard drives, compact disk
`drives, digital video disk drives, etc.) and consumer elec-
`tronic devices (videocassette recorders, music devices, etc.).
`In one embodiment, bus 108 is compliant with USB signal-
`log protocols and specifications. USB specifications typi-
`cally specify four signal paths; a ground GRD,a power path
`S, and twodata paths D1 and D2. The signal path between
`host 104 and device 106 may also comprise additional
`components not shown so as not
`to obscure the present
`discussion. For example,
`the signal path may comprisc
`well-known hub and repeater components.
`
`[0018] A remote control unit 110 may supply commands
`via infrared, radio, or other wireless technology to device
`106. Of coursc, commands need not be supplicd by remote;
`button presses or other input techniques to device 106 may
`also be employed,
`including automatic and timer-based
`techniques. Device 106 may derive operating power from
`power path S from host 104. Unlike conventional USB
`devices, which may derive power from the primary power
`source of the host 104, device 106 may derive power from
`the host’s standby power source via power path S. In other
`words, conventional USB implementations may couple
`powerpath S ofbusto the host’s primary power source. The
`present invention, however, may couple powerpath S to the
`host’s standby power source. Thus, even when the host 104
`has entered a reduced powerstale (in which primary power
`source is cut off), device 106 may derive operating power
`trom the host’s standby power source.
`
`[0019] Signal path Pon provides a path by which device
`106 may signal host 104 to wake host 104 from a reduced
`power state. On USB, device 106 maydetect that the host
`104 is in a reduced power state by monitoring the state of
`one or both of the data paths D1 and D2. When the host 104
`is in a full powerstate, data lines D1 and D2 mayberaised
`to a predefined DC voltage level, for example, 5 volts
`(systems operating al lower voltages might raise the data
`paths to 3 volts, 2 volts, or even less). When the host 104 is
`
`operating in a reduced powerstate, the data paths D1 and D2
`may be “floating” (an electrical characteristic well known in
`the art) or grounded, or in some other state wherein the
`predefined DC voltage level is not present on the paths. The
`device 106 may detect
`the power state of hast 104 by
`detecting the presence or absence of the predefined DC
`voltage level on the data paths D1 and D2.
`
`[0020] Device 106 may operate from standby power from
`power path S even when host 104 is in a reduced power
`slate. Device 106 may receive commands [rom remote unil
`110 and may determine that to process the commands, host
`104 should be awakenedfrom a reduced powerslate. Device
`106 maysignal host 104 using signal path Pon to wake up
`the host 104. Once the host 104 is awake, data paths D1 and
`D2 become usable to communicate with host 104, and
`device 106 may use the data paths to request that host 104
`process the command.
`
`[0021] FIG. 2 shows a block diagram of an cmbodiment
`200 of a host computer system in accordance with the
`present invention. Embodiment 200 comprises a processor
`202 to execute instructions supplied from a bus 214. The
`executed instructions are stored in a memory 206 from
`which they are supplied to the processor 202 by the memory
`bus 214 for exccution. The processor 202 may be imple-
`mented using any semiconductor fabrication technology and
`may execute any instruction set including,but notlimited to,
`instruction sets supported by an Intel Corporation Pentium®
`processor or compatible processor. Multiple processors may
`also be present in the system 200. The memory bus 214 may
`be implemented using technologies for propagating signals
`including, but notlimited to, electronic and optical conduc-
`tors and may in fact comprise multiple busses. ‘The memory
`206 may include random access memory (RAM),read-only
`memory (ROM), or any other form of memory capable of
`storing instructions which may then be supplied to the
`processor 202 by the memory bus 214 lor execution. OF
`course, the invention is not limited in scope to this particular
`embodiment. Computer system 200 may of course include
`other componcnts as well, including a hard drive controller
`210 to control access to a machine-readable storage medium,
`such as a hard disk. The hard disk can store sequences of
`instructions which may be loaded into memory 206 from
`which they may be supplicd to processor 202 for cxccution.
`The machine-readable storage medium mayinclude, but is
`notlimited to, a hard drive, a floppy drive, and a CD-ROM
`or other optical disk.
`
`To perform signal input/output, computer system
`[0022]
`200 may comprise an I/O bus 216 bridged to memorybus
`214 by wayof a bus bridge circuit 208. I/O bus 216 may be
`implemented using the same gencral technologics (clectri-
`cal, optical, etc.) used to implement memory bus 214. Of
`course, other peripheral devices may be coupled to I/O bus
`216 as well. For example, a keyboard and/or a mouse may
`each be coupled to the I/O bus 216.
`
`[0023] Computer system embodiment 200 further com-
`prises a power control circuit 204. In this embodiment,
`powercontrol circuit 204 is shown coupled to memory bus
`214, although this may not be essential to practice of the
`present invention. Powercontrol circuit 204 may switch on
`or cut off primary power on signal path P to other compo-
`nents of the system 200 in response to a command Irom
`processor 202. Doing so places the system in a reduced
`
`Huawei v. FISI Exhibit No. 1012 - 6/8
`
`

`

`US 2003/0135766 Al
`
`Jul. 17, 2003
`
`power consumption state. When in such a state, standby
`powerof signalpath S is still available to other components
`of the computer system. For example, hard drive 210 is
`supplied by primary powerpath P but not by standby power
`path S. Processor 202, memory 206, and other “essential”
`components of the system are supplied by standby power
`path S. Essential components are those which should receive
`power even in a reduced power consumption state. When
`primary poweris cut off, hard drive 210 is not supplied with
`power, but the essential components still receive standby
`power. Signal path Pon, described in FIG. 1, is coupled to
`powercontrol 204. When device 106 asserts a power control
`signal on Pon, power control 204 may restore primary power
`on signal path P (assuming,or course, that the system is in
`a reduced power consumption state when the power control
`signal is reccived). For example, device 106 coupled to the
`peripheral bus 108 may send a power control signal over
`signal path Pon power control circuit 204. This signal may
`result
`in power control 204 restoring power on path P.
`Componcnts which are supplicd with power from path P,
`such as hard drive 210, may thus have powerrestored.
`[0024] Computer system 200 further comprises a periph-
`cral bus controller 212 coupled to I/O bus 216. In onc
`embodiment, peripheral bus controller 212 comprises a USB
`controller (USBC). Peripheral bus 108 comprises signal
`paths D1, D2, S, and GND, as described in FTG.1.
`[0025] FIG. 3 shows an embodiment 300 of device 106 in
`accordance with the present invention. Embodiment 300
`includes an infrared (IR) sensor 306 to sense infrared
`commands from remote unit 110. Infrared sensor 306 may
`be coupled to infrared receiver 304. Infrared commands
`received by sensor 306 may be passed as electrical signals
`to receiver 304. Receiver in tum may be coupled to con-
`trollcr 302 and may pass electrical commandsignals to
`controller 302. Of course, device 106 need not receive
`commands via infrared. Front pancl buttons and radio sig-
`nals are only a few of the other possible means by which
`device 106 could receive commands.
`
`[0026] Embodiment S maybe supplied with power from
`powerpath S, coupled to standby power supply of the host
`104. Power path S mayalso be coupled to a power supply
`which is independent of host power. In either case, power
`path S supplies power to components of embodiment 300,
`including controller 302 and receiver 304, even when pri-
`mary power from host 104 is cut off.
`
`In response to receiving a power command (rep-
`[0027]
`resenting, for cxample,
`the press of a power button on
`remote unit 110), controller 302 may attempt
`to detect
`whether host 106 is in a reduced power consumptionstate.
`Controller 302 may do so by monitoring the reference DC
`voltage level on one or both of data paths D2 and D1.
`Absence of a predetermined DC voltage level on these data
`paths may indicate that the host 104 is in a reduced power
`consumption state. Device 106 maythen attempt to wake up
`the host 104 by sending a powercontrol signal on signal path
`Pon. Power control signal may take the form of raising the
`voltage level on Pon to a predetermined level, such as 5
`volts. Of course, signal may take other forms as well, such
`as lowering the voltage level on Pon or any combination of
`raising and lowering the voltage.
`[0028] FIG. 4 shows an embodiment 400 of a method in
`accordance with the present invention. At 402 a “local”
`
`commandis received by the device 106. Herein the term
`“local” refers to commands which are not transmitted over
`the peripheral bus 108, but instead arrive at the device 106
`by other means (such as by infrared, front panel button
`presses, etc.). [f at 404 the local command is not a power
`command, other processing not relevant to a discussion of
`the present invention may be performed. If at 404 the local
`command is a power command,a test may be performed at
`408 to determine whether the host 104 is awake. As previ-
`ously described, this test may involve monitoring the volt-
`age level of the bus 108 data signal paths D1 and D2. Tf the
`host 104is not awake, a signal is asserted on path Pon at 410.
`This signal may result is the host 104“waking up”, e.g.
`transitioning from the reduced power consumption state to a
`state in which more components of the computer system are
`provided with power. Upon waking up, the host 104 may
`send a reset command to the device 106. Device 106 may
`wait for this reset command at 414. Upon receiving reset
`command, device 106 may performa self-reset, which may
`involve initializing various internal clectrical states, or the
`device 106 may ignore the reset command. The device 106
`may then wait for a next local command at 416. If, at 408,
`the host 104 it is determined that the host 104 is awake (in
`a fully poweredstate), then the device 106 may send a sleep
`command to the host 104 by way of the bus 108. In other
`words, the power command mayact as a power toggle for
`the host 104: if the host 104 is in a reduced power state, the
`local power commandresults in the host 104 waking up into
`a fully powered state; if the host 104 is fully powered, the
`local power commandresulis in the host 104 entering a
`reduced powerstate.
`[0029] Of course, the method embodiment 400 of FIG. 4
`is merely exemplary of possible applications of the present
`invention. Numerous other applications and embodiments
`may be employed which nonetheless fall within the scope of
`the present invention.
`[0030] While certain features of the invention have been
`illustrated as described herein, many modifications, substi-
`tutions, changes and equivalents will now occur to those
`skilled in the art. It is, therefore, to be understood that the
`appended claims are intended to cover all such embodiments
`and changes asfall within the true spirit of the invention.
`Whatis claimed is:
`1. Asystem comprising:
`a powcr supply adapted to supply powerto a device on a
`peripheral bus at least when the computer systemis in
`a reduced powerstate; and
`a powercontrol circuit adapted to receive a powercontrol
`signal [rom the device at
`least when the computer
`system is in the reduced powerstate, the power control
`circuit
`to transition the computer system [Tom the
`reduced powerstate as a result of receiving the power
`control signal.
`2. The system of claim 1 in which the bus is adapted to
`support signals which comply with a Universal Serial Bus
`specification.
`3. A system comprising:
`a first circuit to supply primary power to a first set of
`components of the computer system;
`a secondcircuil to provide standby power to a secondsel
`of components of the computer system;
`
`Huawei v. FISI Exhibit No. 1012 - 7/8
`
`

`

`US 2003/0135766 Al
`
`Jul. 17, 2003
`
`a peripheral bus controller to send and receive data from
`a peripheral bus, the peripheral bus coupled to standby
`power; and
`a power controlcircuit adapted to supply primary power
`to the first set of components of the computer systemas
`a result of receiving a power control signal from a
`device coupled to the peripheral bus.
`4. The computer system of claim 3 in which the peripheral
`bus comprises a data signal path, the power control circuit
`coupled to a power signal path,
`the power signal path
`separate from the data signal path and a power path to the
`standby power.
`5. The computer system of claim 3 in which the peripheral
`bus is adapted to comply with a Universal Serial Bus
`specification.
`6. A device comprising:
`an interface to a computer system to provide powerto the
`device;
`
`a control circuit adapted to provide a signal to the com-
`puter system by way of the interface,
`the signal to
`transition the computer system from a reduced power
`statc.
`7. The device of claim 6 in which the interface is adapted
`to couple to a standby power source of the computer system.
`8. The device of claim 6 in which the device further
`comprises:
`a remote sensorto detect a remote commandwhichresults
`in the signal.
`9. A method comprising:
`providing power to a device coupled to a peripheral bus
`of a computer system at
`least when the computer
`system is in a reduced power consumption state; and
`
`responsive to a command received from the device,
`transitioning the computer system from the reduced
`power consumptionstate.
`10. The method of claim 9 further comprising:
`signaling the device in a manner compatible with a
`Universal Serial Bus specification.
`11. A method comprising:
`deriving power from a computer system by way of a
`peripheral bus at least when the computer system is in
`a reduced power consumption state; and
`providing a signal to the computer by way of the periph-
`eral bus which results in the computer system transi-
`tioning from the reduced power consumption state.
`12. The method of claim 11 further comprising:
`providing the signal in response to a remote command.
`13. A system comprising:
`a computer system; and
`a device coupled to the computer system by wayof a
`peripheral bus;
`whercin the computer systcm is adapted to provide power
`to the device at least while in a reduced power con-
`sumptionstate and to transition from the reduced power
`consumption state as a result of receiving a signal from
`the device.
`14. The system of claim 13 in whichthe peripheral bus is
`adapted to support signals compatible with a Universal
`Serial Bus specification.
`15. The system of claim 13 in which the device is coupled
`to a standby power source of the computer system.
`
`Huawei v. FISI Exhibit No. 1012 - 8/8
`
`