(12) United States Patent
`Popescu-Stanesti
`
`USOO6326771B1
`(10) Patent No.:
`US 6,326,771 B1
`(45) Date of Patent:
`*Dec. 4, 2001
`
`(54) BUFFER BATTERY POWER SUPPLY
`SYSTEM
`
`(*) Notice:
`
`This patent is Subject to a terminal dis
`claimer.
`
`11/1998 Hirose .................................. 320/134
`6,181,107
`* cited by examiner
`(75) Inventor: Vlad Popescu-Stanesti, San Jose, CA
`Primary Examiner Peter S. Wong
`(US)
`ASSistant Examiner Pia Tibbits
`(74) Attorney, Agent,
`or Firm-Hayes, Soloway,
`(73) Assignee: 02 Micro International Limited,
`Hennessey, GroSSman & Hage, P.C.
`Grand Cayman (KY)
`(57)
`ABSTRACT
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35 A buffer battery power Supply circuit is provided. In one
`U.S.C. 154(b) by 0 days.
`embodiment, a battery charger circuit Supplies a total output
`current which is delivered to both an active System and a
`battery. The total output current and the current delivered to
`a battery are Sensed and compared to a preset threshold total
`output current Signal and threshold battery current signal,
`respectively. The compared signals generate error Signals
`which are provided as feedback to the battery charger
`circuit, So that the total output current can be controlled. In
`another embodiment, in addition to Sensing the total output
`current and the battery current, the total output Voltage is
`Sensed and multiplied by the total output current, generating
`a total output power error Signal. The error Signals are
`provided as feedback to the battery charger circuit, So that
`the total output current and/or the total output voltage can be
`controlled. In other embodiments, a battery switch is pro
`vided that couples decouples the battery from the loadbased
`on the minimum required Voltage of the load, and provides
`a path between the battery and a power Source So that the
`battery can receive al trickle charge even in a deeply dis
`charged State, while permitting the power Source to power
`the load. The circuitry of the present invention provides
`Self-adjusting current management between a load and a
`rechargeable battery where the load requirements get prior
`ity over the battery recharge power requirements.
`38 Claims, 12 Drawing Sheets
`
`(21) Appl. No.: 09/690,200
`(22) Filed:
`Oct. 16, 2000
`Related U.S. Application Data
`(63) Continuation-in-part of application No. 09/272,738, filed on
`Mar. 8, 1999.
`(51) Int. Cl." .................................................... H02J 7/04
`(52) U.S. Cl. .............................................................. 320,139
`(58) Field of Search ............................ 323,00s. 363/136
`320/132, 134, 139
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`3/1998 Knudsen .............................. 323/276
`5,734,261
`12/1998 Yoshimatsu .......................... 2
`5,847,538
`4/1999 Yatsu et al... 363/136
`5892.675
`5,982,148 * 6/1998 Mercer .......
`... 32O/134
`5,998,974 * 11/1998 Sudo et al. ........................... 320/136
`
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`BATTERY
`CHARGER
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`DC/DC
`CONVERTER
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`34
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`BATERY
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`24
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`U.S. Patent
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`Dec. 4, 2001
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`Sheet 1 of 12
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`US 6,326,771 B1
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`10
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`INPUT
`POWER
`ADAPTER
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`BATTERY
`CHARGER
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`SYSTEM
`DC/DC
`CONVERTER
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`SYSTEM
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`FIG,
`PRIOR ART
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`DUTY CYCLE
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`PWR OUT
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`OZZ
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`=HALLOW
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`1
`BUFFER BATTERY POWER SUPPLY
`SYSTEM
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`The present invention is a continuation-in-part application
`under 37 C.F.R 1.53(b) of application Ser. No. 09/272,738
`filed Mar. 8, 1999, and assigned to the same assignee.
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`The present invention relates to a battery power Supply
`System, and, more particularly, to a buffered battery charger
`circuit capable of controlling the power Supplied to an active
`System and to a rechargeable battery, and including circuitry
`for Self-adjusting allocation of total power Supply ensuring
`that an active System gets priority of power while maintain
`ing a charge current for the rechargeable battery. Particular
`utility of the present invention is in a power Supply System
`for portable electronic units, although other utilities are
`contemplated herein.
`2. Description of Related Art
`FIG. 1 is a simplified block schematic of a typical prior art
`power Supply topology 20 for a portable electronic System
`24. The active System 24 gets power, conditioned by the
`system DC/DC converter 22, either from the battery 18 or
`from the external input power adapter 10. The input power
`adapter 10 gets the power from an external primary power
`Source, Such as an AC outlet or a DC Source, and provides
`the power directly to both the system DC/DC converter 22,
`through the Separating diode 12, and to the battery charger
`14. The battery 18 is connected and provides power to the
`system DC/DC converter 22 through the separating diode
`16, as long as the primary power Source is not available.
`When the primary power source is available, the battery is
`isolated from the power input of the system DC/DC con
`verter 22 by the reversed polarized (reversed biased) diode
`16. In addition, the battery 18 is charged when power is
`Supplied by the primary power Source, through the charger
`14. This topology in FIG. 1 has the disadvantage of big and
`fast Voltage transients at the node 25, which is the input of
`the system DC/DC converter 22.
`FIG. 2 shows a simplified block diagram of a buffer
`battery power Supply 20' topology. The battery pack 18 is
`permanently connected to the input of the system DC/DC
`converter 22 and provides the requested power. The external
`input power adapter 10 powers the battery charger 14 when
`an external primary power Source is available. The external
`input power adapter 10 is intended to adapt the parameters
`of the primary Source to the charger input requirements. The
`battery charger 14 powers in parallel both the System
`DC/DC converter 22 and the battery 18 to charge it or to
`maintain the Voltage of the fully charged battery at the
`optimal level. This “buffer battery topology’ limits the
`voltage variations at the system DC/DC converter input
`(node 25) to normal battery pack Voltage variations and does
`not allow fast voltage transients at this input. Furthermore,
`when the power requested by the System 24 temporarily
`exceeds the capability of the input power adapter 10, both
`the input power adapter 10 and the battery 18 will deliver in
`parallel the power to the System 24 through the converter 22.
`Disadvantageously, however, the circuit 20' shown in FIG.2
`provides no mechanism by which the power Supplied by the
`battery charger can be reduced or increase based on preset
`limits or demand from the battery, the system, or both.
`Similarly, U.S. Pat. No. 5,698,964 issued to Kates et al.
`Provides a battery charging circuit topology. This circuit
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`monitors the current from an AC adapter (i.e., I) and
`adaptively utilizes all available current to charge the batter
`ies. The system DC/DC converter is powered directly by the
`AC adapter after its connection; the battery is disconnected
`from the System. Thus the Voltage at the input of the System
`DC/DC converter abides a heavy transient, from the low
`Voltage of a discharged battery to the AC adapter Voltage,
`every time higher than the maximum charged battery volt
`age. Furthermore, as the AC adapter output voltage could
`vary, no real control is provided for the power delivered by
`the AC adapter to both the System (e.g. portable electronic
`device) and the battery. A similar topology is provided in
`U.S. Pat. No. 5,723,970 issued to Bell, which Suffers similar
`and/or additional drawbacks mentioned above.
`The approach in the prior art to provide battery charge
`circuitry and a path to an active System is typically accom
`plished using Separate paths between a power Source and a
`rechargeable battery, and a power Source an a load. In the
`case of the present invention, the Source, battery and load
`(System) are all in parallel thus, the conventional charging/
`discharging approaches would be inadequate, Since the
`Voltage conditions on the battery must be accounted for
`when providing power to the System.
`Thus, there exists a need to provide a buffered battery
`power Supply System that can control both the total output
`power and the power delivered to the battery. Moreover,
`there exists a need to provide a System that will significantly
`reduce the Voltage transients that may appear at the elec
`tronic device, the battery, or both. Also, there exists a need
`to provide a buffer topology (where the battery and System
`are in parallel with a Source) that permits charging of the
`battery when the battery is deeply discharged, and that
`permits a variety of choices for the Source Voltage in
`addition to conventional PWM-type source voltages.
`SUMMARY OF THE INVENTION
`Accordingly, the present invention Solves the aforemen
`tioned drawbacks by providing a buffer battery power Sup
`ply system that includes feedback control of both the total
`output current delivered by the battery charger circuit and
`the voltage delivered to the battery. Feedback control is
`provided based on the total output power (total output
`current X total output voltage) delivered by the battery
`charger circuit. To permit charging of a deeply discharged
`battery while also supplying power to a system (or a DC/DC
`converter), the present invention also includes a battery
`Switch circuit that Selectively decouples the battery from a
`load (System) when the battery is in a deeply discharged
`State, yet still provides a path for a trickle charge (low
`current) to charge the battery Sufficiently to begin regular
`charging.
`In one embodiment of the present invention, a power
`Supply System is provided that includes a charger circuit for
`generating a duty cycle for delivering power to an active
`System and a battery. A first feedback loop is provided to
`Sense the total output current generated by the charger circuit
`and a Second feedback loop is provided to Sense the current
`delivered to said battery by the charger circuit. The first and
`Second feedback loops including error circuits for generating
`an error Signal to the charger circuit. The charger circuit
`adjust the duty cycle So thereby controlling the total output
`current delivered to the active system and the battery based
`on the value of the error Signal. Also, a battery Switch circuit
`is provided that decouples Said battery from Said active
`System when Said battery voltage is less than the minimum
`Voltage required to power Said active System, and couples
`Said battery to Said charger circuit to receive a charging
`Current.
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`3
`In another embodiment of the present invention, a power
`Supply System is provided that includes an input power
`Source, and a charger circuit for generating a duty cycle for
`controlling the input power Source to deliver controlled
`power to an active System and a battery. A first feedback loop
`is provided to Sense the total output current generated by the
`charger circuit, the first feedback loop generating a first error
`Signal based on the total output current and a preset thresh
`old total output current Signal. A Second feedback loop is
`provided to sense the current delivered to the battery by the
`charger circuit, the Second feedback loop generating a
`Second error Signal based on the current delivered to the
`battery and a preset threshold battery current signal. A third
`feedback loop is provided for Sensing the total output power
`generated by the charger circuit, the third feedback loop
`generating a third error Signal based on the total output
`power and a preset threshold total output power Signal.
`Using the first, Second or third error Signals, the charger
`circuit adjusts the duty cycle for controlling the total output
`current and power delivered to the active System and the
`battery. This embodiment also includes a battery Switch
`circuit is provided that decouples Said battery from Said
`active System when Said battery Voltage is less than the
`minimum Voltage required to power Said active System, and
`couples Said battery to Said charger circuit to receive a
`charging current.
`In method form, the present invention provided a method
`of regulating the current delivered by a charger circuit to an
`active System and a battery. The method includes the Steps
`of Sensing a first error Signal based on the total output
`current of the charger circuit and a preset threshold total
`output current signal. The method also includes Sensing a
`Second error Signal based on the current delivered to the
`battery by the charger circuit and a preset threshold battery
`current signal. One of the first or Second error Signals is
`provided to the charger circuit as feedback Signals. The
`charger circuit adjusts the current delivered based on the first
`or Second feedback error Signals. The method also includes
`the Steps of Sensing the Voltage of Said battery and decou
`pling Said battery from a load if Said battery Voltage is leSS
`than a required minimum Voltage for Said load; and coupling
`Said battery to Said charger circuit if Said battery Voltage is
`less than a required minimum Voltage for said load.
`In Still other embodiments, the present invention provides
`a power Supply System, comprising a power Source; a battery
`in parallel with Said power Source; a load in parallel with
`Said battery and Said power Source; and a battery Switch
`circuit placed between Said battery and Said power Source,
`Said battery Switch circuit adapted to decouple Said battery
`from Said active System and Said load when Said battery
`Voltage is less than the minimum Voltage required to power
`Said active System, and Simultaneously couple Said battery to
`Said charger circuit to receive a charging current.
`In preferred form, the battery Switch circuitry comprises
`a controllable Switch coupled between said battery said
`charger circuit and Said active System, an impedance in
`parallel with Said controllable Switch, and a comparator to
`control the activation State of Said controllable Switch,
`wherein Said comparator comparing Said minimum Voltage
`required to power said active System and Said battery voltage
`and generating a control Signal to control the conduction
`State of Said controllable Switch, and wherein Said imped
`ance providing a path between Said battery and Said charger
`circuit if Said Switch is nonconducting. In most preferred
`form, the impedance is chosen to have an impedance value
`larger than Said active System.
`It will be appreciated by those skilled in the art that
`although the following Detailed Description will proceed
`
`4
`with reference being made to preferred embodiments and
`methods of use, the present invention is not intended to be
`limited to these preferred embodiments and methods of use.
`Rather, the present invention is of broad Scope and is
`intended to be limited as only Set forth in the accompanying
`claims.
`Other features and advantages of the present invention
`will become apparent as the following Detailed Description
`proceeds, and upon reference to the Drawings, wherein like
`numerals depict like parts, and wherein:
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a block diagram of a power Supply circuit
`topology of the prior art;
`FIG. 2 is block diagram of another power Supply circuit
`topology of the prior art;
`FIG. 3 is a block diagram of one preferred embodiment of
`the power Supply System of the present invention;
`FIG. 4 is a detailed circuit diagram of the embodiment of
`FIG. 3;
`FIG. 5 is a detailed circuit diagram of another embodi
`ment of the power Supply System of the present invention;
`FIG. 6 is a detailed circuit diagram of one example of a
`current-Voltage multiplying circuit provided in the embodi
`ment of FIG. 5;
`FIG. 7 is a detailed circuit diagram of another example of
`a current-voltage multiplying circuit provided in the
`embodiment of FIG. 5;
`FIG. 8 is another circuit diagram of a conventional buffer
`battery power Supply System;
`FIG. 9 is a circuit diagram of another power supply
`toplogy according to the present invention and includes a
`battery Switch circuit;
`FIG. 10 is circuit diagram of another power supply
`topology according to the present invention and includes the
`battery switch circuit of FIG. 9; and
`FIGS. 11 and 12 are circuit diagrams of the topologies of
`FIGS. 4 and 5, respectively, and further include the battery
`Switch circuit of FIG. 9.
`
`DETAILED DESCRIPTION OF PREFERRED
`EMBODIMENTS
`FIG.3 shows the block diagram of one preferred embodi
`ment of the battery power System 30 according to the present
`invention. The battery pack 18 is, as discussed above,
`permanently connected to the system DC/DC converter
`through the sense resistor 34. Preferably, resistor 34 is a very
`Small value resistor is intended to Sense the current to and
`from the battery 18, with negligible voltage drop. The
`battery charger 32 is connected to the system DC/DC
`converter input (node 25) through the separating diode 12
`and the sense resistor 26. When the input power adapter 10
`has a primary power Source available and it is connected to
`the system 30, the battery charger 32 provides the requested
`power to the active system 24 through the DC/DC converter
`22, and simultaneously charges the battery 18. The battery
`charging current, Sensed by the Sense resistor 34, and the
`Voltage on the node 25 are regulated by the battery charger
`32, which makes use of feedback connections from the
`current sense resistor 34 and from the node 25. Furthermore,
`the total battery charger output current is Sensed by Sense
`resistor 26 and is limited to a Safe value by using the
`feedback connections from the Sense resistor 26 to the
`battery charger 32. The battery charger 32 reacts by reducing
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`the charging current. The feedback connections via Sense
`resistors 26 and 34 are described in more detail below.
`Referring to the FIG. 4, a detailed circuit diagram of the
`battery charger circuit 32 according to one embodiment of
`the present invention is depicted. The Switching MOS tran
`sistors 40 and 42, the Schottky diode 46, the inductor 44, the
`capacitor 48 and the pulse width modulator 38 together form
`a controlled buck converter. In this embodiment, the duty
`cycle of the buck converter pulses is controlled by the pulse
`width modulator 38 through at least three feedback loops:
`I) a voltage loop built around the error amplifier 60, II) a
`battery charging current loop using the battery charging
`current sense amplifier 64 and the error amplifier 58, and III)
`a total output current limiting loop embedding the output
`current sense amplifier 62 and the comparator 56. The
`diodes 50, 52 and 54 assure the largest negative value (i.e.,
`the diode having the largest reverse bias) goes through to the
`PWM 38. This is a measure of the largest error, thus
`providing control of that output parameter which had
`reached the limit value.
`When the input power adapter 10 provides power to the
`charger input, the pulse width modulator 38 Starts to gen
`erate pulses which drive the gates of power MOS transistors
`40 and 42. As a result a Voltage appears on the output of the
`charger. The duty cycle of the pulses depends on the feed
`back voltage received by the PWM 38 from the feedback
`loops. AS long as no one of the Set limits is exceeded, the
`duty cycle increases, which in turn raises the output voltage
`of the buck converter. The set limits are preferably defined
`as preset inputs to the comparators, as discussed below.
`When the output voltage of the buck converter exceeds the
`battery voltage, the circuit 80 Switches ON and the output
`current reaches the node 25. This current is shared between
`the system DC/DC converter 22 and the battery 18. The
`current flowing to the battery generates a Voltage drop acroSS
`the sense resistor 34. This voltage is amplified by the sense
`amplifier 64 and is compared with the programmed value
`IDAC by the error amplifier 58. When the charging current
`exceeds the programmed value IDAC, the output of the error
`amplifier 58 goes negative, flows through diode 52, and
`reduces the duty cycle of the PWM to keep the charging
`current at the programmed value. Likewise, error amplifier
`60 compares the battery Voltage with the programmed value
`VDAC and, when the charging Voltage exceeds the pro
`grammed value VDAC, the duty cycle of the buck converter
`is decreased. Similarly, the total output current of the buck
`converter generates a voltage drop on the Sense resistor 26.
`This voltage drop is amplified by the sense amplifier 62 and
`compared with the preset value Iout max by the error
`amplifier 56. When the total output current exceeds the
`preset value, the output of the error amplifier 56 goes
`negative, the signal flows through diode 50, and the duty
`cycle is reduced as to keep the total output current at the
`preset limit. This decrease produces a drop of the battery
`charging current. AS it is known, because of the battery's
`low internal resistance, the battery charging current
`decreases very quickly with the reduction of the Voltage.
`Conversely, the current sunk by the system DC/DC con
`verter 22 is only marginally affected by this Voltage varia
`tion. Thus, the total current I
`at node 25 is kept constant
`while the battery charging current decreases. Thus, the
`current allocated to the system DC/DC converter 22 is
`increased. Up to a preset limit, the whole output current of
`the buck converter is allocated to the system 24.
`Furthermore, if the System requests more power, the Voltage
`will drop even more and the battery will join the buck
`converter in providing the power. This features allows to use
`Smaller and cheaper input power adapters.
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`Signals VDAC and IDAC are programmed signals that
`represent the maximum current and Voltage that can be
`delivered safely to the battery 18, i.e., the threshold values
`permitted by the battery for Safe operation. In Some
`instances, battery 18 supplies signals VDAC and IDAC (i.e.,
`if battery 18 is a so-called “smart battery' that supplies
`Signals indicative of its maximum allowable power), which
`could be in digital form. Thus, D/A converters (not shown)
`are provided to convert VDAC and IDAC into analog
`signals for comparison at error amplifiers 60 and 58,
`respectively, as described above. Alternatively, VDAC and
`IDAC can be generated by other programmable circuitry
`(not shown), as is known in the art. In addition, reference
`Signal Iout max is another preset threshold value that
`represents the maximum allowable current that PWM is
`permitted to deliver to prevent overcurrent from being
`delivered by the charger circuit 32. Iout max can be gen
`erated by a Voltage divider circuit (not shown) or other
`current generating circuits known in the art.
`It should be noted that, in this embodiment, diode 12 is
`preferably replaced with circuit 80. Both diode 12 (FIG. 3)
`and circuit 80 prevent reverse current from reaching the
`PWM coming from the battery 18. However, circuit 80 has
`the additional advantage over a diode in that a negligible
`forward voltage is needed to turn ON circuit 80.
`Consequently, circuit 80 has a very Small Voltage drop
`compared to a diode, and thus, circuit 80 creates a negligible
`loss in the system. Circuit 80 carries out the task of cutting
`out the reverse current from the battery to the charger.
`Circuit 80 includes a MOS transistor 70 embedding the body
`diode 72. The MOS transistor 70 is driven by the comparator
`66. The comparator 66 is designed to have a definitely
`positive offset, as provided by bias Source 68. AS long as the
`voltage on the MOS drain is negative with the respect to its
`Source, the output of the comparator 66 goes high and the
`MOS transistor 70 turns OFF. When the MOS drain voltage
`exceeds the offset, the output of the comparator 66 goes low
`and the MOS transistor 70 turns ON. As the result, the circuit
`80 behaves like a diode with very low forward voltage drop.
`The power supply system shown in FIG. 4 limits the total
`output current of the buck converter. Since the buck con
`verter output voltage depends on the battery Voltage, in the
`case of a fully discharged battery, this output current limiting
`method forces the buck converter to deliver a lower power
`than its rating. Accordingly, another Solution is to control
`and to limit the buck converter output power, in addition to
`control of the parameters shown in FIG. 4. FIG. 5 shows a
`system32" similar to the one in FIG. 4, but with an additional
`power limiting loop. The Voltage drop acroSS the Sense
`resistor 26, proportional to the total output current I, is
`applied both to the output current Sense amplifier 62 and to
`the multiplier 82. Through the second connection to the
`multiplier Senses also the output voltage V. By multiply
`ing the total output current value by the output Voltage value,
`the multiplier82 provides at its output a voltage PWR OUT
`proportional to the output power. AS for the other loops, the
`PWR OUT Voltage is compared by the comparator 84 with
`the set limit. The amplified error drives the Pulse Width
`Modulator 38, through the diode 86. The function of this
`diode is similar with the one of the other diodes 20, 52, 54,
`as described above in reference to FIG. 4.
`An illustrative circuit 82 for multiplying the buck con
`verter output current and voltage values is shown in FIG. 6.
`The Voltage drop across the Sense resistor 26 is applied to the
`transconductance amplifier 88. This provides a current,
`KXI, which is proportional with the Voltage drop, there
`fore with the total output current. The MOS transistor 90
`
`Fundamental Ex 2008-16
`LG v Fundamental
`IPR2018-00460
`
`

`

`7
`chops this current by the same duty cycle as the buck
`converter. To that end, the duty Signal is Supplied to the
`control line of transistor 90. The resulting current is inte
`grated by the integrating circuit built around the operational
`amplifier 92 using the integrative RC group 94. The inte
`grator 92 output voltage will be proportional with the total
`output power of the buck converter.
`Another illustrative circuit 82" for multiplying the output
`current and the output voltage values is shown in the FIG.
`7. This circuit is based on a well-known property of an
`amplifying differential Stage. The output Voltage of Such a
`Stage is roughly proportional to the product of the common
`Source current, I=kXV, and the differential input Voltage.
`The differential amplifier stage shown in the FIG. 7 includes
`common-source transistors 98 and 100 each tied to reference
`Voltage V. The differential input is connected to the total
`current Sense resistor 26. Therefore, the output voltage,
`provided by amplifier 96, will be proportional to the buck
`converter output power.
`Thus, it is apparent that there has been provided a buffer
`battery power Supply circuit that Satisfies the objectives Set
`forth herein. Those skilled in the art will recognize that the
`present invention is Subject to modification and/or
`alterations, all of which are deemed within the Scope of the
`present invention, as defined in the appending claims.
`For example, although the preferred embodiments shown
`in FIG. 4 and 5 specifically mention the use of a controlled
`buck converter circuit, those skilled in the art will recognize
`that the buck converter circuit can be replaced with other
`controllable power Supplies known in the art, including, for
`example, boost, buck-boost, and other Similar circuit topolo
`gies. Such topologies may also be derived from frequency
`width modulation (FWM) circuitry and or other Switching
`topologies.
`Other modifications are possible. For example, the diodes
`50, 52, 54, and 56 can equally be replaced with other reverse
`bias Switches known in the art, including for example,
`biased transistor circuits.
`The topologies disclosed in FIGS. 3-7 provide control
`over charging and discharging conditions at node 25. In the
`case where Lithium Ion and NiMH batteries are employed,
`Several conditions may exist which would require further
`control over the battery charging and discharging.
`FIG. 8 depicts a conventional power Supply topology 200
`which controllably delivers current to both the load 24 and
`the battery 18, via Switch 204. In this topology, Switch 204
`is controlled via comparator 206, which compares node
`voltage 25 to a battery maximum threshold voltage, Vbatt
`max. Once the battery is greater than (or equal to) the
`threshold Voltage, the Switch Stops conducting and power to
`the load is Supplied entirely by the battery via a discharge
`current. In this topology, the Source (Supply) is chosen as a
`conventional current limited power source 202, which is
`capable of clamping current Supplied to the System or
`battery (or both) regardless of the draw required by these
`components. Note that in this topology, a PWM power
`Source is not required since the output of the Source is
`dependant only on the draw requirements of the battery and
`System (not using feedback). Also, Since the conduction State
`of the Switch 204 is dependent on the voltage condition of
`the battery 206, the internal resistance of the battery will
`cause the Voltage to drop once the Switch closes, thereby
`decreasing the Voltage at node 25 below the minimum
`threshold and opening the Switch again. This oscillation will
`continue whenever a power Supply is present. AS with most
`System components, including cell phones, the System
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`15
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`25
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`35
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`40
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`45
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`50
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`55
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`60
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`65
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`US 6,326,771 B1
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`8
`requires a minimum Voltage before the System is activated.
`Thus, if the battery cannot supply this voltage, source 200 is
`required. However, a drawback to this topology depicted in
`FIG. 8 is if the battery is in a deeply discharged state (i.e.,
`unable to Supply a minimum system voltage Vsys min),
`then the external power Source (if connected) will only
`Supply power to the battery for charging, not to the System
`for use.
`FIG. 9 is a circuit topology according to the present
`invention which Solves the shortcomings of the topology
`disclosed in FIG.8. For FIG. 9, it is assumed that the power
`Source 202 is similar to the current limited Source of FIG. 8.
`In this example, a battery Switch circuit 210 is provided
`between node 25 and the battery 18 that operates to decouple
`the battery from the system 24 when the battery is in a
`deeply discharged State, while simultaneously permitting a
`trickle charge current to reach the battery from the Source,
`thus slowly charging the battery, while permitting the Source
`202 to power the System. AS is understood in the art, a deeply
`discharged LiIon or NiMH battery cannot take a large
`current fast charge once