Universal Serial Bus Specification Revision 2.0
`
`downstream facing ports and hubs (continued)
`transceivers, 7.1, 7.1.7.1, 7.1.7.2
`downstream facing transceivers, high-speed
`signaling and, 7, 7.1
`downstream packets (HSD1), 8.5, 11.15
`drain wires, 6.5.2, 6.6.1, 6.6.2
`dribble, defined, 7.1.9.1
`drift, 5.12.1, 5.12.3
`driver characteristics
`
`full-speed driver characteristics, 7.1 .1 .1
`full—speed source electrical characteristics.
`7.3.2 Table 7-9
`
`hig h-speed driver characteristics, 7.1.1.3
`hig h—speed source electrical characteristics,
`7.3.2 Table 7-8
`
`low-speed driver characteristics, 7.1.1.2, 7.1
`Table 7-1
`
`low-speed source electrical characteristics,
`7.3.2 Table 7-10
`overview, 7.1.1
`drivers
`
`defined, 2.0 glossary
`role in configuration, 10.3.1
`in source-to-sink connectivity, 5.12.4.4
`droop, 7.2.3, 7.2.4.1
`dual pin-type receptacles, 6.9
`durability standards, 6.7 Table 6—7
`DWORD, defined, 2.0 glossary
`dynamic insertion and removal, 9.2.1
`attaching devices, 4.6.1
`defined, 2.0 glossary
`detecting insertion and removal, 4.9, 9.2.1
`Hub Repeater responsibilities, 11.1
`hub support for, 11.1
`power control, 7.2.3, 7.2.4 to 7.2.42
`power-on and connection events timing,
`7.1.7.3
`
`removing devices, 4.6.2
`USB robustness and, 4.5
`
`E E
`
`field (End), 8.4.2.2
`E2PROM defined, 2.0 glossary
`ease-of-use considerations, 1.1
`EBErnptied signallevent, 11.7.1.4 Table ”-10
`edges of signals
`cable delay, 7.1.16
`data source jitter, 7.1.13.1.1
`edge transition density, 8.2
`optional edge rate control capacitors, 7.1.6.1
`EEPROM, defined, 2.0 glossary
`elasticity buffer, 11.7.1.3
`Electrical Connector/Socket Test Procedures,
`6.7.1
`
`Electrically Erasable Programmable Read Only
`Memory (EEPROM), 2.0 glossary
`
`dimensional inspection standards. 6.7 Table 6-7
`Direction bit, 9.3.1, 9.3.4
`direction of communication flow, 5.4
`meequestType field, 9.3.1
`bulk transfers, 5.8.2
`bus protocol overview, 4.4
`control transfers, 5.5.2
`interrupt transfers, 5.7.2
`isochronous transfers, 5.6.2
`disabled ports, 11.5, 11.5.1.4, 11.24.2.7.1,
`11.24.2.7.2
`
`Disabled state. 11.5. 11.5.1.4
`disabling features. 9.4.1
`discarding packets, 11.3.2
`Disconnect_Detect signallevent, 11.5.2, 11.5
`Table 11-5
`Disconnected state
`
`connect and disconnect signaling, 7.1.7.3
`detecting, 7.1, 7.1.4.2, 7.1.20
`downstream ports, 11.5, 11.5.1.3
`signaling levels and, 7.1 .7.1, 7.1 .7.2
`disconnecting devices. See dynamic insertion
`and removal
`
`disconnection envelope detectors, 7.1.7.3, 7.1
`Table 7—1
`
`disconnect timer, 11.5.2
`distortion, minimizing in SOP, 7.1.7.4.1
`DLL lock, 7.1
`documents, applicable standards, 6.7.1
`down counters in hub timing, 11.2.3.1
`downstream facing ports and hubs
`Disconnect state detection, 7.1
`downstream connectivity defined, 11.1.2.1
`downstream defined, 2.0 glossary
`downstream facing port state machine, 11.5
`downstream plugs, 6.2
`downstream ports defined, 4.8.2.1
`driver speed and, 7.1.2.3
`enumeration handling, 11.126
`highaspeed driver characteristics and, 7.1.1.3
`high-speed signaling and, 7.1.7.6.1, 7.1.7.6.2,
`11.1.1
`in hub architecture, 11.1.1
`hub delay, 7.3.3 Figure 7-52
`hub descriptors, 11.23.21
`hub EDP delay and EOP skew, 7.3.3 Figure
`7-53
`
`input capacitance, 7.1.6.1
`jitter, 7.3.2 Table 7—10
`multiple Transaction Translators, 11.14.1.3
`port state descriptions, 115.1 to 11.5.1.14
`reset state machines, C.1
`signaling delays, 7.1.14.1
`signaling speeds, 7.1
`status changes, 11.12.6
`test mode support, 7.1.20
`
`584
`
`ZTE/SAMSUNG 1008-0612
`ZTE/SAMSUNG 1008—061 2
`IPR2018-00110
`|PR2018-00110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`endpoints (continued)
`explicit feedback endpoints, 9.6.5, 9.6.6
`getting endpoint status. 9.4.5
`hig h-bandwidth endpoints, 2.0 glossary, 5.7.4
`high-speed signaling attributes, 9.6.6
`Hub Controller endpoint organization. 11.121
`in interfaces, 9.2.3, 9.6.3. 9.6.5
`logical devices as collections of endpoints, 5.3
`message pipes and. 5.3.2.2
`non-endpoint zero requirements. 5.3.1.2
`number matching, 9.6.6
`overview, 5.3.1
`pipes and, 4.4, 5.3.2
`programmable data rates. 2.0 glossary
`reflected endpoint status. 10.5.2.2
`role in data transfers. 4.7
`samples. 2.0 glossary
`specifying in windex field. 9.3.4
`state machines. 8.5
`stream pipes and, 5.3.2.1
`synchronization frame, 9.4.11
`Transfer Types, Synchronization Types. and
`Usage Types, 9.6.6
`endpoint synchronization type. 5.12.4. 5.12.4.1
`Endpoint Type field (ET), 8.4.2.2
`endpoint type field (ET), 8.4.2.2
`endpoint zero
`Default Control Pipe and, 5.3.2
`in device characteristics, 4.8.1
`non-endpoint zero requirements, 5.3.1.2
`requirements. 5.3.1.1
`end-to-end signal delay. 7.1.19 to 7.1.19.2
`end users. 20 glossary, 3.3
`entering test mode. 7.1.20
`entry points into state machines, 8.5
`enumeration. See bus enumeration
`
`envelope detectors. 2.0 glossary. 7.1, 7.1.4.2.
`7.1.7.3. 7.1 Table 7—1
`environmental characteristics for cables, 6.6.4
`environmental compliance standards. 6.7
`EOF1 or EOF2 signallevent
`frame and microframe timers. 11.2.3.2, 11.2.5
`to 11.2.5.2
`
`host behavior at end-of~frame. 11.3
`in Hub Repeater state machine, 11.7.2.3
`Table 1 1-11
`
`in transmitter state machine. 11.6.4 Table 11-
`9
`
`Electrical Performance Properties of lnsulaflon
`and Jacket for Telecommunication l/In're
`and Cable. 6.7.1
`electrical specifications. 6.1, 7
`applicable documents. 6.7.1
`bus timinglelectrical characteristics. 7.3.2
`cables. 6.3, 6.4 to 6.4.4, 6.6 to 6.6.5
`connectors. 6.2, 6.5 to 6.5.4.3
`overview, 4.2.1, 6
`PCB reference drawings, 6.9
`physical layer specifications. 7.3 to 7.3.3
`power distribution, 7.2 to 7.2.1.5. 7.2.3, 7.2.4
`to 7.2.4.2
`
`signaling, 7.1 to 7.1.20
`standards for, 6.7, 7.3.1
`timing waveforms. 7.3.3
`USB grounding. 6.8
`embedded hubs, 4.8.2.2. 5.2.3
`EMI. USB grounding and, 6.8
`enabled ports
`connectivity and. 11.1.2.1
`downstream ports, 11.5. 11.5.1.6
`getting port status, 11.24.2.7.1
`PORT_ENABLE bit, 11.24.2712
`port status change bits. 11.24.2.7.2
`Enabled state, 11.5, 11.5.1.6
`Enable Transmit state, 11.7.1 .43
`encoding data, 7.1.8. 11.184
`"end" encoding. 11.184
`End field (E), 8.4.2.2
`End-of—Frame {EOF). See EOFs
`End of High-speed Packet (HSEOP), 7.1.7.2,
`7.1.7.4.2
`
`End-of—Packet (EOP). See EOPs
`End-of—Packet bus state, 7.1.7.1, 7.1.7.2,
`7.1.7.4.1, 7.1.7.4.2
`end-of-packet delimiter. See EOPs
`ENDP field, 8.3.2.2, 8.3.5.1, 8.4.1
`endpoint addresses, 2.0 glossary, 5.3.1, 9.6.6
`ENDPOINT descriptor, 9.4 Table 9-5
`endpoint descriptors. 9.4.3. 9.6.1, 9.6.5, 9.6.6
`endpoint direction, defined, 2.0 glossary
`endpoint field (ENDP). 8.3.2.2, 8.3.5.1, 8.4.1
`ENDPOINT‘HALT. 9.4 Table 9-6
`endpoint numbers, 2.0 glossary, 5.3.1
`endpoints
`addresses, 9.6.6
`characteristics. 5.3.1
`description in descriptors, 9.4.3. 9.6.1, 9.6.5,
`9.6.6
`in device class definitions, 9.7.2
`direction of flow, 5.3.1
`endpoint address field, 8.3.2.2
`endpoint aliasing, 8.3.2
`endpoint zero requirements, 4.8.1. 5.3.1.1.
`5.31.2, 5.32
`
`585
`
`ZTE/SAMSUNG 1008-0613
`ZTE/SAMSUNG 1008-0613
`IPR2018-00110
`|PR2018-OO110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`EOFs
`
`advancing, 112.32
`defined, 2.0 glossary
`in frame and microframe timer
`
`synchronization, 11.2.3.2
`host behavior at end—ofsframe, 11.3 to 11.3.3
`Host Controller frame and microframe
`generation, 10.2.3
`in transaction completion prediction, 11.3.3
`EOI signallevent
`defined. 11.7.1.4 Table 11-10
`in downstream port state machine, 11.5 Table
`11-5
`
`in internal port state machine, 11.4
`in receiver state machine, 11.6.3 Table 11«8
`in transmitter state machine, 11.6.4
`EOP bus state, 7.1.7.1, 7.1.7.2, 7.1.7.4.1,
`7.1.14.2
`
`EOPs
`
`defined, 2.0 glossary
`differential-to—EOP transition skew and EOP
`width, 7.3.3 Figure 7~50
`EOP delimiter, 8.3
`EOP dribble defined, 11.7.1.1
`EOP width, 7.1.13.2 to 11.13.22, 13.3 Figure
`7-50
`
`error detection through bus turn-around
`timing, 8.12
`extra bits and, 11.9, 11.9.1
`false EOPs, 2.0 glossary, 8.13, 11.15
`handshake packets and, 8.4.5
`high—speed signaling and, 7.1
`hub EOP delay and EOP skew, 13.3 Figure
`7-53
`
`hublrepeater electrical characteristics, 13.2
`Table 7—1 1
`
`hub signaling at EOF1, 11.3.1
`intervals between IN token and EOP, 11.3.3
`propagation delays, 7.1.14.1
`EOR signallevent, 11.6.3 Table 11-8
`equations
`buffering for rate matching, 5.12.8
`buffer sizes in functions and software, 5.11.4
`bus transaction times, 5.11.3
`ERR handshake
`
`interrupt transactions, 11 20.4
`isochronous transactions, 11.21 .1, 1121.4
`Transaction Translator response generation,
`1118.5
`
`error detection and handling. See also corrupted
`transfers and requests
`"3 strikes and you're out" mechanism, 11.111
`babble and loss of activity recovery, 8.14
`bit stuff violations, 8.7.1
`bulk transfers and, 5.8.5, 8.5.2
`
`586
`
`error detection and handling. (Continued)
`bus turn-around timing, 8.7.2
`busy (readylx) state, 1 1 .115
`control transfers and, 5.5.5, 8.5.3.1
`corrupted ACK handshake, 8.5.3.3, 8.6.4
`corrupted 80F packets in isochronous
`transfers, 5.12.6
`CRCs, 8.3.5, 8.11, 11.15, 1120.3, 1120.4,
`11.21.13, 1121.4
`data corrupted or not accepted, 8.6.3
`error count tally, 10.2.6, 11.111
`error handling for transfers, 5.4
`error handling on last data transaction, 8.5.3.3
`false EOPs, 2.0 glossary, 8.13
`HC_Data_or__error state machine, 1120.2
`high bandwidth transactions, 5.9.2
`Host Controller role in, 102.6
`Hub Repeater responsibilities, 11.1
`hub role in, 11.1.2.3
`interrupt transfers and, 5.7.5
`isochronous transfers and, 5.6.4, 5.6.5, 5.12.7
`notation for error cases, 11.15
`overview, 8.7
`packet error categories, 8.7.1
`periodic transactions, 11.1 8.4
`PID check bits, 8.11
`Port Error conditions, 11.8.1
`port indicators, 11.5.3 to 11.5.3.1
`Request Errors, 9.2.7
`sample size and, 5.12.8
`short packets and error conditions, 5.3.2
`split transaction sequencing, 1121.3
`status values for, 11.15
`synchronous data connectivity, 5.12.4.42
`timeouts, 8.7.2, 11.111
`Transaction Translator error handling, 11.22
`USBD role in, 10.5.4.4
`USB robustness and, 4.5.1, 4.5.2
`ERR PID, 8.3.1 Table 8—1, 8.4.5
`ESD, USB grounding and, 6.8
`ET field (Endpoint Type), 8.4.2.2
`event notificatiOns, USBD and, 10.5.4.3
`example declarations in state machines, 3.1.
`B2, 3.3
`exception handling. See error detection and
`handling
`Exception Window, 7.1.6.2
`exiting test mode, 7.1.20
`exit points from state machines. 8.5
`explicit feedback endpoints, 9.6.5, 9.6.6
`extended descriptor definitions, 9.11
`extensibility of USB architecture, 4.10
`extension cable assemblies, 6.4.4
`externally-powered hubs, 7.2.1. See also self-
`powered hubs
`extraction foroe standards, 6.7 Table 6-7
`
`ZTE/SAMSUNG 1008-0614
`ZTE/SAMSUNG 1008—061 4
`IPR2018-00110
`|PR2018-001 1O
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`frame and microframe numbers
`
`buffering for rate matching, 5.12.8
`frame and microframe number field, 8.4.3
`frame number field. 8.3.3
`frame numbers, 8.3.3
`generating frames and microframes, 10.2.3
`illustrated, 8.4.3.1
`SOF tracking, 5.12.6
`frame and microframe timers
`frame wander, 11.2.5.2
`hub frame timer, 11.2 to 11.2.5.2
`timing skew, 11.2.5.1 to 11.2.5.2
`TT loss of synchronization, 11.22.1
`frame clocks, 5.12.3, 512.412, 11.183
`frame pattern, defined, 2.0 glossary
`frames and microframes. See also frame and
`microframe timers
`
`allocating bandwidth, 4.75, 5.11.1 to 5.11.1.5,
`10.3.2
`available time in frames and microframes,
`5.5.4, 5.6, 5.6.4, 5.7.4, 5.8.4, 5.11.5
`babble and loss of activity recovery, 8.7.4
`bandwidth reclamation. 5.11.5
`best case full-speed budgets, 1118.1, 11.1 8.4
`bit time zero, 11.3
`clock tracking and microframe SOFs,
`5.12.412
`
`control transfer reserved portions, 5.5.4
`data prebuffering and, 5.12.5
`defined, 2.0 glossary, 5.3.3
`error handling in transfers, 5.12.7
`frame and microframe intervals, 7.1.12, 7.32
`Table 7—8, 7.3.2 Table 7-9, 7.3.2 Table
`7—1'0
`
`frame and microframe numbers (See frame
`and microframe numbers}
`frame and microframe timer ranges, 11.21 to
`11.2.2
`
`frame wander, defined, 11.2.5.2
`generation role of Host Controller, 10.2.3
`generation role of Transaction Translator,
`11.18.3
`host behavior at end-of-frame, 11.3
`interrupt transfer limitations, 5.7.4
`isochronous transactions, 5.6.3, 5.6.4,
`5.12.4.2, 8.5.5
`jitter, 11.2.4
`maximum allowable transactions, 5.4.1,
`11.18.63
`
`microframe numbers, 8.4.3.1
`
`eye pattern templates
`defined, 2.0 glossary
`error rates and jitter tolerance, 7.1.14.2,
`7.1.15.2
`
`hig h-speed receiver characteristics and,
`7.1.4.2
`overview, 7.1.2.2
`transmit eye patterns, 7.1, 7.1.2
`
`F f
`
`ailed data transactions, 8.6.3
`false EOPs, 2.0 glossary, 8.7.3, 11.15
`fault detection. See error detection and handling
`features
`hub class feature selectors, 11.242
`SetFeatureO request. 9.4.9
`setting hub features, 11.24.2.12
`standard feature selectors, 9.4 Table 9-6
`feedback endpoints, 9.6.6
`feedback for isochronous transfers, 5.12.4.2,
`5.12.4.3, 9.6.5
`ferrite beads, 7.1.6.2
`fields. See names of specific fields
`flammability
`cables, 6.6.4
`Series "A" and Series "B" plugs, 6.5.4.1
`Series "A" and Series "B" receptacles. 6.5.3.1
`standards, 6.7 Table 6-7
`flexibility of USB devices, 3.3
`flow control mechanisms
`
`in bus protocol overview, 4.4
`handshake packets and, 8.4.5
`non-periodic transactions, 11.14.2.2
`USB robustness and, 4.5
`flow sequences
`non-periodic transactions, 11.17 to 11.175
`periodic transactions, 11.1810 11.188, 11.20
`8:11.204, 1121.1
`split transaction notation for, 11.15
`flyback voltage, 7.2.4.2
`format of USB device requests, 9.3
`formulas
`
`buffering for rate matching, 5.12.8
`buffer sizes in functions and software, 5.11.4
`bus transaction times, 5.11.3
`frame and microframe intervals
`
`full-speed source electrical characteristics,
`7.3.2 Table 7~9
`
`high-speed source electrical characteristics,
`7.3.2 Table 7—8
`
`low-speed source electrical characteristics,
`7.3.2 Table 7—10
`
`repeatability, 7.1.12
`
`587
`
`ZTE/SAMSUNG 1008-0615
`ZTE/SAMSUNG 1008—061 5
`IPR2018-00110
`|PR2018-00110
`
`

`

`Universal Serial Bus Specification Revision 2.1]
`
`full-speed functions and hubs (Continued)
`sampling rates. 5.12.4.2
`signal termination. 7.1.5.1
`SOF PID and. 8.4.3
`speed detection and. 11.8.2
`Transmit state and. 11.5.1.7
`full-speed signaling
`babble and loss of activity recovery. 8.7.4
`best case full—speed budgets, 1118.1. 11.184
`bus transactions and. 4.4
`calculating transaction times. 5.11.3
`data rates, 42.1
`data signaling overview. 7.1.7.4.1
`data source jitter. 7.1.13.1.1
`defined. 2.0 glossary
`differential receivers. 7.1 Table 7—1
`downstream and upstream facing ports. 7.1
`driver characteristics, 7.1.1
`driver requirements, 7.1.2.3
`endpoint zero requirements, 5.3.1.1
`EOF timing points. 11.2.5.2
`EOP width. 7.1.13.2.1
`errors. 8.8.4
`frame timer ranges. 11.2.2
`full-speed loads. 7.12.1
`hig h~speed devices operating at full-speed.
`5.3.1.1
`host behavior at end-of-frame. 11.3 to 11 .3.3
`hub class descriptors and. 1123.1
`intervals between IN token and EOP. 11.3.3
`isochronous transaction limits. 58.3
`J and K states. 7.1.7.1
`jitter budget table. 7.1.15.1
`propagation delays, 7.1.14.1
`receiver characteristics. 7.1.4.1
`reset signaling. 7.1.7.5
`sampling rates. 5.12.4.2
`scheduling. 11.1423
`speed detection. 9.1 .13
`Transaction Translator and. 4.8.2.1. 11.183.
`11.185
`
`Full Suspend (Fsus) state. 11.4. 11.4.3
`function address field (ADDR). 8.3.2.1. 8.4.2.2
`functional stall. 8.4.5. 8.5.3.4
`Function layer
`detailed communication flow. 5.3
`illustrated. 5.1
`interlayer communications model. 10.1.1
`
`frames and microframes (Continued)
`microframe pipelines
`buffer space. 11.19
`clearing and aborting transactions, 11.186
`defined. 11.182
`periodic split transactions. 11.1421. 11.18
`resetting. 11242.9
`transaction tracking, 11.18.7
`multiple transactions. 5.8.4. 5.7.4. 5.9, 5.92.
`9.8.8
`
`organization of transactions within, 5.11.2
`overview. 8.4.3.1
`samples per frame in isochronous transfers.
`5.12.4.2
`
`SOF packets, 8.4.3
`SOF tracking. 5.12.6
`split transactions and. 5.10
`synch frame requests. 9.4.11
`timers, 11.2 to 11.2.52
`timer synchronization. 11.2.3 to 11.2.3.3,
`1122.1
`
`toggle sequencing. 8.5.5
`zeroth microframe. 9.4.11, 11.14.2.3
`freeing pending start-splits. 11.18.82
`frequency-locked clocks. 5.12.3
`Fs. See SRC
`
`Fsus state. 11.4. 11.4.3
`full-duplex, defined. 2.0 glossary
`full-«speed buffers. 7.1.2.1
`full-speed cables. See hig h-lfull—speed cables
`full-speed driver characteristics. 7.1.1.1. 7.1
`Table 7—‘l
`
`full-speed functions and hubs
`bulk transfers and. 5.8.4
`cable and resistor connections, 7.1.5.1
`connect detection. 7.1.7.3
`control transfers and. 5.5.3. 5.5.4. 5.54 Table
`5—2
`
`data-rate tolerance. 7.1.11
`defined. 20 glossary
`detachable cables and, 6.4.1
`full-speed port transceiver, 7.1.7.1
`full-speed source electrical characteristics.
`7.32 Table 7-9
`
`full— vs. low-speed port behavior. 11.8.4
`getting port status. 11242.7.1
`hublrepeater electrical characteristics. 7.3.2
`Table 7—1 1
`
`hub support for. 11.1
`input capacitance, 7.1.6.1
`interrupt transfers and. 5.7.3. 5.7.4 Table 5-7
`isochronous transfers and. 58.4
`maximum data payload. 8.4.4
`optional endpoints. 5.3.1.2
`in physical bus topology. 5.2.3
`reset states and. C22
`
`588
`
`ZTE/SAMSUNG 1008-0616
`ZTE/SAMSUNG 1008-0616
`IPR2018-00110
`|PR2018-OO110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`types of devices
`compound devices. 4.8.2.2
`functions. 4.8.2.2
`mapping physical and virtual devices.
`5.12.4.4
`
`virtual devices. 2.0 glossary
`in USB topology, 4.1.1.2. 5.2.2. 5.2.3. 9.0
`function-to-host transfers. See IN PID
`
`G g
`
`ang-mode power control. 11.23.21
`garbling messages in Collision conditions. 11.8.3
`Generate End of Packet Towards Upstream Port
`state (GEOPTU), 11.6.4. 11.6.4.5
`Generate Resume state. 11.4. 11.4.4
`generic USB device operations. 9.2 to 9.2.7
`GEOPTU state. 11.6.4. 11.6.4.5
`GetConfigurationO request.
`GET_CONF|GURATION
`hub requests. 11.241
`overview. 9.4.2
`returning interface descriptors. 9.6.5
`standard device request codes. 9.4
`GetDescriptorO request. GET_DESCR|PTOR.
`11.23.1
`
`device_qualifer descriptors. 9.6.2
`endpoint descriptors. 9.6.6
`GetDescriptor(CONFIGURATION} request.
`9.5. 9.6.6
`GetH ubDescriptorO request, 11.24.25
`hub class requests. 1124.2
`hub descriptors. 11.24.25
`hub requests. 11.24.1
`interface descriptors, 9.6.5
`other_speed_configuration descriptors. 9.6.4
`overview, 9.4.3
`standard device request codes. 9.4
`GetHubDescriptorO request. 11.242, 11.24.25
`GetHubStatusO request, 1124.2, 11.24.26
`GetlnterfaceO request. GET_INTERFACE
`alternate settings for interfaces. 9.2.3
`hub requests. 11.24.1
`interface descriptors. 9.6.5
`overview, 9.4.4
`standard device request codes. 9.4
`GetPortStatusO request
`class-specific requests, 1124.2
`overview. 11.24.27 to 11.24.2725
`PORT_[NDICATOR. 11.24.271.10
`during test mode, 11.24.213
`GET_STATE. 11.242
`
`functions. See also devices; full-speed functions
`and hubs; high-speed functions and hubs;
`low—speed functions and hubs
`address assignment. 9.1.2. 9.2.2
`characteristics and configuration (See also
`device descriptors)
`configuration. 4.8.2.2. 923
`data-rate tolerance, 7.1.11
`descriptors, 9.5 to 9.7.3. 9.6.1
`device characteristics, 4.8.1
`device classes, 4.8. 9.7
`device speed. 7.1.7.3, 11.8.2
`host role in configuration, 10.3.1
`optional endpoints, 5.3.1.2
`data transfer
`
`communication flow requirements, 53
`control transfers and, 55
`detailed communication flow illustrated, 5.3
`differing bus access for transfers, 5.11
`jitter budget table, 7.1.15.1
`overview, 9.2.4
`PING flow control and OUT transactions,
`8.5.1. 8.5.1.1
`response to IN transactions. 8.4.6.1
`response to OUT transactions. 8.4.6.3
`response to SETUP transactions. 8.4.6.4
`role in bulk transfers. 8.5.2
`device event timings, 7.32 Table 7~14
`devices defined, 2.0 glossary
`dynamic attach and detach. 9.2.1
`power distribution. 7.2.4 to 7.2.4.2
`removing. 10.5.26. 10.5.4.1.4
`USB mechanisms. 10.5.2.5, 10.5.2.6
`generic USB device operations, 9.2 to 9.2.7
`overview. 4.8.22
`power distribution, 7.2.1. 9.2.5
`bus-powered devices. 4.3.1. 7.2.1.1
`dynamic attach and detach. 7.2.4 to 7.2.4.2
`high-power bus-powered functions. 7.2.1.4
`low—power bus—powered functions. 7.2.1.3
`power supply and, 4.3.1
`self-powered functions, 7.21.2. 7.2.1.5
`suspendlresume conditions. 7.2.3
`voltage drop budget. 7.2.2
`requests
`host communication with, 10.1.1
`request errors. 9.2.7
`request processing. 9.26 to 9.2.6.6
`standard device requests, 9.4 to 9.4.11
`USB device requests. 93 to 9.3.5
`status. 9.1 to 9.1.2. 9.4.5
`
`589
`
`ZTE/SAMSUNG 1008-0617
`ZTE/SAMSUNG 1008-0617
`IPR2018-00110
`|PR201 8-001 10
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`handshakes (Continued)
`overview, 8.3.1 Table 8-1, 8.4.5
`packet field formats, 8.3 to 8.3.5.2
`PING flow control and OUT transactions,
`8.5.1, 8.5.1.1
`STALL PlD, 8.3.1 Table 8—1
`total allocati0n of bit times, 11.3.3
`transaction notation for, 11.15
`hardwired cable assemblies, 6.4.2
`HCD (Host Controller Driver)
`defined, 2.0 glossary, 5.3
`HCDI (Host Controller Driver Interface),
`10.1.1, 104
`overview, 10.4
`software interface overview, 10.3
`in transfer management, 5.11.1, 5.11.1.3
`in USB topology, 52.1, 10.1.1
`HC_Data__or_error state machine, 1120.2
`HCDI (Host Controller Driver Interface), 10.1.1,
`10.4
`
`HC_Do_BCINTl state machine, 8.5.2 Figure 8-
`33
`
`HC_Do_BCINTO state machine, 8.5.2 Figure 8-
`31
`
`HC_Do_BICS state machine, 11.172
`HCHDowBISS state machine, 11.17.2
`HC_Do__BOCS state machine, 11.172
`HC_Do_BOSS state machine, 11.172
`HC_Do_complete state machine, 11.16.1.12
`HC_Do_lnthS state machine, 1120.2
`HC_Do_lntlSS state machine, 11.202
`HC_Do_intOCS state machine, 1120.2
`HC_DomlntOSS state machine, 1120.2
`HC_Do__lsocthS state machine, 1121.2
`HC_Do_lsochiSS state machine, 1121.2
`HC_Do_lsochl state machine, 8.5.5 Figure 8-42
`HC_Do_lsochOSS state machine, 1121.2
`HC_Do_lsochO state machine, 8.5.5 Figure 8—40
`HCdDounonsplit state machine, 8.5 Figure 8-26
`HC_Do_Statt state machine, 11.16.1.1.1
`HC_HS_BCO state machine, 8.5.1 Figure 8-27
`HC_Process_command state machine,
`11.16.1.1
`
`HEOP signallevent, 11.6.4 Table l‘l-Q, 11.7.2.1,
`11.7.2.3 Table ‘l‘l-‘l‘l
`hierarchical state machines, 8.5. 11.15
`high-bandwidth endpoints, 2.0 glossary, 5.7.4,
`5.9to 5.92, 5.12.3
`high-bandwidth transactions, 5.127, 85.5
`
`GetStatusO request, GET_STATUS
`GetHubStatusO request, 11.24.26
`GetPortStatusO request, 11.24.27
`hub class requests, 1124.2
`overview, 9.4.5
`PORT, 11.126
`standard device request codes, 9.4
`GetTTStateO request, GET_TT_STATE
`hub class requests, 1124.2
`overview, 11.24.28
`STOP_TT, 11.242.11
`global declarations in state machines, B.1
`global resumes
`frame and microframe timer synchronization,
`11.2.3.3
`
`hub support, 11.9
`signaling, 7.1.7.7
`global suspend, 7.1.7.6.1, 11.9
`glossary, 2.0
`GND leads
`cable electrical characteristics, 7.3.2 Table 7-
`i2
`
`captive cable assemblies, 6.4.2, 6.4.3
`detachable cables, 6.4.1
`electrical specifications overview, 4.2.1
`standardized contact terminating
`assignments, 6.5.2
`GResume state, 11.4, 11.4.4
`grounding, 6.8
`
`H h
`
`ailed pipes, 10.5.2.2
`Hall feature
`bulk transfers, 5.8.5
`control transfers, 5.5.5, 8.5.3.4
`functional stalls, 8.4.5
`GetStatusO request, 9.4.5
`interrupt transfers, 5.7.5, 8.5.4
`isochronous transfers, 5.6.5
`responses to standard device requests, 9.4
`handshakes. See also ACKs; NAKs; STALLs
`ACK PID. 8.31 Table 8-1
`bulk transfers, 8.52
`bus protocol overview, 4.4
`defined, 2.0 glossary
`detection handshakes, 7.1.7.5, 7.1.7.6
`function response to IN transactions, 8.4.6.1
`function response to OUT transactions,
`8.46.3
`
`function response to SETUP transactions,
`8.4.6.4
`
`handshake responses, 8.4.6 to 8.4.6.4
`host response to IN transactions, 8.46.2
`isochronous transfers, 5.6.5, 5.12.7
`NAK PID, 5.9.1, 83.1 Table 8—1', 8.5.1, 8.5.1.1
`NYET PID, 8.3.1 Table 8—1, 8.4.5, 8.5.1, 8.5.2
`
`590
`
`ZTE/SAMSUNG 1008-0618
`ZTE/SAMSUNG 1 008-0618
`IPR2018-00110
`|PR2018-00110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`high-lfull-speed cables
`cable delay. 7.1.16
`cable impedance tests. 6.7 Table 6-7
`captive cable assemblies. 6.4.2
`constructionI 6.6. 6.6.2
`description, 6.6.1
`listing. 6.6.5
`signal pair attenuation, 6.7 Table 5—7
`specifications. 6.3
`standards for, 6.6.3. 6.6.4. 6.7
`high-powered devices
`bus-powered functions, 7.2.1. 7.2.1.4
`high-pOWer ports. 7.2.1
`voltage dr0p budget, 7.2.2
`High-speed Detection Handshake. 7.1.7.5,
`7.1.7.6
`
`high-speed driver characteristics. 7.1 Table 7—1
`high-Speed functions and hubs
`in application space taxonomy, 3.2
`bulk transfers. 5.8.4
`connect detection. 7.1.7.3
`control transfers, 5.5.3. 5.5.4. 55.4 Table 53
`data signaling rates. 7.1.11
`defined. 2.0 glossary
`detachable cables, 6.4.1
`device_qualifier descriptors. 9.6.1. 9.6.2
`frame and microframe numbers. 8.4.3.1
`full-speed operation. 5.3.1.1
`getting port status. 11.24.2.7.1
`high-speed repeaters. 11.2.5. 11.7.2.1
`high-Speed source electrical characteristics.
`7.3.2 Table 7—8
`
`hubl'repeater electrical characteristics. 7.3.2
`Table 7—1 1
`
`input capacitance. 7.1.6.2
`interrupt transfers. 5.7.3. 5.7.4 Table 5-8
`isoch ronous transfers. 5.6.4
`maximum data payload. 8.4.4
`NAK mechanisms. 8.5.1. 8.5.1.1
`other_speed_configuration descriptors. 9.6.4
`performance. 1.1
`in physical bus topology, 5.2.3
`port selector state machine. 11.7.1.4 to
`11.71.44
`
`reset signaling. 7.1.7.5
`reset state machines. 0.2.3
`sampling rates, 5.12.4.2
`signal termination. 7.1
`SOF PID and. 8.4.3. 8.4.3.1
`speed detection and. 7.1.5.2. 11.8.2
`test mode support. 7.1.20
`high-speed port selector state machine, 11.7.1.4
`to 11.7.1.4.4
`
`high-speed signaling
`bit stuffing. 7.1.9.2
`bus transactions and. 4.4
`calculating transaction times. 5.11.3
`Chirp J and K states. 7.1.4.2. 7.1.7.2
`control transfers. 5.5.4
`current drivers. 7.1 Table 7—1
`data handling. 11.14.1.1
`data rates. 4.2.1
`data signaling overview. 7.1.7.4.2
`defined. 2.0 glossary
`Differential DlDifferential 1 bus states, 7.1.7.2
`differential data receivers. 7.1 Table 7-1
`"disallowed" situations. 7.1.2.3
`Disconnect state. 7.1.7.2
`downstream and upstream facing ports. 7.1
`driver characteristics. 7.1.1. 7.1.1.1. 7.1.1.3.
`7.1.2.3
`
`End of High-speed Packet (HSEOP). 7.1.7.2.
`7.1.7.4.2
`
`endpoints
`attributes. 9.6.6
`endpoint zero requirements. 5.3.1.1
`high-bandwidth endpoints. 2.0 glossary, 5.9
`to 5.9.2
`
`EOF timing points. 11.2.5.1
`EOP width. 7.1.13.2.2
`error detection. 8.7.3. 8.7.4
`error handling. 5.12.7. 8.6.4
`eye patterns. 7.1.2.2
`frame and microframe generation. 10.2.3
`full-speed signaling and. 5.3.1.1, 7.1.1.1
`high-speed devices Operating at full-speed.
`5.3.1.1
`hub architecture and. 11.1.1
`hub class descriptors and. 11.231
`Idle state. 7.1.7.2
`isochronous transaction limits. 5.6.3
`J and K states. 7.1.7.2. 7.1.7.4.2
`jitter. 7.1.13.1.2. 7.1.15.2
`microframes and. 5.3.3, 11.2.1
`overview. 7.1
`packet repeaters. 11.7.1 to 11.7.1.4.4
`PING flow control protocol and. 5.5.4, 5.8.4
`propagation delays. 7.1.14.2
`receiver characteristics. 7.1.4.2
`reset signaling. 7.1.7.5. 7.1.7.6
`resume signaling. 7.1.7.7. 11.9
`sampling rates. 5.12.4.2
`signaling levels. 7.1.7.2
`Split transactions. 5.10. 8.4.2 to 8.4.2.3
`
`591
`
`ZTE/SAMSUNG 1008-0619
`ZTE/SAMSUNG 1008-0619
`IPR2018-00110
`|PR2018-00110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`high-speed signaling (Continued)
`Squelch state, 7.1.7.2
`Start of High-speed Packet (HSSOP),
`7.1.7.4.2
`
`Start of high-speed Packet (HSSOP), 7.1 .7.2
`Suspended state and, 7.1.7.6, 11.9
`synch frame requests, 9.4.11
`timer range, 11.2.1
`toggle sequencing, 8.5.5
`Transaction Translator, 4.8.2.1, 11.1, 11.14 to
`11.14.23
`
`types of transactions, 11.17
`HJ signallevent, 11.6.3 Table 11-8
`HK signallevent, 11.6.3 Table 11-8
`host, 10
`in bus topology, 4.1.1.1, 5.2, 5.2.1
`collecting status and activity statistics, 10.1.4
`components, 10.1.1
`control mechanisms, 10.1.2
`EOF1 and EOF2 timing points. 11.2.5 to
`11.2.52
`host behavior at end-of-frame, 11.3 to
`11.3.3
`
`host-to-hub communications, 11.1
`resource management, 10.3.2
`responsibilities and capabilities, 10.1.1
`role in assigning addresses, 9.2.2
`role in configuration, 9.2.3, 10.3.1
`synchronizing hub (micro)frame timer to
`host (micro)frame period, 11.2
`data flow, 10.1.3
`common data definitions, 10.3.4
`data-rate tolerance, 7.1.11
`data transfer mechanisms, 10.1.3, 10.3.3
`detailed communication flow illustrated, 5.3
`host response to IN transactions, 8.4.6.2
`interlayer communications model, 10.1.1
`role in bulk transfers, 8.5.2
`defined, 2.0 glossary, 4.9
`electrical considerations, 10.1.5
`jitter budget table, 7.1.15.1
`over-current protection, 7.2.1 .2.1
`over-current recovery, 1 1 .12.5
`hardware and software, 10.0
`host accuracy variations, 11.2.1 to 11.2.2
`Host Controller Driver (HCD), 10.4 (See also
`HCD)
`Host Controller responsibilities, 4.9, 10.2 (See
`also Host Controller)
`host jitter, 11.2.1
`host tolerance. hub (micro)frame timer and,
`112
`
`operating system environment guides, 10.6
`overview of USB Host, 10.1 to 10.1.5
`power management overview, 4.3.2
`software mechanisms, 10.3 to 10.3.4
`
`592
`
`host (Continued)
`split transaction scheduling, 11.18.4
`state machines, 8.5.1, 8.5.2, 8.5.5
`status in USBD pipe state, 10.5.2.2
`turn-around timers, 8.7.2
`Universal Serial Bus Driver (USBD), 10.5 to
`10.5.5 (See also USBD (USB Driver»
`USB System Software responsibilities, 4.9
`(See also USB System Software)
`Host Controller, 4.9
`best case full-speed budgets, 11.181, 11.184
`in bus topology, 5.2.1
`calculating buffer sizes in functions and
`software, 5.11.4
`data transfer mechanisms, 10.1.3
`bulk transfers, 5.8.3, 11.17to 11.17.5
`control transfers, 5.5.3, 55.4, 11.17 to
`11.17.5
`
`data processing, 10.2.4
`data-rate tolerance, 7.1.11
`high bandwidth transfers, 5.9.1, 5.9.2,
`11202
`
`interrupt transfers, 5.7.3, 5.9.1
`isochronous transfers, 5.6.3, 5.92, 11.212
`non-periodic transactions, 11.17 to 11.17.5
`periodic transactions, 11.18 to 11.188
`role in transfer management, 5.11.1,
`5.11.1.5
`
`split transactions, 11.161 to 11.16.1.1.2
`tracking transactions, 5.11.2
`transaction list, 5.11.1.4
`transmission error handling, 10.2.6
`declarations in state machines, 82
`defined, 2.0 glossary, 4.9
`frame and microframe generation, 10.2.3
`HCD and HCDl overview, 10.4 (See also
`HCD; HCDI)
`host behavior at end-of—frame, 11.3
`host-system interface, 10.2.9
`as implementation focus area, 5.1
`implemented in USB Bus interface, 10.1.1
`multiple Host Controllers, 4.10
`passing preboot control to operating system,
`10.5.5
`
`port resets, 10.2.3.1
`protocol engine, 10.2.5
`remote wakeup and, 10.2.7
`requirements, 10.2
`root hub and, 10.2.8
`serializen'deserializer, 10.2.2
`state handling, 10.2.1
`state machines, 8.5, 11.16 to 11.16.1.1.2,
`11.17.2,11.20.2,11.21.2,B.2
`status and activity monitoring, 10.1.4
`
`ZTE/SAMSUNG 1008-0620
`ZTE/SAMSUNG 1008-0620
`IPR2018-00110
`|PR2018-00110
`
`

`

`Universal Serial Bus Specification Revision 2.0
`
`Host Controller (Continued)
`test mode support, 7.1.20
`Transaction Translator and, 11.141. 11.1412
`USB System interaction. 10.1.1
`Host Controller Driver. See HCD (Host Controller
`Driver)
`Host Controller Driver Interface (HCDI). 10.1.1.
`10.4
`
`host resources, 2.0 glossary
`host side bus interface. See Host Controller
`host software
`
`in bus topology, 5.2.1
`as component of USB System, 10.1.1
`pipes and. 10.5.1.2
`status and activity monitoring, 10.1.4
`host-to-function transfers. See OUT PID
`
`hot plugging. See dynamic insertion and removal
`HSD1 packets (downstream packets). 3.5. 11.15
`HS_Drive_Enable. 7.1.1.3
`HSEOP (End of High—speed Packet). 7.1.7.2.
`7.1 .7.4.2
`
`HS_Idie signallevent. 11.6.2. 11.63 Table 11-8
`HS signallevent. 11.6.3 Table 11-8. 11.6.4 Table
`’l’l-Q
`
`HSSOP (Start of High-speed Packet). 7.1.7.2.
`7.1 .7.4.2
`
`HSU2 packets (upstream packets). 8.5. 11.15
`Hub address field, 8.4.2.2
`Hub Change field. 11.4.4. 11.24.26
`hub class definitions
`
`additional endpoints, 11.12.1
`feature selectors. 1124.2
`request codes. 11242
`root hub and. 10.4
`Hub Controller, 11.12 to 1112.6
`control commands. 11.1
`defined, 4.8.2.1
`endpoint organization. 11.121
`hub and port change information processing,
`11.123.11.124
`in hub architecture, 11.1.1. 11.122
`internal port connection. 11.4
`over-current reporting and recovery. 11.125
`power distribution and, 7.2.1.1
`role in host-to-hub communications. 11.1
`status commands. 11.1
`hub descriptors. 11.122
`Hub Repeater
`Collision conditions, 11.8.3
`connectivity setup and tear-down. 11.1
`data recovery unit. 11.7.1.2
`defined. 4.8.2.1
`dynamic insertion and removal. 11.1
`elasticity buffer. 11.7.1.3
`electrical characteristics. 7.3.2 Table 7—1 1
`fault detection and recovery. 11.1
`
`high-speed packet repeaters. 11.7.1 to
`1171.44
`in hub architecture. 11.1.1
`hub signaling timings. 7.1.14.1
`internal port connection, 11.4
`packet signaling connectivity, 11.1.2.1
`repeater state descriptions, 11.2.3.3. 11.7 to
`11.7.6
`
`squelch circuit, 11.7.1.1
`Wait for End of Packet (WFEOP). 11.7.6
`Wait for End of Packet frorn Upstream Port
`state (WFEOPFU). 11.7.4
`Wait for Start of Packet (WFSOP). 11.7.5
`Wait for Start of Packet from Upstream Port
`state (WFSOPFU). 11.7.3
`Hub Repeater state machineI 11.2.3.3. 11.7.2
`hubs, 11. See also Hub Controller; Hub
`Repeater; ports
`accuracy variations. 11.21 to 11.2.2
`architecture. 4.1.1.2, 11.1
`bus states
`bus state evaluation. 11.8 to 11.8.4.1
`collision, 11.8.3
`connectldisconnect detection. 111
`full- vs. low-speed behavior. 11.8.4
`low-speed keep-alive, 7.1.7.1.