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`1111111111111111111111111111111111111111111111111111111111111
`US008805948B2
`
`(12) United States Patent
`Boucher et al.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 8,805,948 B2
`Aug. 12,2014
`
`(54)
`
`INTELLIGENT NETWORK INTERFACE
`SYSTEM AND METHOD FOR PROTOCOL
`PROCESSING
`
`(52)
`
`(71) Applicant: Alacritech, Inc., San Jose, CA (US)
`
`(72)
`
`Inventors: Laurence B. Boucher, Saratoga, CA
`(US); Stephen E. J. Blightman, San
`Jose, CA (US); Peter K. Craft, San
`Franscisco, CA (US); David A. Higgen,
`Apopka, FL (US); Clive M. Philbrick,
`San Jose, CA (US); Daryl D. Starr,
`Milpitas, CA (US)
`
`(73) Assignee: A-Tech LLC, Newark, DE (US)
`
`( * ) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.c. 154(b) by 0 days.
`
`(21) Appl. No.: 14/038,297
`
`(22) Filed:
`
`Sep.26,2013
`
`(65)
`
`Prior Publication Data
`
`US 2014/0059155 Al
`
`Feb. 27, 2014
`
`(58)
`
`U.S. Cl.
`CPC .............. H04L 61125 (2013.01); H04L 691168
`(2013.01); H04L 69/08 (2013.01); H04Q
`2213/13204 (2013.01); H04L 69116 (2013.01);
`H04L 29106 (2013.01); H04L 69/22 (2013.01);
`H04L 67134 (2013.01); H04Q 2213/1332
`(2013.01); H04L 29112009 (2013.01); H04L
`691166 (2013.01); H04L 451245 (2013.01);
`H04L 671325 (2013.01); H04L 67110
`(2013.01); H04L 691163 (2013.01); H04L
`45100 (2013.01); H04L 691165 (2013.01);
`H04Q 310029 (2013.01); H04L 69/12
`(2013.01); H04L 691161 (2013.01); H04L
`61110 (2013.01); H04L 4919094 (2013.01);
`H04L 671327 (2013.01); H04L 29112018
`(2013.01); H04L 4919063 (2013.01); H04Q
`2213/13103 (2013.01); G06F SilO (2013.01);
`H04L 691162 (2013.01); H04Q 2213/13345
`(2013.01); H04L 69/32 (2013.01); H04Q
`2213/13093 (2013.01); H04L 49190 (2013.01);
`H04L 491901 (2013.01); H04Q 2213/13299
`(2013.01)
`USPC ............................ 7091212; 709/224; 370/474
`Field of Classification Search
`CPC ..... H04L 69119; H04L 691161; H04L 691163;
`H04L 691165; H04L 691168
`USPC ......... 709/200-202,212,224,230,236,238;
`370/389,392,419,463,469,479
`See application file for complete search history.
`
`Related U.S. Application Data
`
`(63) Continuation of application No. 09/692,561, filed on
`Oct. 18, 2000, now Pat. No. 8,631,140, which is a
`continuation of application No. 091067,544, filed on
`Apr. 27, 1998, now Pat. No. 6,226,680.
`
`(60) Provisional application No. 601061,809, filed on Oct.
`14, 1997.
`
`(51)
`
`Int. Cl.
`G06F 15116
`H04L29106
`H04L29108
`H04L29112
`H04L 12156
`H04Q3100
`G06F SilO
`
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`(2006.01)
`
`(56)
`
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`
`

`

`US 8,805,948 B2
`Page 5
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`
`Primary Examiner - Moustafa M Meky
`(74) Attorney, Agent, or Firm - Mark Lauer; Silicon Edge
`Law Group LLP
`
`ABSTRACT
`(57)
`A system for protocol processing in a computer network .has
`an intelligent network interface card (INIC) or commumca(cid:173)
`tion processing device (CPD) associated with a host com(cid:173)
`puter. The INIC or CPD provides a fast-path that avoids host
`protocol processing for most large multipacket messages,
`greatly accelerating data communication. The INIC or CPD
`also assists the host for those message packets that are chosen
`for processing by host software layers. A communication
`control block (CCB) for a message is defined that allows
`DMA controllers of the INIC to move data, free of headers,
`directly to or from a destination or source in the host. ~he
`CCB can be passed back to the host for message processmg
`by the host. The INIC or CPD contains hardware circuits
`configured for protocol processing that can perform that spe(cid:173)
`cific task faster than the host cpu. One embodiment includes
`a processor providing transmit, receive and management pro(cid:173)
`cessing, with full duplex communication for four fast Ether(cid:173)
`net nodes.
`
`22 Claims, 14 Drawing Sheets
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 1 of 14
`
`US 8,805,948 B2
`
`20
`I--------------------------l
`HOST
`I
`1_ '
`I
`- -
`
`STORAGE
`
`28
`
`35
`
`I
`I
`I
`I
`I
`I
`I
`I
`I
`30 I
`I
`
`22
`
`REMOTE
`I-lOST
`
`25
`
`CPD
`
`I
`I
`I
`I
`'------
`
`FIG. 1
`
`46
`
`(
`
`CPU
`
`33
`
`~ STORAGE
`
`(50
`
`42,,-
`
`UPPER
`LAYER
`UPPER LAYER 48,
`INTERFACE
`
`CONTEXT "J
`ro TRANSPORT
`
`54
`
`52
`"--
`
`38"""'-
`
`36
`
`NETWORK
`
`DATA LINK
`
`~
`35
`
`~8
`
`\
`
`44
`
`56
`~
`
`30~
`
`INIC/CPD
`
`FIG. 2
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 2 of 14
`
`US 8,805,948 B2
`
`RECEIVE PACKET
`FROM NETWORK
`BYCPD
`
`VALIDATE PACKET,
`SUMMARIZE
`HEADERS
`
`47
`
`57
`
`61
`
`5~
`
`FAST PATH
`CANDIDATE?
`
`NO
`
`SEND PACKET TO
`STACK FOR SLOW-
`PATH PROCESSING
`
`67
`
`YES
`
`53
`
`65
`
`MATCH WITH
`CCB?
`
`NO
`
`SEND PACKET TO
`STACK FOR SLOW-
`PATH PROCESSING
`
`69
`
`SEND TO
`DESTINATION
`IN HOST VIA
`FAST-PATH
`
`FIG. 3
`
`CREATE CCB FOR
`:MESSAGE
`
`51
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 3 of 14
`
`US 8,805,948 B2
`
`REMOTE
`HOST
`
`22
`
`25
`
`32
`
`FIG.4A
`
`42
`
`1
`40 35 1
`38 ~
`36
`
`SESS
`TRANS
`NETW
`DLTNK
`~44
`
`SESS
`~-L-f~~~---~I In
`66 :
`'---.l~=~=~+__I TRANS
`:
`40 35
`:
`:
`'----1
`NETW
`38
`36
`DUNK
`L ______ ~
`
` -------
`
`22
`
`REMOTE
`25
`HOST
`L - -__ ~-----'---------',,.'RECETVE LOGIC
`32J-------
`FIG.4B
`
`56
`
`42
`40
`38
`36
`
`~44
`
`SESS
`TRANS
`NETW
`DUNK
`~44
`
`1-------1
`:
`1 2
`:
`35
`1
`1
`~ 66 70:
`
`1
`1
`L... ______ J
`
`82
`66
`
`1 L __ __ __ ..J
`
`22
`
`REMOTE
`HOST
`
`25
`
`22
`
`REMOTE
`HOST
`
`32
`
`FIG.4C
`
`FIG.4D
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 4 of 14
`
`US 8,805,948 B2
`
`REMOTE
`HOST
`
`22
`
`25
`
`99
`
`--1
`
`42
`92
`1~~L-i-~SE~S~S~r---L-~~l :
`TRANS
`~---' 1
`1
`NETW
`90 1
`1
`1
`1
`DLnITZ
`---r-- J
`35----
`
`/
`
`~44
`
`FIG. 5
`
`15l
`r- ~-- --~l--------\-- -,
`
`150",
`
`170
`
`185
`
`1
`1
`1
`1
`1
`1
`1
`
`I.
`
`1
`
`1
`1
`1
`1
`I
`I HARDWARE LOGIC
`I
`- - - ~- -
`L ____
`171
`
`PROCESSOR
`
`S
`
`-
`
`-
`
`- - - - - - -
`
`t'----- 155
`'If
`
`FIG. 6
`
`160~
`SLOW-PATH
`C 157
`
`152-,{----------------,
`I
`I
`FAST-PATH
`I
`1 :~ SOURCEIDEST
`I
`168 -t
`I
`I
`I
`I
`166 ~..L
`1
`I
`I
`I
`I
`1
`1
`1
`I
`1
`1
`1
`1
`1
`1
`
`1
`
`1
`
`1
`1
`
`164--t
`
`1
`
`162--i--
`
`1
`
`1
`
`,'1.
`
`APPLICA nON
`
`TRANSPORT
`
`NETWORK
`
`DATA LINK
`
`.! -----~1-58-----
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 5 of 14
`
`US 8,805,948 B2
`
`MEDIA ACCESS
`~172
`CONTROLLER
`
`I
`
`ASSEMBLY ~174
`REGISTER
`
`)178
`
`76
`)1
`
`, ,
`
`FLYBY
`SEQUENCER
`
`PACKET
`CONTROL
`SEQUENCER
`
`MUL TIPLEXOR ~180
`
`,
`
`) 182
`
`) 183
`
`SRAM
`
`SRAM
`CONTROL
`
`DRAM CONTROL
`
`( 186
`
`,
`
`DRAM ~188
`
`QUEUE
`184~
`MANAGER
`
`FIG. 7
`
`

`

`u.s. Patent
`
`Aug. 12,2014
`
`Sheet 6 of 14
`
`US 8,805,948 B2
`
`PACKET
`176 ________ CONTROL
`SEQUENCER
`
`f----~
`
`ASSEMBLY
`REGISTER
`
`178
`
`r------ 191
`MAC
`1-00II.1--------;
`SEQUENCER -
`
`,
`
`NETWORK --- 192
`14 - - - - - - -1
`SEQUENCER -
`
`TRANSPORT r----- 194
`t . - - - - - - - - - i
`SEQUENCER
`
`1r
`
`SESSION

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