111111
`
`1111111111111111111111111111111111111111111111111111111111111
`US00723 7036B2
`
`c12) United States Patent
`Boucher et al.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 7,237,036 B2
`Jun.26,2007
`
`(54) FAST-PATH APPARATUS FOR RECEIVING
`DATA CORRESPONDING A TCP
`CONNECTION
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`(75)
`
`Inventors: Laurence B. Boucher, Saratoga, CA
`(US); Stephen E. J. Blightman, San
`Jose, CA (US); Peter K. Craft, San
`Francisco, CA (US); David A. Higgen,
`Saratoga, CA (US); Clive M. Philbrick,
`San Jose, CA (US); Daryl D. Starr,
`Milpitas, CA (US)
`
`(73) Assignee: Alacritech, Inc., San Jose, CA (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 672 days.
`
`(21) Appl. No.: 10/260,112
`
`(22) Filed:
`
`Sep. 27, 2002
`
`4,366,538 A
`
`12/1982 Johnson et a!. ............. 364/200
`
`(Continued)
`
`FOREIGN PATENT DOCUMENTS
`
`wo
`
`W0/98/19412
`
`5/1998
`
`(Continued)
`
`OTHER PUBLICATIONS
`Internet pages entitled "Hardware Assisted Protocol Processing",
`(which Eugene Feinberg is working on), 1 page, printed Nov. 25,
`1998.
`
`(Continued)
`
`Primary Examiner-Jeffrey Pwu
`Assistant Examiner-Jude Jean-Gilles
`(74) Attorney, Agent, or Firm-Mark Lauer; Silicon Edge
`Law Group LLP
`
`(65)
`
`Prior Publication Data
`
`(57)
`
`ABSTRACT
`
`US 2004/0073703 Al
`
`Apr. 15, 2004
`
`Related U.S. Application Data
`
`(63)
`
`Continuation of application No. 10/092,967, filed on
`Mar. 6, 2002, now Pat. No. 6,591,302, which is a
`
`(Continued)
`
`(60)
`
`(51)
`
`(52)
`
`(58)
`
`Provisional application No. 60/098,296, filed on Aug.
`27, 1998, provisional application No. 60/061,809,
`filed on Oct. 14, 1997.
`
`Int. Cl.
`G06F 13138
`(2006.01)
`G06F 15117
`(2006.01)
`U.S. Cl. ...................... 709/245; 709/236; 709/230;
`370/474; 370/396; 370/469
`Field of Classification Search ................ 709/245,
`709/236, 230, 202; 370/474, 230, 396, 469;
`707/2-4, 10; 712/19, 52
`See application file for complete search history.
`
`A system for protocol processing in a computer network has
`an intelligent network interface card (INIC) or communica(cid:173)
`tion processing device (CPD) associated with a host com(cid:173)
`puter. The INIC provides a fast-path that avoids protocol
`processing for most large multi-packet messages, greatly
`accelerating data communication. The INIC also assists the
`host for those message packets that are chosen for process(cid:173)
`ing by host software layers. A communication control block
`for a message is defined that allows DMA controllers of the
`INIC to move data, free of headers, directly to or from a
`destination or source in the host. The context is stored in the
`INIC as a communication control block (CCB) that can be
`passed back to the host for message processing by the host.
`The INIC contains specialized hardware circuits that are
`much faster at their specific tasks than a general purpose
`CPU. A preferred embodiment includes a trio of pipelined
`processors with separate processors devoted to transmit,
`receive and management processing, with full duplex com(cid:173)
`munication for four fast Ethernet nodes.
`
`22 Claims, 89 Drawing Sheets
`
`:
`
`159
`
`185
`
`150 ', 170
`1 ___ \..._ __ _
`
`I
`I
`'
`
`PROCESSOR
`
`152-' ~------ ---------,
`FAST-PATII 1 SOURCEIDEST
`I
`168 -{ 1------_c.H
`APPUCAT!O~
`
`1
`
`166
`
`WISTRON CORP. EXHIBIT 1001.001
`
`

`

`US 7,237,036 B2
`Page 2
`
`Related U.S. Application Data
`
`continuation-in-part of application No. 10/023,240,
`filed on Dec. 17, 2001, now Pat. No. 6,965,941, and
`a continuation-in-part of application No. 09/464,283,
`filed on Dec. 15, 1999, now Pat. No. 6,427,173,
`which is a continuation-in-part of application No.
`09/439,603, filed on Nov. 12, 1999, now Pat. No.
`6,247,060, which is a continuation-in-part of appli(cid:173)
`cation No. 09/067,544, filed on Apr. 27, 1998, now
`Pat. No. 6,226,680, said application No. 10/092,967
`is a continuation-in-part of application No. 09/384,
`792, filed on Aug. 27, 1999, now Pat. No. 6,434,620,
`and a continuation-in-part of application No. 09/141,
`713, filed on Aug. 28, 1998, now Pat. No. 6,389,479,
`said application No. 10/092,967 is a continuation-in(cid:173)
`part of application No. 09/514,425, filed on Feb. 28,
`2000, now Pat. No. 6,427,171, and a continuation(cid:173)
`in-part of application No. 09/416,925, filed on Oct.
`13, 1999, now Pat. No. 6,470,415, and a continuation(cid:173)
`in-part of application No. 09/675,484, filed on Sep.
`29, 2000, now Pat. No. 6,807,581, and a continuation(cid:173)
`in-part of application No. 09/675,700, filed on Sep.
`29, 2000, and a continuation-in-part of application
`No. 09/789,366, filed on Feb. 20, 2001, now Pat. No.
`6,757,746, and a continuation-in-part of application
`No. 09/801,488, filed on Mar. 7, 2001, now Pat. No.
`6,687,758, and a continuation-in-part of application
`No. 09/802,551, filed on Mar. 9, 2001, now Pat. No.
`7,076,568, and a continuation-in-part of application
`No. 09/802,426, filed on Mar. 9, 2001, now Pat. No.
`7,042,898, and a continuation-in-part of application
`No. 09/802,550, filed on Mar. 9, 2001, now Pat. No.
`6,658,480, and a continuation-in-part of application
`No. 09/855,979, filed on May 14, 2001, now Pat. No.
`7,133,940, and a continuation-in-part of application
`No. 09/970,124, filed on Oct. 2, 2001, now Pat. No.
`7,124,205.
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`4,991,133 A
`5,056,058 A
`5,058,110 A
`5,097,442 A
`5,163,131 A
`5,212,778 A
`5,280,477 A
`5,289,580 A
`5,303,344 A
`5,412,782 A
`5,448,566 A
`5,485,579 A
`5,506,966 A
`5,511,169 A
`5,517,668 A
`5,524,250 A
`5,548,730 A
`5,566,170 A
`5,588,121 A
`5,590,328 A
`5,592,622 A
`5,598,410 A
`5,619,650 A
`5,629,933 A
`5,634,099 A
`5,634,127 A
`5,642,482 A
`
`................ 3641900
`211991 Davis et a!.
`1011991 Hirata et a!. ................ 7091230
`1011991 Beach eta!. ............... 370185.6
`311992 Ward et a!. ................... 365/78
`1111992 Row et a!. .................. 3951200
`511993 Dally et a!. ................. 3951400
`111994 Trapp ........................ 370185.1
`211994 Latif eta!. .................. 3951275
`411994 Yokoyama eta!. ......... 3951275
`511995 Hausman eta!. ........... 3951250
`911995 Richter eta!. ............. 370194.1
`111996 Hitz et al .............. 3951200.12
`411996 Ban ........................... 3951250
`411996 Suda .......................... 3951280
`511996 Szwerinski et a!. ......... 3951800
`611996 Chesson eta!. ............ 395/775
`811996 Young eta!. ............... 3951280
`................. 370160
`1011996 Bakke et a!.
`1211996 Reddin eta!. ......... 3951200.15
`1211996 Seno eta!. ................. 3951675
`111997 Isfeld eta!. ........... 3951200.02
`111997 Stone ......................... 3701469
`411997 Bach et al ............. 3951200.01
`511997 Delp eta!. .................. 3701411
`511997 Andrews eta!. ....... 3951200.07
`511997 Cloud et al ................. 3951680
`611997 Pardillos .................. 3951200.2
`
`5,664,114 A
`5,671,355 A
`5,678,060 A
`5,692,130 A
`5,699,317 A
`5,701,434 A
`5,701,516 A
`5,727,142 A
`5,749,095 A
`5,751,715 A
`5,752,078 A
`5,758,084 A
`5,758,089 A
`5,758,186 A
`5,758,194 A
`5,771,349 A
`5,790,804 A
`5,794,061 A
`5,802,258 A
`5,802,580 A
`5,809,328 A
`5,812,775 A
`5,815,646 A
`5,878,225 A
`5,898,713 A
`5,913,028 A
`5,930,830 A
`5,931,918 A
`5,935,205 A
`5,937,169 A
`5,941,969 A
`5,941,972 A
`5,950,203 A
`5,991,299 A
`5,996,024 A
`6,005,849 A
`6,009,478 A
`6,016,513 A
`6,021,446 A
`6,021,507 A
`6,026,452 A
`6,034,963 A
`6,044,438 A
`6,047,323 A
`6,047,356 A
`6,057,863 A
`6,061,368 A
`6,065,096 A
`6,122,670 A *
`6,141,705 A
`6,173,333 B1
`6,195,739 B1 *
`6,226,680 B1
`6,246,683 B1
`6,247,060 B1
`6,345,301 B1
`6,356,951 B1
`6,389,468 B1
`6,427,169 B1
`6,434,651 B1
`6,449,656 B1
`6,453,360 B1
`6,487,654 B2 *
`6,912,522 B2 *
`200110004354 A1
`200110025315 A1
`
`...... 3951200.64
`911997 Krech, Jr. et a!.
`911997 Collins .................... 3951200.2
`1011997 Yokoyama et al .......... 7091212
`.......... 3951200.12
`1111997 Shobu et a!.
`1211997 Sartore et a!.
`......... 3951230.06
`1211997 Nakagawa .................. 3951484
`1211997 Cheng et a!.
`............... 3951842
`311998 Chen .......................... 3951181
`511998 Hagersten ................... 7111141
`................. 3701455
`511998 Chan et a!.
`511998 Delp et a!. .................. 3951827
`.... 3951200.58
`511998 Silverstein et a!.
`511998 Gentry et a!. .......... 3951200.64
`511998 Hamilton eta!. ........... 3951831
`511998 Kuzma ....................... 3951886
`611998 Picazo, Jr. et al ....... 3951188.01
`811998 Osborne ................ 3951200.75
`811998 Hansen eta!. ......... 3951800.01
`911998 Chen ..................... 3951182.08
`911998 McAlpice ................... 7111149
`911998 Nogales et a!. ............. 3951825
`... 3951200.43
`911998 Van Seeters et a!.
`911998 Purcell eta!. .............. 3951163
`311999 Bilansky et a!. ....... 3951200.57
`411999 Melzer et a!.
`................ 371153
`611999 Wang et a!.
`........... 3951200.33
`711999 Mendelson eta!. ......... 7111171
`811999 Row et a!. .................. 7091300
`811999 Murayama eta!. ......... 7091216
`811999 Connery et al .......... 3951200.8
`811999 Ram et a!. .................. 7101128
`811999 Roese et a!. ................ 7101129
`911999 Stakuis eta!. ................ 707110
`1111999 Radogna et a!. ............ 3701392
`1111999 Blumenau ................... 7091301
`............... 3701276
`1211999 Roach et a!.
`1211999 Panner et a!. .................. 71015
`112000 Lowe ......................... 7091250
`212000 Gentry, Jr.
`.................. 7091303
`212000 Chen ............................. 71412
`212000 Pitts ............................ 710156
`312000 Minami eta!. ............. 3701401
`312000 Olnowich ................... 7111130
`412000 Krause ....................... 7091227
`412000 Anderson eta!. ........... 7111129
`512000 Olarig ........................ 3451520
`512000 Hitzelberger ............... 3701537
`512000 Day et al .................... 7111114
`912000 Bennett et al.
`. ............ 7091236
`1012000 Anand eta!. ................. 710115
`112001 Jolitz et a!.
`212001 Wright eta!. ................. 712119
`512001 Boucher et a!.
`............ 7091230
`612001 Connery et al ............. 3701392
`612001 Boucher et a!.
`............ 7091238
`212002 Burns et al ................. 7091230
`312002 Gentry, Jr.
`.................. 7091250
`512002 Muller et al ................ 7091226
`712002 Elzur ......................... 7091224
`812002 Gentry, Jr.
`.................. 7101260
`912002 Elzur et a!. ................. 7091236
`912002 Muller et al ................ 7091250
`1112002 Dowling ..................... 7121244
`612005 Edgar ... ... ... ... ... .. ... ... ... .. 70712
`612001 Jolitz
`912001 Jolitz
`
`FOREIGN PATENT DOCUMENTS
`
`wo
`wo
`wo
`wo
`
`WOI98150852
`WOI99104343
`wo 99165219
`wo 00113091
`
`1111998
`111999
`1211999
`312000
`
`WISTRON CORP. EXHIBIT 1001.002
`
`

`

`US 7,237,036 B2
`Page 3
`
`wo
`wo
`wo
`wo
`wo
`
`WO 01/04770 A2
`WO 01/05107 A1
`WO 01/05116 A2
`WO 01/05123 A1
`WO 01/40960 A1
`
`1/2001
`1/2001
`1/2001
`1/2001
`6/2001
`
`OTHER PUBLICATIONS
`
`Zilog product Brief entitled "Z85C30 CMOS SCC Serial
`Communication Controller", Zilog Inc., 3 pages, 1997.
`Internet pages of X point Technologies, Inc. entitled "Smart
`LAN Work Requests", 5 pages, printed Dec. 19, 1997.
`Internet pages entitled: Asante and 1 OOBASE-T Fast
`Ethernet, 7 pages, printed May 27, 1997.
`Internet pages entitled: A Guide to the Paragon XP/S-A7
`Supercomputer at Indianna University, 13 pages, printed
`Dec. 21, 1998.
`Richard Stevens, "TCP/IP Illustrated, vol. 1, The Protocols",
`pp. 325-326 (1994).
`Internet pages entitled: Northridge/Southbridge vs. Intel
`Hub Architecture, 4 pages, printed Feb. 19, 2001.
`Gigabit Ethernet Technical Brief, Achieving End-to-End
`Performance, Alteon Networks, Inc., First Edition, Sep.
`1996.
`Internet pages directed to Technical Brief onAlteon Ethernet
`Gigabit NIC technology, www.alteon.com, 14 pages, printed
`Mar. 15, 1997.
`VIA Technologies, Inc. article entitled "VT8501 Apollo
`MVP4", pp. i-iv, 1-11, cover and copyright page, revision
`1.3, Feb. 1, 2000.
`iReady News Archives article entitled "iReady Rounding
`Out Management Team with Two Key Executives", http://
`www.ireadyco.com/archives/keyexec.html, 2 pages, printed
`Nov. 28, 1998.
`"Toshiba Delivers First Chips to Make Consumer Devices
`Internet-Ready Based On iReady's Design," Press Release
`Oct. 1998, 3 pages, printed Nov. 28, 1998.
`Internet pages from iReady Products, web sitehttp://www.
`ireadyco.com/products,html, 2 pages, downloaded Nov. 25,
`1998.
`iReady News Archives, Toshiba, iReady shipping Internet
`chip, 1 page, printed Nov. 25, 1998.
`Interprophet article entitled "Technology", http://www.
`interprophet.com/technology.html, 17 pages, printed Mar. 1,
`2000.
`iReady Corporation, article entitled "The I-1000 Internet
`Tuner", 2 pages, date unknown.
`iReady article entitled "About Us Introduction", Internet
`pages fromhttp://www.iReadyco.com/about.html, 3 pages
`printed Nov. 25, 1998.
`iReady News Archive article entitled "Revolutionary
`Approach to Consumer Electronics Internet Connectivity
`Funded", San Jose, CA, Nov. 20, 1997. 2 pages, printed Nov.
`2, 1998.
`iReady News Archive article entitled "Seiko Instruments
`Inc. (SII) Introduces World's First Internet-Ready Intelligent
`LCD Modules Based on iReady Technology," Santa Clara,
`CA and Chiba, Japan, Oct. 26, 1998, 2 pages, printed Nov.
`2, 1998.
`NEWS watch article entitled "iReady internet Tuner to Web
`Enable Devices", Tuesday, Nov. 5, 1996, printed Nov. 2,
`1998.
`EETimes article entitled "Tuner for Toshiba, Toshiba Taps
`iReady for Internet Tuner", by David Lammers, 2 pages,
`printed Nov. 2, 1998.
`"Comparison ofNovell Netware and TCP/IP Protocol Archi(cid:173)
`tectures", by J.S. Carbone, 19 pages, printed Apr. 10, 1998.
`
`Adaptec article entitled "AEA-7110C-a DuraSAN product",
`11 pages, printed Oct. 1, 2001.
`iSCSI HBA article entitled "iSCSI and 2Gigabit fibre Chan(cid:173)
`nel Host Bus Adapters from Emulex, QLogic, Adaptec,
`JNI", 8 pages, printed Oct. 1, 2001.
`iSCSI HBA article entitled "FCE-3210/6410 32 and 64-bit
`PCI-to-Fibre Channel HBA", 6 pages, printed Oct. 1, 2001.
`ISCSI.com article entitled "iSCSI Storage", 2 pages, printed
`Oct. 1, 2001.
`"Two-Way TCP Traffic Over Rate Controlled Channels:
`Effects and Analysis", by Kalampoukas et a!., IEEE Trans(cid:173)
`actions on Networking, vol. 6, No. 6, Dec. 1998.
`!Ready News article entitled "Toshiba Delivers First Chips
`to Make Consumer Devices Internet-Ready Based on
`iReady Design", Santa Clara, CA, and Tokyo, Japan, Oct.
`14, 1998, printed Nov. 2, 1998.
`U.S. Appl. No. 60/053,240, filed Jul. 18, 1997, Jolitz eta!.
`U.S. Appl. No. 08/964,304, by Napolitano, et a!., entitled
`"File Array Storage Architecture", filed Nov. 4, 1997.
`"File System Design For An NFS File Server Appliance",
`Article by D. Hitz, et a!., 13 pages.
`Adaptec Press Release article entitled "Adaptec Announces
`Ether/Storage Technology", 2 pages, May 4, 2000, printed
`Jun. 14, 2000.
`Adaptec article entitled "EtherStorage Frequently Asked
`Questions", 5 pages, printed Jul. 19, 2000.
`Adaptec article entitled "EtherStorage White Paper", 7
`pages, printed Jul. 19, 2000.
`CIBC World Markets article entitled "Computers; Storage",
`by J. Berlino et a!., 9 pages, dated Aug. 7, 2000.
`Merrill Lynch article entitled "Storage Futures", by S.
`Milunovich, 22 pages, dated May 10, 2000.
`CBS Market Watch article entitled "Montreal Start-Up
`Battles Data Storage Bomleneck", by S. Taylor, dated Mar.
`5, 2000, 2 pages, printed Mar. 7, 2000.
`Internet-draft article entitled "SCSIITCP (SCSI over TCP)",
`by J. Satran et a!., 38 pages, dated Feb. 2000, printed May
`19, 2000.
`Internet pages entitled "Technical White Paper-Xpoint's
`Disk to LAN Acceleration Solution for Windows NT
`Server," 16 pages, printed Jun. 5, 1997.
`Jato Technologies article entitled "Network Accelerator
`Chip Architecture," twelve-slide presentation, printed Aug.
`19, 1998.
`EETimes article entitled "Enterprise System Uses Flexible
`Spec," dated Aug. 10, 1998, printed Nov. 25, 1998.
`Internet pages entitled "Smart Ethernet Network Interface
`Cards", which Berend Ozceri is developing, printed Nov. 25,
`1998.
`Internet pages of Xaqti corporation entitled "GigaPower
`Protocol Processor Product Review," printed Nov. 25, 1999.
`Internet pages entitled "DART: Fast Application Level Net(cid:173)
`working via Data-Copy Avoidance," by Robert J. Walsh,
`printed Jun. 3, 1999.
`Internet pages of InterProphet entitled "Frequently Asked
`Questions", by Lynne Jolitz, printed Jun. 14, 2000.
`Internet pages entitled "iReady Products," printed Nov. 25,
`1998.
`Andrew S. Tanenbaum, "Computer Networks," Third Edi(cid:173)
`tion, 1996, ISBN 0-13-349945-6.
`Form 10-K for Exelan, Inc., for the fiscal year ending Dec.
`31, 1987 (10 pages).
`Form 10-K for Exelan, Inc., for the fiscal year ending Dec.
`31, 1988 (10 pages).
`
`WISTRON CORP. EXHIBIT 1001.003
`
`

`

`US 7,237,036 B2
`Page 4
`
`"Second Supplemental Information Disclosure Statement
`per 37 C.P.R. §1.97(i)", dated Jul. 29, 2002 relating to
`Exelan Inc. as submitted in U.S. Appl. No. 09/464,283.
`WindRiver article entitled "Tornado: For Intelligent Net(cid:173)
`workAcceleration", copyright Wind River Systems, 2001, 2
`pages.
`WindRiver White Paper entitled "Complete TCP/IP Offload
`for High-Speed Ethernet Networks", Copyright Wind River
`Systems, 2002, 7 pages.
`Intel article entitled "Solving Server Bottlenecks with Intel
`Server Adapters", Copyright Intel Corporation, 1999, 8
`pages.
`Article from Rice University, Department of Computer
`Science entitled "Lazy Receiver Processing (LRP): A new
`Network Subsystem Architecture for Server Systems", by
`Peter Druschel and Gaurav Banga, 15 pages.
`Internet RFC/STD/FYIIBCP Archives article with heading
`"RFC2140" entitled "TCP Control Block Interdependence",
`web address http://www.faqs.org/rfcs/rfc2140.html, 9 pages,
`printed Sep. 20, 2002.
`Schwaderer eta!., IEEE Computer Society Press publication
`entitled, "XTP in VLSI Protocol Decomposition for ASIC
`Implementation", from 15'h Conference on Local Computer
`Networks, 5 pages, Sep. 30-0ct. 3, 1990.
`
`Beach, Bob, IEEE Computer Society Press publication
`entitled, "UltraNet: An Architecture for Gigabit Network(cid:173)
`ing", from 15th Conference on Local Computer Networks,
`18 pages, Sep. 30-0ct. 3, 1990.
`Chesson et a!., IEEE Syposium Record entitled, "The Pro(cid:173)
`tocol Engine Chipset", from Hot Chips III, 16 pages, Aug.
`26-27, 1991.
`Maclean et a!., IEEE Global Telecommunications Confer(cid:173)
`ence, Globecom '91, presentation entitled, "An Outboard
`Processor for High Performance Implementation of Trans(cid:173)
`port Layer Protocols", 7 pages, Dec. 2-5, 1991.
`Ross eta!., IEEE article entitled "FX1000: A high perfor(cid:173)
`mance single chip Gigabit Ethernet NIC", from Compean
`'97 Proceedings, 7 pages, Feb. 23-26, 1997.
`Strayer et a!., "Ch. 9: The Protocol Engine" from XTP: The
`Transfer Protocol, 12 pages, Jul. 1992.
`Publication entitled "Protocol Engine Handbook", 44 pages,
`Oct. 1990.
`Koufopavlou eta!., IEEE Global Telecommunications Con(cid:173)
`ference, Globecom '92, presentation entitled, "Parallel TCP
`for High Performance Communication Subsystems", 7
`pages, Dec. 6-9, 1992.
`Lilienkamp eta!., Publication entitled "Proposed Host-Front
`End Protocol", 56 pages, Dec. 1984.
`* cited by examiner
`
`WISTRON CORP. EXHIBIT 1001.004
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 1 of 89
`
`US 7,237,036 B2
`
`20
`
`HOST
`
`28
`
`\
`
`-
`
`CPU
`
`-
`
`33
`
`r------------------------~
`I
`f-------
`1
`I
`I
`I
`35~
`I
`STORAGE -
`I
`I
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`I
`I
`I
`I
`I
`I
`I
`I
`I
`30 I
`j
`~ CPD
`I
`I
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`I
`
`( 22
`
`REMOTE
`HOST
`
`I
`I
`I
`I
`
`25\ L - - - - - ----------------- __ I
`
`FIG. 1
`
`/50
`f
`CONTEXT
`
`UPPER
`LAYER
`42
`"------ UPPER LAYER
`INTERFACE
`54) r- TRANSPORT
`
`j
`
`52
`\.__
`
`40
`38,...-- NETWORK
`
`~ DATA LINK
`36
`
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`
`56
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`,
`
`30\
`
`INIC/CPD
`
`FIG. 2
`
`STORAGE
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`\_35
`
`__)8
`
`\
`
`44
`
`WISTRON CORP. EXHIBIT 1001.005
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 2 of 89
`
`US 7,237,036 B2
`
`RECEIVE PACKET
`FROM NETWORK
`BYCPD
`
`VALIDATE PACKET,
`SUMMARIZE
`HEADERS
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`4 7
`
`57
`
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`
`FIG. 3
`
`CREATE CCB FOR
`MESSAGE
`
`51
`
`WISTRON CORP. EXHIBIT 1001.006
`
`

`

`U.S. Patent
`
`Jun. 26,2007
`
`Sheet 3 of 89
`
`US 7,237,036 B2
`
`r - - - - - - -1
`~--~r-----~~ 63
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`FIG. 4D
`
`WISTRON CORP. EXHIBIT 1001.007
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 4 of 89
`
`US 7,237,036 B2
`
`99
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`HOST
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`
`WISTRON CORP. EXHIBIT 1001.008
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 5 of 89
`
`US 7,237,036 B2
`
`MEDIA ACCESS~ 172
`CONTROLLER
`I
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`FIG. 7
`
`WISTRON CORP. EXHIBIT 1001.009
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 6 of 89
`
`US 7,237,036 B2
`
`~ 174
`
`PACKET
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`MULTIPLEXOR
`
`FIG. 8
`
`WISTRON CORP. EXHIBIT 1001.010
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 7 of 89
`
`US 7,237,036 B2
`
`SOURCE/DEST
`·~
`
`220
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`31
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`FIG. 11
`
`WISTRON CORP. EXHIBIT 1001.011
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 8 of 89
`
`US 7,237,036 B2
`
`r--------------------------------1
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`FIG. 10
`
`WISTRON CORP. EXHIBIT 1001.012
`
`

`

`0'1 = N
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`
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`
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`
`168
`
`WISTRON CORP. EXHIBIT 1001.013
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 10 of 89
`
`US 7,237,036 B2
`
`200~
`
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`FIG. 13
`
`WISTRON CORP. EXHIBIT 1001.014
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 11 of 89
`
`US 7,237,036 B2
`
`CLOCK ------------- ~------ ~------ /_----- ~L----- ~--
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`
`WISTRON CORP. EXHIBIT 1001.015
`
`

`

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`WISTRON CORP. EXHIBIT 1001.016
`
`

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`0'1 = N
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`r FILE I ALU I ALU 1 ALU 1 TEST 1 FLAG IQCH&J LIT J PGM 1 PC
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`WISTRON CORP. EXHIBIT 1001.017
`
`

`

`0'1 = N
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`WISTRON CORP. EXHIBIT 1001.018
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 15 of 89
`
`US 7,237,036 B2
`
`705
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`WISTRON CORP. EXHIBIT 1001.019
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 16 of 89
`
`US 7,237,036 B2
`
`844 ~~)
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`846
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`FIG. 18
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`I Data
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`
`WISTRON CORP. EXHIBIT 1001.020
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 17 of 89
`
`US 7,237,036 B2
`
`900
`
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`FIG. 19A
`
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`
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`
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`WISTRON CORP. EXHIBIT 1001.021
`
`

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`WISTRON CORP. EXHIBIT 1001.022
`
`

`

`U.S. Patent
`
`Jun. 26,2007
`
`Sheet 19 of 89
`
`US 7,237,036 B2
`
`NETWORK
`
`J:210
`
`INIC 200
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`FIG. 21
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`WISTRON CORP. EXHIBIT 1001.023
`
`

`

`U.S. Patent
`
`Jun.26,2007
`
`Sheet 20 of 89
`
`US 7,237,036 B2
`
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