Intel Corp. v. Alacritech, Inc.
`IPR2018-00226, -00234, -00401
`
`March 4, 2019
`
`
`IPR2018-00226, -00234, -00401
`
`March 4, 2019
`
`
`
`Demonstratives: Table of Contents
`
`(1) 948 Patent (IPR2018-00234)
`
`1. A POSA would have been motivated to combine Thia
`and Tanenbaum96 (and Stevens2)
`Slides 7-34
`
`2. The prior art combinations disclose the limitations of
`the challenged claims of the 948 Patent
`
`Slides 35-62
`
`(2) 205 Patent (IPR2018-00226)
`
`1. Thia is enabling prior art
`
`Slides 67-71
`
`2. Thia teaches the network interface device performing
`all network and transport layer processing
`Slides 72-89
`
`3. A POSA would have been motivated to combine Thia
`and SMB
`
`Slides 90-98
`
`4. Motion to Amend 205 Patent should be denied
`
`Slides 99-112
`
`Demonstrative Exhibit – Not Evidence
`
`2
`
`
`
`Demonstratives: Table of Contents
`
`(3) 699 Patent (IPR2018-00401)
`
`1. Kiyohara transfers packet data without headers to the
`“destination”
`Slides 148-154
`
`2. Kiyohara transfers packet data to the “destination”
`without the host processing network layer or transport
`layer headers
`
`Slides 155-163
`
`3. Kiyohara’s data storage area is on the host Slides 164-170
`
`4. Information in Kiyohara’s data storage area is
`controlled by the application
`
`5. SMB is a session layer protocol (claims 2, 7)
`
`Slides 171-174
`
`Slides 175-187
`
`Demonstrative Exhibit – Not Evidence
`
`3
`
`
`
`Demonstratives: Table of Contents
`
`(4) Common Issues
`
`1. Secondary Considerations (IPR2018-00226, Slides 188-190
`-00234, -00401)
`
`2. SMB is Prior Art (IPR2018-00226, -00401)
`
`3. Motion to Exclude
`(IPR2018-00226, -00234, -00401)
`
`(5) Petitions are not Time-Barred
`
`Slides 191-197
`
`Slides 198-224
`
`1. 948 and 205 Petitions are not time-barred
`(IPR2018-00226, -00234)
`
`Slides 225-270
`
`2. 699 Petition is not time-barred (IPR2018-00401) Slides 271-294
`
`Demonstrative Exhibit – Not Evidence
`
`4
`
`
`
`U.S. Patent No. 8,805,948
`(948 Patent)
`
`IPR2018-00234 (Intel)
`IPR2018-00403 (Cavium)
`IPR2018-01307 (Dell)
`
`*All citations herein are to the IPR2018-00234 case unless otherwise noted.
`
`5
`
`
`
`948 Patent: Instituted Grounds
`
`• Thia, Tannenbaum96, and Stevens2: claims 1,
`3, 6-8, 17, 19, 21, and 22.
`
`Demonstrative Exhibit – Not Evidence
`
`6
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine Thia and
`Tanenbaum96 (and Stevens2)
`
`2. The prior art combinations disclose the limitations of the
`challenged claims of the 948 Patent
`
`Demonstrative Exhibit – Not Evidence
`
`7
`
`
`
`The Board Has Rejected Many of PO’s
`Arguments
`
`• This Petition involves overlapping prior art and arguments
`as in prior related IPRs, including IPRs on the 880 Patent
`(IPR2018-01409; IPR2018-01410)
`• Board has previously rejected PO’s arguments
`•
`-01409 FWD at 11-14: finding it would have been
`obvious to combine Thia and Tanenbaum96
`-1409 FWD at 10-11: finding that Thia and
`Tanenbaum96 teach storing data on the host without
`TCP headers
`
`•
`
`Demonstrative Exhibit – Not Evidence
`
`8
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine Thia and
`Tanenbaum96 (and Stevens2)
`a. Tanenbaum96 does not teach away from the
`combination (Board previously sided with
`Petitioner)
`b. The trend towards TCP/IP in the 1990s would motivate
`combining Thia’s bypass architecture with TCP/IP
`(Board previously sided with Petitioner)
`c. A POSA would have understood that Thia’s teachings
`are applicable to TCP/IP (Board previously sided with
`Petitioner)
`It would have been obvious to combine Stevens2 with
`Thia and Tanenbaum96
`
`d.
`
`Demonstrative Exhibit – Not Evidence
`
`9
`
`
`
`The Board rejected PO’s argument that
`Tanenbaum96 teaches away
`
`IPR2017-01409 Paper 79 (FWD) at 12;
`see also Paper 35 (Reply) at 4-5.
`
`Demonstrative Exhibit – Not Evidence
`
`10
`
`
`
`Tanenbaum96 does not teach away
`from a combination with Thia
`
`Instead, it describes design preferences and tradeoffs
`
`Ex. 1006.588-.589 (Tanenbaum96);
`see also Paper 35 (Reply) at 4; Ex. 1399.027-.029 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`11
`
`
`
`Tanenbaum96 does not discourage
`offloading simple protocols
`
`Ex. 1006.588 (Tanenbaum96);
`see also Paper 35 (Reply) at 4, 7;
`Ex.1399.028-.029 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`12
`
`
`
`Tanenbaum96: Transport processing is
`“straightforward” in the “normal case”
`
`Ex. 1006.583 (Tanenbaum96);
`see also Paper 35 (Reply) at 4.
`
`Demonstrative Exhibit – Not Evidence
`
`13
`
`
`
`Thia also recognizes the difficulty of
`offloading a complex protocol stack
`
`Ex. 1015.002 (Thia);
`see also Paper 35 (Reply) at 4.
`
`Demonstrative Exhibit – Not Evidence
`
`14
`
`
`
`Thia’s solution: “Fast path” offload is
`based on header prediction
`
`Ex. 1015.002 (Thia);
`see also Paper 35 (Reply) at 4.
`
`Demonstrative Exhibit – Not Evidence
`
`15
`
`
`
`Both disclose a bypass/fast-path based
`on TCP/IP header prediction
`
`Ex. 1015.002 (Thia);
`see also Paper 35 (Reply) at 2.
`
`Demonstrative Exhibit – Not Evidence
`
`Ex. 1006.585 (Tanenbaum96);
`see also Paper 35 (Reply) at 2.
`
`16
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine Thia and
`Tanenbaum96 (and Stevens2)
`a. Tanenbaum96 does not teach away from the
`combination (Board previously sided with Petitioner)
`b. The trend towards TCP/IP in the 1990s would
`motivate combining Thia’s bypass architecture with
`TCP/IP (Board previously sided with Petitioner)
`c. A POSA would have understood that Thia’s teachings
`are applicable to TCP/IP (Board previously sided with
`Petitioner)
`It would have been obvious to combine Stevens2 with
`Thia and Tanenbaum96
`
`d.
`
`Demonstrative Exhibit – Not Evidence
`
`17
`
`
`
`The Board rejected PO’s “lack of interest
`in OSI” argument
`
`Demonstrative Exhibit – Not Evidence
`
`IPR2017-01409 Paper 79 (FWD) at 13;
`see also Paper 35 (Reply) at 5.
`
`18
`
`
`
`By 1996 OSI protocol use vanished and
`TCP/IP became dominant
`
`Ex. 1006.016 (Tanenbaum96);
`see also Paper 2 (Petition) at 25, 57.
`
`Demonstrative Exhibit – Not Evidence
`
`19
`
`
`
`Thia’s hardware offload provides
`advantages over software alone
`
`Ex. 1015.013 (Thia);
`see also Paper 35 (Reply) at 4-5.
`
`Demonstrative Exhibit – Not Evidence
`
`20
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine Thia and
`Tanenbaum96 (and Stevens2)
`a. Tanenbaum96 does not teach away from the
`combination (Board previously sided with Petitioner)
`b. The trend towards TCP/IP in the 1990s would motivate
`combining Thia’s bypass architecture with TCP/IP
`(Board previously sided with Petitioner)
`c. A POSA would have understood that Thia’s
`teachings are applicable to TCP/IP (Board
`previously sided with Petitioner)
`It would have been obvious to combine Stevens2 with
`Thia and Tanenbaum96
`
`d.
`
`Demonstrative Exhibit – Not Evidence
`
`21
`
`
`
`The Board rejected PO’s “standard OSI
`protocol” argument
`
`Demonstrative Exhibit – Not Evidence
`
`IPR2017-01409 Paper 79 (FWD) at 13;
`see also Paper 35 (Reply) at 5.
`
`22
`
`
`
`The Board rejected PO’s argument that
`Thia teaches away from using TCP/IP
`
`IPR2017-01409 Paper 79 (FWD) at 14;
`see also Paper 35 (Reply) at 6-7.
`
`Demonstrative Exhibit – Not Evidence
`
`23
`
`
`
`Both disclose a bypass/fast-path based
`on TCP/IP header prediction
`
`Ex. 1015.002 (Thia); see also Paper 35 (Reply) at 2.
`
`Ex. 1006.585 (Tanenbaum96); see also Paper 35 (Reply) at 2.
`
`Demonstrative Exhibit – Not Evidence
`
`24
`
`
`
`Thia was not theoretical and offered a
`practical design for a hardware bypass
`
`Ex. 1015.001, .008, .013 (Thia);
`see also Paper 35 (Reply) at 7-8; Ex.1399.033-.034 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`25
`
`
`
`Thia’s teachings are not limited to OSI
`
`Ex. 1015.001 (Thia); see also Paper 35 (Reply) at 5;
`Ex. 1399.030-.031 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`26
`
`
`
`Thia’s standard protocol stack (SPS) is
`a “multi-layer” stack, not an “OSI” stack
`
`Ex. 1015.003 (Thia); see also Paper 35 (Reply) at 5;
`Ex. 1399.030-.031 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`27
`
`
`
`Thia teaches that its bypass offload is
`more than one multi-layer stack
`
`Ex. 1015.005 (Thia); see also Paper 35 (Reply) at 6-7;
`Ex.1399.030-.031 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`28
`
`
`
`TCP/IP and OSI were widely understood
`to be very similar
`
`Demonstrative Exhibit – Not Evidence
`
`Ex. 1003.013 (Horst Decl.);
`see also Paper 35 (Reply) at 6.
`
`29
`
`
`
`The 948 Patent admits that TCP/IP
`layers correspond to OSI layers
`
`Ex. 1001 at 2:10-19 (948 Patent);
`see also Paper 35 (Reply) at 6; Ex.1399.031-.032 (Horst Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`30
`
`
`
`Thia’s disclosure of FDDI does not preclude TCP/IP
`as it was commonly known to use them together
`
`Ex. 1252.022-.023 (McClain);
`see also Paper 35 (Reply) at 6.
`
`Demonstrative Exhibit – Not Evidence
`
`31
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine Thia and
`Tanenbaum96 (and Stevens2)
`a. Tanenbaum96 does not teach away from the
`combination
`b. The trend towards TCP/IP in the 1990s would motivate
`combining Thia’s bypass architecture with TCP/IP
`c. A POSA would have understood that Thia’s teachings
`are applicable to TCP/IP
`It would have been obvious to combine Stevens2
`with Thia and Tanenbaum96
`
`d.
`
`Demonstrative Exhibit – Not Evidence
`
`32
`
`
`
`Each discloses a bypass/fast-path
`based on TCP/IP header prediction
`
`Ex. 1013.960-.962 (Stevens2); see also Paper 35 (Reply) at 7; Paper 2 (Petition)
`at 56-60; Ex.1399.033-.034 (Horst Reply Decl.); Ex.1003.078-.080 (Horst Decl.).
`
`Ex. 1006.585 (Tanenbaum96); see also Paper 35 (Reply) at 2.
`Demonstrative Exhibit – Not Evidence
`
`33
`
`
`
`Each discloses a bypass/fast-path
`based on TCP/IP header prediction
`
`Ex. 1013.960-.962 (Stevens2); see also Paper 35 (Reply) at 7; Paper 2 (Petition)
`at 56-60; Ex.1399.033-.034 (Horst Reply Decl.); Ex.1003.078-.080 (Horst Decl.).
`
`Ex. 1015.002 (Thia); see also Paper 35 at 2.
`
`34
`
`
`
`948 Patent: Disputes
`
`1. A POSA would have been motivated to combine
`Thia and Tanenbaum96 (and Stevens2)
`
`2. The prior art combinations disclose the
`limitations of the challenged claims of the
`948 Patent
`
`Demonstrative Exhibit – Not Evidence
`
`35
`
`
`
`948 Patent: Disputes
`
`2. The prior art combinations disclose the limitations of
`the challenged claims of the 948 Patent
`a. The combination discloses a network interface
`checking whether packets are IP fragmented
`b. The combination discloses checking whether
`“packets” have certain exception conditions / the
`combination discloses the protocol stack
`processing exception conditions
`c. The combination discloses bypassing host protocol
`stack processing and storing data from packets
`without exception conditions (Board previously
`found that Thia and Tanenbaum96 teach this)
`
`Demonstrative Exhibit – Not Evidence
`
`36
`
`
`
`948 Patent: Claims 1, 17
`
`Ex. 1001 (948 Patent) at Claim 1, Claim 7.
`
`Demonstrative Exhibit – Not Evidence
`
`37
`
`
`
`Thia + Tanenbaum96 teaches checking for
`fragmentation in fast-path test
`
`Thia’s RX bypass test checks PDU
`headers to determine if packets are
`bypassable
`
`Ex. 1015.003 (Thia); see also Paper 35 (Reply) at 8;
`Paper 2 at 75 (Petition).
`
`Demonstrative Exhibit – Not Evidence
`
`38
`
`
`
`Thia + Tanenbaum96 teaches checking for
`fragmentation in fast-path test
`
`Ex. 1015.007 (Thia); see also Paper 35 (Reply) at 8;
`Paper 2 at 75 (Petition).
`
`Demonstrative Exhibit – Not Evidence
`
`39
`
`
`
`Thia + Tanenbaum96 teaches checking for
`fragmentation in fast-path test
`
`Ex. 1006.585 (Tanenbaum96);
`see also Paper 35 (Reply) at 8.
`
`Demonstrative Exhibit – Not Evidence
`
`40
`
`
`
`Undisputed: A POSA would understand “the
`TPDU is a full one” to mean it is not fragmented
`
`Ex. 1003.064-.066 (Horst Decl.); see also Paper 35 (Reply) at 8-9;
`Paper 2 (Petition) at 75.
`
`Demonstrative Exhibit – Not Evidence
`
`41
`
`
`
`PO admits a POSA would know how to
`check for fragmentation
`
`Paper 18 (POR) at 26-27; Paper 35 (Reply) at 9.
`
`Demonstrative Exhibit – Not Evidence
`
`42
`
`
`
`948 Patent: Disputes
`
`2. The prior art combinations disclose the limitations of
`the challenged claims of the 948 Patent
`a. The combination discloses a network interface
`checking whether packets are IP fragmented
`b. The combination discloses checking whether
`“packets” have certain exception conditions /
`the combination discloses the protocol stack
`processing exception conditions
`c. The combination discloses bypassing host protocol
`stack processing and storing data from packets
`without exception conditions (Board previously
`found that Thia and Tanenbaum96 teach this)
`
`Demonstrative Exhibit – Not Evidence
`
`43
`
`
`
`948 Patent: Claims 1, 17
`
`Ex. 1001 (948 Patent) at Claim 1, Claim 7.
`
`Demonstrative Exhibit – Not Evidence
`
`44
`
`
`
`A POSA would not have understood
`“packet” to be limited to an IP packet
`
`Ex. 1399.019-.020 (Horst Reply Decl.);
`see also Paper 35 (Reply) at 10.
`
`Demonstrative Exhibit – Not Evidence
`
`45
`
`
`
`948 Patent refers to a “TCP packet” instead of a
`TPDU or segment; so “packet” not limited to IP
`
`Ex. 1001 (948 Patent.) at 10:57-61;
`see also Paper 35 (Reply) at 10.
`
`Demonstrative Exhibit – Not Evidence
`
`46
`
`
`
`Even if “packet” meant “IP packet,” PO ignores
`that a TPDU/segment is part of an IP packet
`
`Ex. 1006.503 (Tanenbaum96);
`see also Paper 35 (Reply) at 10,
`Ex. 1003.015-.017 (Horst Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`47
`
`
`
`948 Patent: Claims 1, 17
`
`Ex. 1001 (948 Patent) at Claim 1, Claim 7.
`
`Demonstrative Exhibit – Not Evidence
`
`48
`
`
`
`Checking a characteristic of a TPDU is checking
`whether the IP packet has that characteristic
`
`Ex. 1399.017-.019
`(Horst Reply Decl.);
`see also Paper 35
`(Reply) at 11-12.
`
`Demonstrative Exhibit – Not Evidence
`
`49
`
`
`
`Institution Decision correctly noted the claims do
`not expressly recite checking at a particular layer
`
`Paper 7 (Institution Decision) at 27;
`see also Paper 35 (Reply) at 12.
`
`Demonstrative Exhibit – Not Evidence
`
`50
`
`
`
`Even if checking the network layer header
`were required (it is not), Thia does this
`
`Ex. 1015.003 (Thia); see also Paper 35 (Reply) at 12 n.4;
`Paper 2 (Petition) at 77.
`
`Demonstrative Exhibit – Not Evidence
`
`51
`
`
`
`Even if checking the IP header were required
`(it is not), Header Prediction does this
`
`Ex.1006.584-.585 (Tanenbaum96); see also Paper 35 (Reply) at 12.
`
`Demonstrative Exhibit – Not Evidence
`
`52
`
`
`
`PO makes the same flawed arguments
`regarding the protocol processing limitations
`
`Paper 18 (POR) at 38-50;
`Paper 35 (Reply) at 12.
`
`53
`
`
`
`948 Patent: Disputes
`
`2. The prior art combinations disclose the limitations of the
`challenged claims of the 948 Patent
`a. The combination discloses a network interface
`checking whether packets are IP fragmented
`b. The combination discloses checking whether “packets”
`have certain exception conditions / the combination
`discloses the protocol stack processing exception
`conditions
`c. The combination discloses bypassing host protocol
`stack processing and storing data from packets
`without exception conditions (Board previously
`found that Thia and Tanenbaum96 teach this)
`
`Demonstrative Exhibit – Not Evidence
`
`54
`
`
`
`948 Patent: Claims 1, 17
`
`Ex. 1001 (948 Patent) at Claim 1, Claim 7.
`
`Demonstrative Exhibit – Not Evidence
`
`55
`
`
`
`The Board previously found Thia and Tanenbaum96
`teach storing data on the host without TCP headers
`
`IPR2017-01409 Paper 79 (FWD) at 10-11;
`see also Paper 35 (Reply) at 13.
`
`Demonstrative Exhibit – Not Evidence
`
`56
`
`
`
`PO cites to Thia’s TX (not RX) disclosures, to
`argue Thia transfers a whole PDU to the host
`
`Paper 18 (POR) at 38-40; Paper 35 (Reply) at 13.
`
`Demonstrative Exhibit – Not Evidence
`
`57
`
`
`
`Dr. Horst (and Dr. Lin) explain that
`Thia’s disclosure is for transmitting data
`
`Ex. 1399.021-.022 (Horst Reply Decl.);
`see also Paper 35 (Reply) at 13.
`
`Demonstrative Exhibit – Not Evidence
`
`58
`
`
`
`TCP/IP strips off headers
`
`Ex. 1003.024 (Horst Decl.);
`see also Paper 35 (Reply) at 13.
`
`Demonstrative Exhibit – Not Evidence
`
`59
`
`
`
`Thia discloses transferring data to the host from
`the ROPE chip after processing the packet
`
`Ex. 1015.003, .007 (Thia);
`see also Paper 35 (Reply) at 13-14.
`
`Demonstrative Exhibit – Not Evidence
`
`60
`
`
`
`Thia discloses transferring data to the host from
`the ROPE chip after processing the packet
`
`Ex. 1015.007 (Thia); see also Paper 35 (Reply) at 13-14.
`
`Demonstrative Exhibit – Not Evidence
`
`61
`
`
`
`Tanenbaum96 teaches that TCP reconstructs
`the original byte streams (i.e. w/o headers)
`
`Ex.1006.540 (Tanenbaum96);
`see also Paper 35 (Reply) at 14.
`
`Demonstrative Exhibit – Not Evidence
`
`62
`
`
`
`U.S. Patent No. 7,124,205
`(205 Patent)
`
`IPR2018-0226 (Intel)
`IPR2018-0400 (Cavium)
`IPR2018-1306 (Dell)
`
`*All citations herein are to the IPR2018-00226 case unless otherwise noted.
`
`63
`
`
`
`205 Patent: Instituted Grounds
`
`• Thia in view of SMB
` Claims 1, 4, 5, 8, 11 and 13
`• Thia in view of SMB and Carmichael
` Claims 6 and 7
`
`Ex. 1015 – Thia, Y.H., Woodside, C.M. Publication (“Thia”)
`Ex. 1055 – CAE Specification, Protocols for X/Open PC Interworking: SMB, Version 2 (“SMB”)
`Ex. 1053 – U.S. Patent No. 5,894,560 (“Carmichael”)
`
`Demonstrative Exhibit – Not Evidence
`
`64
`
`
`
`205 Patent: Disputes
`
`1. Thia is enabling prior art
`2. Thia teaches the network interface device performing all
`network and transport layer processing
`3. A POSA would have been motivated to combine Thia and
`SMB (as well as Carmichael)
`4. Motion to Amend 205 Patent should be denied
`
`Demonstrative Exhibit – Not Evidence
`
`65
`
`
`
`The Board Has Rejected Many Of PO’s
`Arguments
`
`• This Petition involves same patent and primary reference as in prior
`related IPRs, including on 205 Patent
`• Board has previously rejected PO’s arguments
`•
`205 FWD at 6-7 – finding Thia teaches network layer bypass (slides 76-82)
`•
`205 FWD at 8-9 – finding Thia teaches transport layer bypass (slides 83-90)
`•
`205 FWD at 23-24 – finding Thia teaches offloading the full protocol stack,
`including reassembly, to bypass (slides 83-90)
`205 FWD at 9-10 – rejecting PO’s argument that Thia as a “feasibility study”
`undermines motivations to combine (slides 93-94)
`205 FWD at 10-14 – rejecting PO’s arguments for secondary considerations
`and finding lack of nexus (slides 190-191)
`880 FWD at 8-9 – rejecting PO’s arguments that Thia discloses “inoperative
`device” (slides 68-72)
`
`•
`
`•
`
`•
`
`IPR2017-01405 Paper 84 (205 Patent Final Written Decision)
`IPR2017-01409 Paper 79 (880 Patent Final Written Decision).
`
`Demonstrative Exhibit – Not Evidence
`
`66
`
`
`
`205 Patent: Disputes
`
`1. Thia is enabling prior art (Board previously sided
`with Petitioner)
`2. Thia teaches the network interface device performing all
`network and transport layer processing
`3. A POSA would have been motivated to combine Thia and
`SMB (as well as Carmichael)
`4. Motion to Amend 205 Patent should be denied
`
`Demonstrative Exhibit – Not Evidence
`
`67
`
`
`
`PO Fails To Identify Why Thia Is
`Allegedly Not Enabling
`
`• PO contends that Thia is an “inoperative device” and is
`therefore a non-enabling reference
`
`Paper 23 (Response) at 18.
`
`• PO’s expert, Dr. Almeroth, essentially repeats the
`opposition and does not provide any additional
`information or arguments
`
`• A non-enabling reference can be prior art “for all that it
`teaches”
`
`Id. (citing Beckman Instruments v. LKB Produkter AB, 892 F.2d 1547, 1551 (Fed. Cir. 1989)).
`
`Demonstrative Exhibit – Not Evidence
`
`68
`
`
`
`Dr. Lin: Thia Is Not A Theoretical Device
`
`Ex. 1015.008 (Thia).
`
`• Thia discloses a design ready to be fabricated into a chip
`
`Ex. 1399, ¶ 7 (Lin Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`69
`
`
`
`Thia Is Based On Well-known Header
`Prediction Algorithm
`
`Ex. 1015.002 (Thia); see also Paper 1 (Petition)
`at 24-25.
`
`Demonstrative Exhibit – Not Evidence
`
`70
`
`
`
`Dr. Lin: Thia Is Enabling To A POSA
`
`A POSA would have been able to
`understand and implement Thia’s
`teachings, which is one of many
`implementations of Van Jacobson’s
`header prediction
`
`Ex. 1399, ¶¶ 6-7 (Lin Reply Decl.).
`see also Ex. 1003, ¶ 71, A-12 – A-14 (Lin Decl.).
`
`* * *
`
`See Ex. 1003, ¶¶ 35-40 (Lin Decl.);
`see also Paper 1 (Petition) at 21, 23.
`
`Demonstrative Exhibit – Not Evidence
`
`71
`
`
`
`205 Patent: Disputes
`
`2. Thia teaches the network interface device performing
`all network and transport layer processing (Board
`previously sided with Petitioner)
`a. Thia teaches the network interface device performs all network
`layer processing
`
`b. Thia teaches the network interface device performs all transport
`layer processing
`
`Demonstrative Exhibit – Not Evidence
`
`72
`
`
`
`205 Patent: Claim 1
`
`Ex. 1001 (205 Patent) at Claim 1.
`
`Demonstrative Exhibit – Not Evidence
`
`73
`
`
`
`205 Patent: Disputes
`
`2. Thia teaches the network interface device performing all
`network and transport layer processing (Board previously
`sided with Petitioner)
`a. Thia teaches the network interface device performs all
`network layer processing
`
`b. Thia teaches the network interface device performs all transport
`layer processing
`
`Demonstrative Exhibit – Not Evidence
`
`74
`
`
`
`Thia: Bypass All Network Layer
`Processing In The Data Transfer Phase
`
`“The bypass stack performs
`all the relevant protocol
`processing in the data
`transfer phase.”
`
`Ex. 1015.003 (Thia);
`Paper 1 (Petition) at 50;
`Ex. 1003, ¶¶ 74-76 (Lin Decl.);
`see also Ex. 1399, ¶ 14 (Lin Reply Decl.).
`
`Ex.1015.003 (Thia) at Fig. 1 (annotated);
`see, e.g., Ex. 1003, A-14 (Lin Decl.);
`see also Paper 1 (Petition) at 49-51.
`
`Demonstrative Exhibit – Not Evidence
`
`75
`
`
`
`Thia: Bypass Multiple Layers, Including
`Network Layer
`
`Ex.1015.004 (Thia);
`Paper 1 (Petition) at 33, 55, 61;
`Paper 42 (Reply) at 6.
`
`Demonstrative Exhibit – Not Evidence
`
`76
`
`
`
`OSI Model Has Multiple Layers, Which
`Must Be Processed In Order
`
` The network layer
`must be processed
`before the transport
`and session layers
` It is undisputed that
`Thia discloses
`processing the
`transport and session
`layers on the adapter
`
`See e.g., Ex. 1006 (Tanenbaum96) at Fig. 1-17;
`Paper 1 (Petition) at 20-23, 45, 55, 60;
`Paper 42 (Reply) at 6-7;
`Ex. 1399, ¶¶ 9-11 (Lin Reply Decl.);
`Paper 23 (Response) at 2;
`Ex. 2026, ¶ 65 (Almeroth Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`77
`
`
`
`205 Patent: Disputes
`
`2. Thia teaches the network interface device performing all
`network and transport layer processing (Board previously
`sided with Petitioner)
`a. Thia teaches the network interface device performs all network
`layer processing
`
`b. Thia teaches the network interface device performs all
`transport layer processing
`i.
`The claims do not recite “reassembly”
`Thia discloses transport layer reassembly of the data
`ii.
`portions of packets
`iii. The “segmentation/reassembly” discussed in Thia is below the
`transport layer
`
`Demonstrative Exhibit – Not Evidence
`
`78
`
`
`
`Thia’s Transport Layer Bypass Includes
`“Reassembly”
`
`• PO does not dispute that some transport layer processing
`is performed on the bypass path, but argues that
`“reassembly” of incoming packets is missing from Thia:
`
`“Crucially, Thia does not disclose bypassing the
`reassembly of incoming packets, which is a primary
`responsibility of the transport layer”
`
`Paper 23 (Response) at 33-34.
`
`Demonstrative Exhibit – Not Evidence
`
`79
`
`
`
`Claims Do Not Recite “Reassembly”
`
`Ex. 1001 (205 Patent) at Claim 1.
`
`Demonstrative Exhibit – Not Evidence
`
`80
`
`
`
`Claims Do Not Recite “Reassembly”
`
`Ex. 1001 (205 Patent) at Claim 8.
`
`Demonstrative Exhibit – Not Evidence
`
`81
`
`
`
`205 Patent: Disputes
`
`2. Thia teaches the network interface device performing all
`network and transport layer processing (Board previously
`sided with Petitioner)
`a. Thia teaches the network interface device performs all network
`layer processing
`
`b. Thia teaches the network interface device performs all
`transport layer processing
`i.
`The claims do not recite “reassembly”
`Thia discloses transport layer reassembly of the data
`ii.
`portions of packets
`iii. The “segmentation/reassembly” discussed in Thia is below the
`transport layer
`
`Demonstrative Exhibit – Not Evidence
`
`82
`
`
`
`Thia: Bypass Functions Can Be
`Extended
`
`Ex. 1015.014 (Thia);
`Ex. 1399, ¶ 16 (Lin Reply Decl.).
`
`Demonstrative Exhibit – Not Evidence
`
`83
`
`
`
`Thia: Put Incoming Packets In The Right
`Order In The Transport Layer
`
`Ex.1015.010 (Thia);
`Paper 42 (Reply) at 9-10.
`
`Demonstrative Exhibit – Not Evidence
`
`84
`
`
`
`Thia: DMA Data Portions Of PDUs To
`The Host In The Bypass Path
`
`Ex. 1015.007 (Thia);
`Paper 42 (Reply) at 9-10;
`Ex. 1399 (Lin Reply Decl.) ¶ 17.
`
`Demonstrative Exhibit – Not Evidence
`
`85
`
`
`
`Thia: DMA Data Portions Of PDUs To
`The Host In The Bypass Path
`
`Ex. 1015.002 (Thia);
`Ex. 1399 (Lin Reply Decl.) ¶ 17.
`
`Demonstrative Exhibit – Not Evidence
`
`86
`
`
`
`205 Patent: Disputes
`
`2. Thia teaches the network interface device performing all
`network and transport layer processing (Board previously
`sided with Petitioner)
`a. Thia teaches the network interface device performs all network
`layer processing
`
`b. Thia teaches the network interface device performs all
`transport layer processing
`i.
`The claims do not recite “reassembly”
`Thia discloses transport layer reassembly of the data
`ii.
`portions of packets
`iii. The “segmentation/reassembly” discussed in Thia is below the
`transport layer
`
`Demonstrative Exhibit – Not Evidence
`
`87
`
`
`
`Thia’s Segmentation/Reassembly For ATM
`Is Not Transport Layer Reassembly
`
`Ex. 1015.014 (Thia).
`Thia’s “segmentation/reassembly” is
`fragmenting/re-assembling portions of
`packets at a layer below the transport layer.
`
`See, e.g., Paper 42 (Reply) at 8-9;
`Ex. 1399 (Lin Reply Decl.) ¶ 15.
`
`Demonstrative Exhibit – Not Evidence
`
`88
`
`
`
`Dr. Lin: Thia’s Segmentation/Reassembly
`For ATM Not Transport Layer Reassembly
`
`Ex. 1399 (Lin Reply Decl.) ¶ 15.
`
`Demonstrative Exhibit – Not Evidence
`
`89
`
`
`
`205 Patent: Disputes
`
`1. Thia is enabling prior art
`2. Thia teaches the network interface device performing all
`network and transport layer processing
`3. A POSA would have been motivated to combine Thia
`and SMB (as well as Carmichael)
`4. Motion to Amend 205 Patent should be denied
`
`Demonstrative Exhibit – Not Evidence
`
`90
`
`
`
`205 Patent: Disputes
`
`3. A POSA would have been motivated to combine Thia and
`SMB (as well as Carmichael)
`a. A POSA would have used Thia’s bypass system with the SMB
`protocol of the SMB reference
`
`b. The motivations to further include Carmichael are unrebutted by
`PO
`
`c. The Petition includes sufficient evidence regarding expectation of
`success
`
`Demonstrative Exhibit – Not Evidence
`
`91
`
`
`
`Thia’s Bypass Would Have Been
`Improved By SMB’s SMB Protocol
`
`Demonstrative Exhibit – Not Evidence
`
`Paper 1 (Petition) at 40;
`see also Ex.1003 (Lin Decl.) ¶¶ 90-95.
`
`92
`
`
`
`PO’s Only Criticism Of Combining Thia
`And SMB Is Thia Is Theoretical Reference
`
`• Board previously rejected this argument
`IPR2017-01405 Paper 84 (205 Patent Final Written Decision).
`
`Paper 23 (Response) at 36-37.
`
`Demonstrative Exhibit – Not Evidence
`
`93
`
`
`
`205 Patent: Disputes
`
`3. A POSA would have been motivated to combine Thia and
`SMB (as well as Carmichael)
`a. A POSA would have used Thia’s bypass system with the SMB
`protocol of the SMB reference
`
`b. The motivations to further include Carmichael are unrebutted
`by PO
`
`c. The Petition includes sufficient evidence regarding expectation of
`success
`
`Demonstrative Exhibit – Not Evidence
`
`94
`
`
`
`A POSA Would Have Been Motivated To
`Further Include Carmichael
`
`• PO does not address motivations to further include
`Carmichael
`
`Paper 23 (Response) at 40-41.
`
`Demonstrative Exhibit – Not Evidence
`
`95
`
`
`
`205 Patent: Disputes
`
`3. A POSA would have been motivated to combine Thia and
`SMB (as well as Carmichael)
`a. A POSA would have used Thia’s bypass system with the SMB
`protocol of the SMB reference
`
`b. The motivations to further include Carmichael are unrebutted by
`PO
`
`c. The Petition includes sufficient evidence regarding
`expectation of success
`
`Demonstrative Exhibit – Not Evidence
`
`96
`
`
`
`Dr. Lin: Reasonable Expectation Of
`Successful Combination
`
`Ex. 1003 (Lin Decl.) ¶ 94; see also Paper 1 (Petition) at 40-41.
`
`Demonstrative Exhibit – Not Evidence
`
`97
`
`
`
`PO Failed To Rebut Reasonable
`Expectation Of Successful Combination
`
`• PO failed to identify any reason why there would not be a
`reasonable expectation of success
`• Did not provide any expert testimony or evidence to the
`contrary
`
`See Paper 23 (Response) at 26-27.
`
`Demonstrative Exhibit – Not Evidence
`
`98
`
`
`
`205 Patent: Disputes
`
`4. Motion to Amend 205 Patent should be denied
`a. PO has not met its burden of production under 35 U.S.C. §
`316(d) due to its failure to provide adequate written
`description support
`
`b. The prior art discloses each limitation of the substitute claims
`
`Demonstrative Exhibit – Not Evidence
`
`99
`
`
`
`PO Provided Identical String Citations
`For All Limitations
`
`Paper 20 (Motion to Amend) at Appendix A, 8.
`Paper 20 (Motion to Amend) at Appendix B, 19.
`Demonstrative Exhibit – Not Evidence
`
`100
`
`
`
`PO’s Amendments Lack Written
`Description Support
`
`• PO provides no explanation for why the alleged written
`description supports “allocating the [first] address space of
`the destination memory for placement of data” in
`substitute claim 37 or 42
`• Only specific quote in support is from Paragraph 56 of the
`124 Application
`• Paragraph 56 is about processing a file write message,
`not a response to a solicited read command
`
`Demonstrative Exhibit – Not Evidence
`
`101
`
`
`
`PO’s Amendments Lack Written
`Description Support
`
`“Address space” used for first time in substitute claims
`•
`• Not in specification or original claims
`• No claim construction offered
`• Definition not clear to a POSA
`
`See Ex.1305 (Lin Decl. ISO Petitioner’s Opp. To Mtn. to Amend) ¶¶ 25-27.
`
`Demonstrative Exhibit – Not Evidence
`
`102
`
`
`
`205 Patent: Disputes
`
`4. Motion to Amend 205 Patent should be denied
`a. PO has not met its burden of production under 35 U.S.C. § 316(d)
`due to its failure to provide adequate written description support
`
`b. The prior art discloses each limitation of the substitute claims
`
`Demonstrative Exhibit – Not Evidence
`
`103
`
`
`
`205 Patent: Grounds For Substitute
`Claims
`
`• Thia in combination with SMB and APA
` Claims 37-39 and 42-44
`• Thia in combination with SMB,
`Carmichael, and APA
` Claims 40-41
`
`Demonstrative Exhibit – Not Evidence
`
`104
`
`
`
`1997 Provisional’s Teachings Of Windows NT
`Are Admitted Prior Art (APA)
`
`•
`
`“A statement in a patent that something is in the prior art is
`binding on the applicant and patentee for determinations
`of anticipation and obviousness.”
`WesternGeco LLC v. ION Geophysical Corp., 889 F.3d 1308, 1329-30
`(Fed. Cir. 2018).
`
`• Admitted prior art falls within 35 U.S.C. § 311(b) and “a
`patentee’s admissions constitute background knowledge
`that may be imputed to a person of ordinary skill in the art
`for purposes of an obviousness analysis.”
`
`G.B.T. Inc. v. Walletex Microelectronics Ltd., IPR2018-00326, Paper 14
`at 15 (P.T.A.B. Jul. 5, 2018) (citing Randall Mfg. v. Rea, 733 F.3d 1355,
`1363 (Fed. Cir. 2013).
`
`Demonstrative Exhibit – Not Evidence
`
`105
`
`
`
`1997 Provisional Admits The Features In
`Its Amendments Are In The Prior Art
`
`Claim Language:
`
`“wherein the fast-path processing of the response follows
`the protocol stack processing a first response to the
`solicited read command to set up a fast-path connection”
`
`“allocating the address space of the destination memory
`for placement of data”
`
`“placing a data portion of the first response into the
`address of the destination memory”
`
`Ex. 1031 (1997 Provisional FH) at .011-.012.
`Demonstrative Exhibit – Not Evidence
`
`106
`
`
`
`1997 Provisional Admits The Features In
`Its Amendments Are In The Prior Art
`
`Claim Language:
`“wherein the fast-path processing of the response follows
`the protocol stack processing a first response to the
`solicited read command to set up a fast-path connection”
`“allocating the address space of the destination memory
`for placement of data”
`“placing a data portion of the first response into the
`address of the destination memory”
`
`Ex. 1031 (1997 Provisional FH) at .012.
`Demonstrative Exhibit – Not Evidence
`
`107
`
`
`
`PO’s Cited Support Undermines Its
`Arguments Against APA and SMB
`
`Ex. 2022 (US 2002/0091844) ¶ 91
`(cited in support of PO amendments at Paper 20, Appx. A).
`
`Demonstrative Exhibit – Not Evidence
`
`108
`
`
`
`POSA Would Be Motivated To Combine
`Thia, SMB And APA
`
`• Thia and SMB teach using DMA to transfer data from a
`network interface to host memory
`• Thia and SMB teach using DMA engine to receive bulk data
`• APA teaches that Windows NT allocates and provided host
`destination address for that received data
`See Ex. 1305 (Lin Decl. ISO Petitioner’s Opp. To Mtn. to Amend) ¶ 22.
`
`Demonstrative Exhibit – N
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