`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`MARSHALL DIVISION
`
`
`ALACRITECH, INC.,
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`Plaintiff,
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`v.
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`CENTURYLINK, INC., et al.,
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`Defendants.
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`
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`Civil Action No. 2:16-cv-693-JRG
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`JURY TRIAL DEMANDED
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`
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`ANSWER AND COUNTERCLAIMS TO
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`INTEL CORPORATION’S COMPLAINT IN INTERVENTION
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`Plaintiff Alacritech, Inc. (“Alacritech”) responds to Intervenor Intel Corporation’s
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`(“Intel”) Complaint in Intervention as follows. Any allegation Alacritech does not expressly
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`admit should be deemed denied.
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`PARTIES
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`1.
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`Alacritech admits that Intel purports to seek declaratory judgment of non-
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`infringement in its Complaint in Intervention. Alacritech denies the remaining allegations of
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`Paragraph 1 of the Complaint in Intervention.
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`2.
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`Alacritech is without knowledge or information sufficient to form a belief as to
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`the truth of the allegations of Paragraph 2 of the Complaint in Intervention, and therefore denies
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`them.
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`3.
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`4.
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`Alacritech admits the allegations of Paragraph 3 of the Complaint in Intervention.
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`Alacritech admits that it has brought patent claims against Defendant Dell, Inc.
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`(“Dell”) in this action under 35 U.S.C. §§ 101 et seq, and that this Court has subject matter
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`jurisdiction over those claims pursuant to 28 U.S.C. §§ 1331 and 1338(a). Alacritech is without
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`
`
`1
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 2 of 139 PageID #: 2234
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`knowledge or information sufficient to form a belief as to the truth of the remaining allegations
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`of Paragraph 4 of the Complaint in Intervention, and therefore denies them.
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`5.
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`Alacritech admits the allegations of Paragraph 5 of the Complaint in Intervention.
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`BACKGROUND AND INTEL’S INTEREST IN THIS LAWSUIT
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`6.
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`Alacritech admits that on June 30, 2016, it filed its Complaint in this action
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`accusing Dell of making, using, selling, offering to sell and/or importing Dell products and
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`services that infringe United States Patent Nos. 7,124,205; 7,237,036; 7,337,241; 7,673,072;
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`7,945,699; 8,131,880; 8,805,948; and 9,055,104 (respectively, the ‘205 Patent, the ‘036 Patent,
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`the ‘241 Patent, the ‘072 Patent, the ‘699 Patent, the ‘880 Patent, the ‘948 Patent, and the ‘104
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`Patent; collectively, the “Asserted Patents”). Alacritech is without knowledge or information
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`sufficient to form a belief as to the truth of the remaining allegations of Paragraph 6 of the
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`Complaint in Intervention, and therefore denies them.
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`7.
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`8.
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`Alacritech admits the allegations of Paragraph 7 of the Complaint in Intervention.
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`Alacritech admits that some of Alacritech’s allegations under the Asserted Patents
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`are directed against infringing Dell products and services that have certain Intel component’s.
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`Alacritech denies the remaining allegations of Paragraph 8 of the Complaint in Intervention.
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`9.
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`Alacritech admits that its Complaint alleges that Dell infringes certain of the
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`asserted patents by making, using, selling, offering for sale, and/or importing Dell products and
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`services that have the Intel Ethernet Network Daughter Card X520-DA2/I350-T2 as a
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`component, among other components. Alacritech further admits that its infringement allegations
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`are based, in part, on Dell products and services that have the Intel 82599 Ethernet Controller as
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`a component, among other components, and that the Intel 82599 Datasheet is cited in
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`
`
`2
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 3 of 139 PageID #: 2235
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`Alacritech’s Complaint. Alacritech denies the remaining allegations of Paragraph 9 of the
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`Complaint in Intervention.
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`10.
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`Alacritech is without knowledge or information sufficient to form a belief as to
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`the truth of the allegations of Paragraph 10 of the Complaint in Intervention, and therefore denies
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`them.
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`11.
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`Alacritech is without knowledge or information sufficient to form a belief as to
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`the truth of the allegations of Paragraph 11 of the Complaint in Intervention, and therefore denies
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`them.
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`COUNT 1
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,124,205
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`12.
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`Alacritech incorporates by reference Paragraphs 1-11 of this Answer as if set forth
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`fully here.
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`13.
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`Alacritech denies the allegations of Paragraph 13 of the Complaint in
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`Intervention.
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`14.
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`Alacritech denies the allegations of Paragraph 14 of the Complaint in
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`Intervention.
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`15.
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`Alacritech denies the allegations of Paragraph 15 of the Complaint in
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`Intervention.
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`16.
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`Alacritech denies the allegations of Paragraph 16 of the Complaint in
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`Intervention.
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`COUNT II
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,237,036
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`3
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 4 of 139 PageID #: 2236
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`17.
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`Alacritech incorporates by reference Paragraphs 1-16 of this Answer as if set forth
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`fully here.
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`18.
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`Alacritech denies the allegations of Paragraph 18 of the Complaint in
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`Intervention.
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`19.
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`Alacritech denies the allegations of Paragraph 19 of the Complaint in
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`Intervention.
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`20.
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`Alacritech denies the allegations of Paragraph 20 of the Complaint in
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`Intervention.
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`21.
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`Alacritech denies the allegations of Paragraph 21 of the Complaint in
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`Intervention.
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`COUNT III
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,337,241
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`22.
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`Alacritech incorporates by reference Paragraphs 1-21 of this Answer as if set forth
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`fully here.
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`23.
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`Alacritech denies the allegations of Paragraph 23 of the Complaint in
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`Intervention.
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`24.
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`Alacritech denies the allegations of Paragraph 24 of the Complaint in
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`Intervention.
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`25.
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`Alacritech denies the allegations of Paragraph 25 of the Complaint in
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`Intervention.
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`26.
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`Alacritech denies the allegations of Paragraph 26 of the Complaint in
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`Intervention.
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`COUNT IV
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`4
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 5 of 139 PageID #: 2237
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,673,072
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`27.
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`Alacritech incorporates by reference Paragraphs 1-26 of this Answer as if set forth
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`fully here.
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`28.
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`Alacritech denies the allegations of Paragraph 28 of the Complaint in
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`Intervention.
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`29.
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`Alacritech denies the allegations of Paragraph 29 of the Complaint in
`
`Intervention.
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`30.
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`Alacritech denies the allegations of Paragraph 30 of the Complaint in
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`Intervention.
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`31.
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`Alacritech denies the allegations of Paragraph 31 of the Complaint in
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`Intervention.
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`COUNT VI
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 8,131,880
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`32.
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`Alacritech incorporates by reference Paragraphs 1-31 of this Answer as if set forth
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`fully here.
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`33.
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`Alacritech denies the allegations of Paragraph 33 of the Complaint in
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`Intervention.
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`34.
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`Alacritech denies the allegations of Paragraph 34 of the Complaint in
`
`Intervention.
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`35.
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`Alacritech denies the allegations of Paragraph 35 of the Complaint in
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`Intervention.
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`36.
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`Alacritech denies the allegations of Paragraph 36 of the Complaint in
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`Intervention.
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`5
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 6 of 139 PageID #: 2238
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`COUNT VII
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 8,805,948
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`37.
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`Alacritech incorporates by reference Paragraphs 1-36 of this Answer as if set forth
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`fully here.
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`38.
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`Alacritech denies the allegations of Paragraph 38 of the Complaint in
`
`Intervention.
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`39.
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`Alacritech denies the allegations of Paragraph 39 of the Complaint in
`
`Intervention.
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`40.
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`Alacritech denies the allegations of Paragraph 40 of the Complaint in
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`Intervention.
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`41.
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`Alacritech denies the allegations of Paragraph 41 of the Complaint in
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`Intervention.
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`COUNT VIII
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 9,055,104
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`42.
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`Alacritech incorporates by reference Paragraphs 1-41 of this Answer as if set forth
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`fully here.
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`43.
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`Alacritech denies the allegations of Paragraph 43 of the Complaint in
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`Intervention.
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`44.
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`Alacritech denies the allegations of Paragraph 44 of the Complaint in
`
`Intervention.
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`45.
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`Alacritech denies the allegations of Paragraph 45 of the Complaint in
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`Intervention.
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`6
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 7 of 139 PageID #: 2239
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`46.
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`Alacritech denies the allegations of Paragraph 46 of the Complaint in
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`Intervention.
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`REQUEST FOR RELIEF
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`Alacritech denies that Intel is entitled to any of the relief requested in its Request for
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`Relief.
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`DEMAND FOR JURY TRIAL
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`Alacritech admits that Intel demands a trial by jury on all issues so triable in this action.
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`Alacritech also demands a trial by jury on all issues so triable.
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`7
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`
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`COUNTERCLAIMS FOR PATENT INFRINGEMENT
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`In these counterclaims for patent infringement under 35 U.S.C. § 271 in response to Intel
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`Corporation’s (“Intel”) intervention in Case No. 2:16-cv-00692 to defend Dell, Plaintiff
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`Alacritech, Inc. (“Alacritech”), by and through its undersigned counsel, complains and alleges as
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`follows against Intervenor Intel, based on Alacritech’s own personal knowledge and upon
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`information and belief with respect to Intel’s actions:
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`THE PARTIES
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`1.
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`Alacritech is a California corporation with its principal place of business at P.O.
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`Box 20307, San Jose, California 95160.
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`2.
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`Intel is a Delaware corporation with its principal place of business in Santa Clara,
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`California.
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`NATURE OF THE ACTION
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`3.
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`This is a civil action for patent infringement arising under the patent laws of the
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`United States, 35 U.S.C. § 1, et seq.
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`4.
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`Intel has infringed and continues to infringe, has contributed to and continues to
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`contribute to the infringement of, and has actively induced and continues to actively induce
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`others to infringe the following Alacritech patents: U.S. Patent Numbers 7,124,205; 7,237,036;
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`7,337,241; 7,673,072; 7,945,699; 8,131,880; 8,805,948; and 9,055,104 (collectively, the
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`“Asserted Patents”). Alacritech is the legal owner by assignment of the Asserted Patents, which
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`were all duly and legally issued by the United States Patent and Trademark Office. Alacritech
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`seeks injunctive relief and monetary damages.
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`
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`8
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 9 of 139 PageID #: 2241
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`JURISDICTION AND VENUE
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`5.
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`This is a civil action for patent infringement arising under the patent laws of the
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`United States, 35 U.S.C. § 1, et seq., including § 271. This Court has subject matter jurisdiction
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`over this action under 28 U.S.C. §§ 1331 and 1338(a).
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`6.
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`This Court has personal jurisdiction over Intel because, among other reasons, of
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`Intel’s filing of its Complaint in Intervention in this action, and Intel’s Motion to Intervene
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`whereby Intel expressly asked this Court for the opportunity to adjudicate its declaratory
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`judgment claims in this District, and because of this Court’s grant of Intel’s request.
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`7.
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`In addition, Intel regularly conducts business in Texas, including in this District,
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`and Intel has committed and continues to commit direct and indirect acts of patent infringement
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`complained of herein within this District and elsewhere in Texas and the United States. For
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`example, Intel maintains facilities in Austin, Texas. In addition, Intel advertises, sells, and
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`provides its products and services, including infringing products and services complained of
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`herein, directly to businesses and consumers in this District. As such, Intel has purposefully
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`availed itself of the privilege of conducting business within this District, has established
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`sufficient minimum contacts with this District such that Intel should reasonably and fairly
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`anticipate being haled into this Court, and has purposefully directed activities at residents in this
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`District, wherein at least a portion of the claims alleged herein arise out of or are related to those
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`activities.
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`8.
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`Venue is proper in this District under 28 U.S.C. §§ 1391(b)-(c) and 1400(b) at
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`least because, as discussed above, Intel is subject to personal jurisdiction in this District,
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`regularly conducts business in this District, and has committed and continues to commit direct
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`and indirect acts of patent infringement complained of herein within this District.
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`9
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 10 of 139 PageID #: 2242
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`FACTUAL BACKGROUND
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`Alacritech’s History
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`9.
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`Alacritech was founded in 1997 by technology pioneer Larry Boucher, the creator
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`and author of the original Small Computer System Interface (“SCSI”) specification and a
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`visionary, award-winning leader in server adapter, storage and networking technologies.
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`10. Mr. Boucher has more than 50 years of experience in the industry. Following a
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`twelve-year tenure in IBM’s Storage Division, he served as director of design services at Shugart
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`Associates, where he developed the Shugart Associates System Interface (“SASI”) and then
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`SCSI, the industry standard for connecting storage and other peripherals to PCs and servers. In
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`1981, Mr. Boucher founded Adaptec, Inc., which became a global leader for host adapters and
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`other innovative storage solutions. After taking Adaptec public, Mr. Boucher founded Auspex
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`Systems, Inc., a manufacturer of enterprise servers, where he pioneered the networked file
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`system design that is the basis of today’s network-attached storage (“NAS”) model. In 1997,
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`Mr. Boucher founded Alacritech.
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`11.
`
` Mr. Boucher and other innovators at Alacritech (including Peter Craft, Clive
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`Philbrick, Stephen Blightman, David Higgen, and Daryl Starr) foresaw the convergence of
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`storage and networking and, as a result, the enormous processing demands that would be placed
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`on host computer CPUs in order to move and store large quantities of data within a network,
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`creating bottlenecks and reducing CPU processing power available for performing more
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`substantive computing tasks. To solve this impending problem, the Alacritech team pioneered a
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`series of fundamental network acceleration technologies, including but not limited to techniques
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`for streamlining, bypassing and/or offloading aspects of conventional network protocol
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`processing from host CPUs to “intelligent” network interface devices (sometimes called
`
`“NIDs”). These technologies are critical to modern network computing, dramatically increasing
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`10
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 11 of 139 PageID #: 2243
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`the speed and efficiency with which data is transferred and stored, while reducing the associated
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`processing burden imposed on host CPUs.
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`12. Working with industry partners, Alacritech released a number of network and
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`storage products related to the technologies it developed. For example, Alacritech produced a
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`series of Scalable Network Accelerators (also referred to as TCP Offload Engine (TOE) Network
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`Interface Cards (TNICs)) and the ANX 1500, a sophisticated Network File System (NFS)
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`Throughput Acceleration Appliance for use with Network-Attached Storage (NAS) systems.
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`Alacritech’s Asserted Patents
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`13.
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`Network computing is ubiquitous in contemporary society. It enables the
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`dissemination of information and digital content to people around the world, and it is a critical
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`component of the modern information economy. Many businesses have their own data centers
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`(made up of large numbers of networked servers) that they use for the remote storage,
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`management, processing, and/or distribution of their data. And a lucrative and rapidly-growing
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`industry has developed to provide cloud computing services, which essentially allow businesses
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`(and consumers) to offload their data to shared, third-party data centers.
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`14.
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`However, as growing volumes of data are moved across networks of increasing
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`complexity and bandwidth, more and more of the processing power of the servers (and/or other
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`computers) in a network is consumed by simply moving and storing the data, greatly diminishing
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`the ability of the servers to perform other more substantive tasks. In addition, bottlenecks
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`develop when there is insufficient processing power available to transfer data, and the data
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`cannot be moved as quickly or efficiently as desired. The Alacritech team foresaw these
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`problems years ago and, to address them, they developed and patented a collection of innovative
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`network acceleration techniques that dramatically speed up the transfer and storage of data, and
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`
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`11
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 12 of 139 PageID #: 2244
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`decrease the corresponding processing demands on servers. Alacritech holds 71 United States
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`patents covering its groundbreaking inventions.
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`15.
`
` Conventionally, computers connected over a network rely on a multi-layered
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`software architecture to transfer and store data. The architecture (also called a protocol stack) is
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`generally based on one or more specifications and/or protocols, such as TCP/IP (a protocol suite
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`including the Transmission Control Protocol (“TCP”) and Internet Protocol (“IP”)). Depending
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`on the specifications and/or protocols at issue, the architecture may include up to seven different
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`layers described by the Open Systems Interconnection (OSI) model (listed, in order, from highest
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`to lowest): the application layer, the presentation layer, the session layer, the transport layer, the
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`network layer, the data link layer, and the physical layer. Each software layer performs different
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`functions associated with transferring and storing data.
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`16.
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`In order to prepare data for transmission over a network, a sending computer must
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`process the data through each layer of the protocol stack (working from highest to lowest). At
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`each layer, the sending computer must perform further processing on the data resulting from
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`processing by the previous layer, such as preparing and attaching a new header containing
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`associated metadata. In the transport layer, the sending computer must also divide the data up
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`into units (e.g., packets) that are small enough to be transmitted over the network medium.
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`Likewise, a receiving computer must process incoming data through each layer of the same
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`protocol stack (working from lowest to highest) before it can be used by host applications on the
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`receiving computer. At each layer, the receiving computer must perform further processing on
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`the data resulting from processing by the previous layer, such as removing and processing an
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`additional header and, in the transport layer, combining multiple units of data together in
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`12
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 13 of 139 PageID #: 2245
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`memory. In both the sending and receiving operations, the computer may move and/or make a
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`new copy of the data each time another layer is processed.
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`17.
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`This conventional approach for transferring and storing data within a network,
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`while functional, is also slow and highly inefficient. Too much of the processing power of a
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`computer’s CPU is wasted performing brute-force, layer-by-layer processing. Recognizing these
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`inefficiencies early on, the Alacritech team developed sophisticated solutions that greatly
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`improve upon the conventional approach. Central to these solutions is Alacritech’s pioneering
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`use of dedicated NIDs to efficiently handle optimal portions of the processing associated with
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`sending, receiving, and storing data, particularly for complicated multi-layer protocol suites that
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`use variable-length units of data with multiple headers, such as TCP/IP.
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`18.
`
`Others in the industry attempted solutions that involved offloading essentially all
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`processing associated with data communications to a NID, completely bypassing the host CPU,
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`but they were unable to develop effective solutions that were suitable for TCP/IP and other more
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`complicated protocol suites involving maintenance of state and variable-length data units with
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`multiple headers, situations in which it is important that the host CPU remains involved in the
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`processing. Still others in the industry attempted solutions involving offload of discrete TCP/IP
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`processing tasks to a NID, but they were only able to offload very limited tasks, such as
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`checksum processing, that did not significantly reduce the processing burden on the host CPU.
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`19.
`
`Only Alacritech solved the problem of how to efficiently offload large portions of
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`communications processing to NIDs implementing TCP/IP and other more complicated protocol
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`suites. By offloading processing tasks to a dedicated NID in accordance with the solutions
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`provided by the Asserted Patents, transfer of data between devices is accelerated and the host
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`CPUs retain dramatically more processing power to perform other more substantive tasks,
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`13
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`without sacrificing the flexibility and control necessary to implement a complicated protocol
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`suite such as TCP/IP. Some of the innovative solutions and techniques developed by Alacritech
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`and claimed by the Asserted Patents are discussed below.
`
`20.
`
`Some of the Asserted Patents provide solutions that increase efficiency of
`
`network computing by using multiple paths to process received data, whereby an intelligent NID
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`uses criteria (e.g., provided by the host CPU) to determine whether incoming data should be
`
`processed directly by the NID (e.g., using a “fast-path”), or whether it should be passed to and
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`processed by the host CPU in the conventional manner (e.g., using a “slow-path”). This
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`substantially reduces the burden on the host CPU, while retaining its flexibility and control for
`
`handling exceptions and other complicated processing tasks. And, because the NID is
`
`specifically designed to perform these operations (usually in hardware), it can perform them
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`more efficiently and more quickly than a host CPU.
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`21.
`
`Alacritech also pioneered techniques that allow NIDs to transfer and store data
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`more quickly and efficiently. For example, some of the Asserted Patents provide solutions
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`through which NIDs transfer data to and from host memory associated with upper layer (e.g.,
`
`application layer) software, without unit-by-unit lower-layer processing by the host CPU and
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`without excessive intermediate copying of data in a series of intermediate buffers and/or caches.
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`In this way, data can be transferred to the network or the host memory directly by the NID,
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`without substantial processing by the host CPU or excessive intermediate copying, resulting in
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`much faster and more efficient transfer and storage of data.
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`22.
`
`As another example, some of the Asserted Patents provide solutions for more
`
`efficiently preparing and sending data over a network. For example, the NID uses information
`
`(e.g., provided by the host CPU) to divide data up into smaller units for transmission, and to
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`
`
`14
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 15 of 139 PageID #: 2247
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`generate and attach multiple lower-layer headers to the units of data. Moreover, it does so in
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`essentially a single operation, without the brute-force, layer-by-layer processing (and associated
`
`copying) required to carry out the same tasks under the conventional approach described above.
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`These solutions greatly reduce processing by the host CPU associated with sending data, and
`
`they allow the NID to prepare and transmit data more efficiently.
`
`23.
`
`Similarly, some of the Asserted Patents provide solutions for more efficiently
`
`processing data received from a network. For example, the NID removes and processes the
`
`lower-layer headers from related units of data, without the brute-force processing of those
`
`headers required under the conventional approach described above. In addition, the NID may
`
`combine processed data units into a single payload of data that it delivers to host memory. These
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`solutions greatly reduce processing by the host CPU associated with receiving and storing data,
`
`and they allow the NID to receive and process data more efficiently.
`
`24.
`
`The Asserted Patents are a product of Alacritech’s extensive research and
`
`development, reflecting groundbreaking innovations that are found throughout modern networks,
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`especially large-scale and/or high-end networks such as those used in data centers.
`
`25.
`
`The technologies covered by Alacritech’s Asserted Patents are critical to
`
`fundamental network and/or storage acceleration techniques, including Large Segment Offload
`
`(“LSO”) (also called Large Send Offload or Generic Segmentation Offload), Receive Side
`
`Coalescing (“RSC”) (also called Receive Segment Coalescing, Large Receive Offload, or
`
`Generic Receive Offload), and TCP Offload Engine (“TOE”). They are also essential to many
`
`network and/or storage protocols that incorporate Remote Direct Memory Access (“RDMA”),
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`such as the InfiniBand protocol, the RDMA over Converged Ethernet (“RoCE”) protocol, the
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`Internet Wide Area RDMA Protocol (“iWARP”), the Internet Small Computer System Interface
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`15
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 16 of 139 PageID #: 2248
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`(“iSCSI”) Extensions for RDMA (“iSER”) protocol, and the Server Message Block (“SMB”)
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`Direct protocol.
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`26. Without
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`the benefit of Alacritech’s groundbreaking
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`inventions, modern
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`computing networks (especially large-scale and/or high-performance networks) would be
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`significantly slower and less efficient (and, therefore, more expensive and less useful) than they
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`are today.
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`Intel’s Infringing Technologies
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`27.
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`Intel uses the Alacritech’s patented technologies that Alacritech asserted against
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`Dell and the other Defendants in this consolidated action which Intel identified as the basis of its
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`intervention across many different parts of its business, including in the network adapters,
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`network controllers, and other network products that it makes, uses and/or sells, and in the
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`associated consulting and support services that it provides to its customers. Intel’s use of these
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`technologies infringes the Asserted Patents directly, and also induces and contributes to
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`infringement of the Asserted Patents by its customers.
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`28.
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`Intel makes, uses, sells, and/or provides technical support for a variety of network
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`products that infringe the Asserted Patents, including network controllers (e.g., the Intel Ethernet
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`controller XL710 family), network adapters (e.g., the Intel Ethernet converged network adapter
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`X540), and other network interface devices. See, e.g., “Intel Ethernet Controllers,” available at
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`http://www.intel.com/content/www/us/en/ethernet-products/controllers/overview.html.
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`29.
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`A large and growing portion of Intel’s revenue is tied to the infringing network
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`products and services described above. Without the benefit of Alacritech’s patented
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`technologies, the infringing network products and services Intel provides would cost
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`
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`16
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 17 of 139 PageID #: 2249
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`substantially more and/or suffer a significant degradation in performance, hurting Intel’s
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`business as a result.
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`COUNT I
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`INFRINGEMENT OF U.S. PATENT NO. 7,124,205
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`30.
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`Alacritech re-alleges and incorporates by reference each of the allegations of the
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`paragraphs set forth above as though fully set forth herein.
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`31.
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`Alacritech is the current exclusive owner and assignee of all right, title, and
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`interest in and to U.S. Patent No. 7,124,205 (the “‘205 patent”), titled “Network Interface Device
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`that Fast-Path Processes Solicited Session Layer Read Commands,” duly and legally issued by
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`the United States Patent and Trademark Office on October 17, 2006, including the right to bring
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`this suit for injunctive relief and damages. A true and correct copy of the ‘205 patent is attached
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`hereto as Exhibit A.
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`32.
`
`33.
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`The ‘205 patent is valid and enforceable.
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`Intel has directly infringed and is currently directly infringing the ‘205 patent by
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`making, using, selling, offering for sale, and/or importing into the United States, without
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`authority, products, methods, equipment, and/or services that practice one or more claims of the
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`‘205 patent in connection with infringing RSC functionality, including but not limited to the Intel
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`82599EB 10 Gigabit Ethernet Controller; Intel 82599EN 10 Gigabit Ethernet Controller; Intel
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`82599ES 10 Gigabit Ethernet Controller; Intel Ethernet Controller X540-AT2; Intel Ethernet
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`Controller X540-BT2; Intel Ethernet Controller X550-AT; Intel Ethernet Controller X550-AT2;
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`Intel Ethernet Controller X550-BT2; Intel Ethernet Controller X710-AM2; Intel Ethernet
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`Controller X710-BM2; Intel Ethernet Controller XL710-AM1; Intel Ethernet Controller XL710-
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`AM2; Intel Ethernet Controller XL710-BM1; Intel Ethernet Controller XL710-BM2; Intel
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`Network Daughter Card X520-DA2 /1350-T2; Intel Network Daughter Card X540-T2 /1350-T2;
`
`
`
`17
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`
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 18 of 139 PageID #: 2250
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`Intel Ethernet Converged Network Adapter X520-DA2; Intel Ethernet Converged Network
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`Adapter X520-LR1; Intel Ethernet Converged Network Adapter X520-QDA1; Intel Ethernet
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`Converged Network Adapter X520-SR1; Intel Ethernet Converged Network Adapter X520-SR2;
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`Intel Ethernet Converged Network Adapter X540-T1; Intel Ethernet Converged Network
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`Adapter X540-T2; Intel Ethernet Converged Network Adapter X550-T1; Intel Ethernet
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`Converged Network Adapter X550-T2; Intel Ethernet Converged Network Adapter X710-DA2;
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`Intel Ethernet Converged Network Adapter X710-DA4; Intel Ethernet Converged Network
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`Adapter X710-DA4 FH; Intel Ethernet Converged Network Adapter XL710-QDA1; Intel
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`Ethernet Converged Network Adapter XL710-QDA2; Intel Ethernet Server Adapter I340-F4;
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`Intel Ethernet Server Adapter I340-T2; Intel Ethernet Server Adapter I340-T4; Intel Ethernet
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`Server Adapter X520-DA1 for Open Compute Project; Intel Ethernet Server Adapter X520-
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`DA2; Intel Ethernet Server Adapter X520-DA2 for Open Compute Project; Intel Ethernet Server
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`Adapter XL710-QDA1 for Open Compute Project; Intel Ethernet Server Adapter XL710-QDA2
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`for Open Compute Project; Intel Ethernet Server Bypass Adapter X520-LR2; Intel Ethernet
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`Server Bypass Adapter X520-SR2; Intel Ethernet Server Bypass Adapter X540-T2; Intel
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`Ethernet Connection X557-AT; Intel Ethernet Connection X557-AT2; Intel Ethernet Connection
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`X557-AT4; any other activities, products and/or services involving the products identified above;
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`and any other activities, products and/or services that practice and/or support similarly infringing
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`RSC functionality (collectively, “the ‘205 Accused Products”). The ‘205 Accused Products are
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`non-limiting examples that were identified based on publicly available information, and
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`Alacritech reserves the right to identify additional infringing activities, products and services,
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`including, for example, on the basis of information obtained during discovery.
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`
`
`18
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`
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`Case 2:16-cv-00693-JRG-RSP Document 94 Filed 12/13/16 Page 19 of 139 PageID #: 2251
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`34.
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`As just one non-limiting example, set forth below (with claim language in italics)
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`is a description of Intel’s infringement of exemplary claim 35 of the ‘205 patent in connection
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`with the Intel 82599EB 10 Gigabit Ethernet Controller. This description is based on publicly
`
`available information. Alacritech reserves the right to modify this description, including, for
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`example, on the basis of information about the ‘205 Accused Products that it obtains during
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`discovery.
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`35 A host bus adapter that is adapted for sending an ISCSI solicited read request and for
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`receiving a response in return, the host bus adapter also being adapted for coupling to a host
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`computer that has a protocol stack, the protocol stack having an ISCSI layer, the host bus
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`adapter being adapted for processing the response such that a data portion of the response is
`
`placed into a memory on the host computer without the host computer doing any network layer
`
`or transport layer processing on the response.; – Intel makes, uses, sells, offers for sale, and/or
`
`imports network interface devices (e.g., controllers and cards), and other network products that
`
`support infringing RSC functionality. As an example, Intel sells the Intel 82599EB 10 Gigabit
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`Ethern