Case 2:16-cv-00692-JRG Document 1 Filed 06/30/16 Page 1 of 88 PageID #: 1
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`MARSHALL DIVISION
`
`
`
`
`
`Case No. 2:16-cv-692
`
`Jury Trial Demanded
`
`ALACRITECH INC., a California corporation,
`
`Plaintiff,
`
`v.
`
`WISTRON CORPORATION, a Taiwanese
`corporation, WIWYNN CORPORATION, a
`Taiwanese corporation, SMS INFOCOMM
`CORPORATION, a Texas corporation,
`
`Defendants.
`
`
`
`COMPLAINT FOR PATENT INFRINGEMENT
`
`In this action for patent infringement under 35 U.S.C. § 271, Plaintiff Alacritech Inc.
`
`("Alacritech"), by and through its undersigned counsel, complains and alleges as follows against
`
`Defendants Wistron Corporation ("Wistron"), Wiwynn Corporation ("Wiwynn"), and SMS
`
`InfoComm Corporation ("SMS InfoComm") (collectively referred to herein as "Defendants"),
`
`based on Alacritech's own personal knowledge with respect to its own actions and upon
`
`information and belief with respect to others' actions:
`
`THE PARTIES
`
`1.
`
`Alacritech is a California corporation with its principal place of business at P.O.
`
`Box 20307, San Jose, California 95160.
`
`2.
`
`Wistron Corporation is a Taiwanese corporation, with its principal place of
`
`business at 158, Singshan Road, Neihu, Taipei 11469, Taiwan, R.O.C.
`
`3.
`
`Wiwynn Corporation is a Taiwanese corporation and a subsidiary of Wistron
`
`Corporation, with its principal place of business at 8F, 90, Section 1, Xintai 5th Road, Xizhi
`
`District, New Taipei City 22102, Taiwan, R.O.C.
`
`
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`1
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`4.
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`SMS InfoComm Corporation is a Texas corporation and a subsidiary of Wistron
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`Corporation, with its principal place of business at 4051 North Highway 121, Suite 100,
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`Grapevine, TX 76051.
`
`NATURE OF THE ACTION
`
`5.
`
`This is a civil action for patent infringement arising under the patent laws of the
`
`United States, 35 U.S.C. § 1, et seq.
`
`6.
`
`Defendants have infringed and continue to infringe, have contributed to and
`
`continue to contribute to the infringement of, and have actively induced and continue to actively
`
`induce others to infringe Alacritech's U.S. Patent Numbers 7,124,205; 7,237,036; 7,337,241;
`
`7,673,072; 8,131,880; 8,805,948; and 9,055,104 (collectively,
`
`the "Asserted Patents").
`
`Alacritech is the legal owner by assignment of the Asserted Patents, which were all duly and
`
`legally issued by the United States Patent and Trademark Office. Alacritech seeks injunctive
`
`relief and monetary damages.
`
`JURISDICTION AND VENUE
`
`7.
`
`This is a civil action for patent infringement arising under the patent laws of the
`
`United States, 35 U.S.C. § 1, et seq., including § 271. This Court has subject matter jurisdiction
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`over this action under 28 U.S.C. §§ 1331 and 1338(a).
`
`8.
`
`This Court has personal jurisdiction over Defendants because, among other
`
`reasons, Defendants regularly conducts business in Texas, including in this District, and
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`Defendants have committed and continue to commit direct and indirect acts of patent
`
`infringement complained of herein within this District and elsewhere in Texas and the United
`
`States.
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`9.
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`Wistron maintains a manufacturing center in McKinney, Texas and a service
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`center in Dallas, Texas, and Wistron uses these facilities to build, repair, sell and/or provide a
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`variety of products and services, including products and services complained of herein.
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`10. Wiwynn and Wistron have purposefully and voluntarily sold their infringing
`
`products and/or placed their infringing products into the stream of commerce (e.g., through their
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`customers and their sales and service partners) with the expectation that those infringing
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`products will be used in this District, and the infringing products have been and continue to be
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`used in this District. Wiwynn and Wistron have also provided and continue to provide infringing
`
`services associated with their infringing products in this District.
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`11.
`
`SMS InfoComm is a Texas corporation that is based in and maintains a parts and
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`service center in Grapevine, Texas, which it uses to build, repair, sell and/or provide a variety of
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`products and services, including products and services complained of herein. SMS InfoComm
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`sells and provides products and services, including infringing products and services complained
`
`of herein, directly to businesses in this District.
`
`12.
`
`As such, Defendants have purposefully availed themselves of the privilege of
`
`conducting business within this District, have established sufficient minimum contacts with this
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`District such that Defendants should reasonably and fairly anticipate being haled into this Court,
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`and have purposefully directed activities at residents in this District, wherein at least a portion of
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`the claims alleged herein arise out of or are related to those activities. Wistron has also
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`participated in previous patent cases in this District.
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`13.
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`Venue is proper in this District under 28 U.S.C. §§ 1391(b)-(c) and 1400(b) at
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`least because, as discussed above, Defendants are subject to personal jurisdiction in this District,
`
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`regularly conduct business in this District, and have committed and continue to commit direct
`
`and indirect acts of patent infringement complained of herein within this District.
`
`FACTUAL BACKGROUND
`
`Alacritech's History
`
`14.
`
`Alacritech was founded in 1997 by technology pioneer Larry Boucher, the creator
`
`and author of the original Small Computer System Interface ("SCSI") specification and a
`
`visionary, award-winning leader in server adapter, storage and networking technologies.
`
`15. Mr. Boucher has more than 50 years of experience in the industry. Following a
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`twelve-year tenure in IBM's Storage Division, he served as director of design services at Shugart
`
`Associates, where he developed the Shugart Associates System Interface ("SASI") and then
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`SCSI, the industry standard for connecting storage and other peripherals to PCs and servers. In
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`1981, Mr. Boucher founded Adaptec, Inc., which became a global leader for host adapters and
`
`other innovative storage solutions. After taking Adaptec public, Mr. Boucher founded Auspex
`
`Systems, Inc., a manufacturer of enterprise servers, where he pioneered the networked file
`
`system design that is the basis of today's network-attached storage ("NAS") model. In 1997, Mr.
`
`Boucher founded Alacritech.
`
`16.
`
` Mr. Boucher and other innovators at Alacritech (including Peter Craft, Clive
`
`Philbrick, Stephen Blightman, David Higgen, and Daryl Starr) foresaw the convergence of
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`storage and networking and, as a result, the enormous processing demands that would be placed
`
`on host computer CPUs in order to move and store large quantities of data within a network,
`
`creating bottlenecks and reducing CPU processing power available for performing more
`
`substantive computing tasks. To solve this impending problem, the Alacritech team pioneered a
`
`series of fundamental network acceleration technologies, including but not limited to techniques
`
`for streamlining, bypassing and/or offloading aspects of conventional network protocol
`
`
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`4
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`processing from host CPUs to "intelligent" network interface devices (sometimes called "NIDs").
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`These technologies are critical to modern network computing, dramatically increasing the speed
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`and efficiency with which data is transferred and stored, while reducing the associated
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`processing burden imposed on host CPUs.
`
`17. Working with industry partners, Alacritech released a number of network and
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`storage products related to the technologies it developed. For example, Alacritech produced a
`
`series of Scalable Network Accelerators (also referred to as TCP Offload Engine (TOE) Network
`
`Interface Cards (TNICs)) and the ANX 1500, a sophisticated Network File System (NFS)
`
`Throughput Acceleration Appliance for use with Network-Attached Storage (NAS) systems.
`
`Alacritech's Asserted Patents
`
`18.
`
`Network computing is ubiquitous in contemporary society. It enables the
`
`dissemination of information and digital content to people around the world, and it is a critical
`
`component of the modern information economy. Many businesses have their own data centers
`
`(made up of large numbers of networked servers) that they use for the remote storage,
`
`management, processing, and/or distribution of their data. And a lucrative and rapidly-growing
`
`industry has developed to provide cloud computing services, which essentially allow businesses
`
`(and consumers) to offload their data to shared, third-party data centers.
`
`19.
`
`However, as growing volumes of data are moved across networks of increasing
`
`complexity and bandwidth, more and more of the processing power of the servers (and/or other
`
`computers) in a network is consumed by simply moving and storing the data, greatly diminishing
`
`the ability of the servers to perform other more substantive tasks. In addition, bottlenecks
`
`develop when there is insufficient processing power available to transfer data, and the data
`
`cannot be moved as quickly or efficiently as desired. The Alacritech team foresaw these
`
`
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`problems years ago and, to address them, they developed and patented a collection of innovative
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`network acceleration techniques that dramatically speed up the transfer and storage of data, and
`
`decrease the corresponding processing demands on servers. Alacritech holds 71 United States
`
`patents covering its groundbreaking inventions.
`
`20.
`
` Conventionally, computers connected over a network rely on a multi-layered
`
`software architecture to transfer and store data. The architecture (also called a protocol stack) is
`
`generally based on one or more specifications and/or protocols, such as TCP/IP (a protocol suite
`
`including the Transmission Control Protocol ("TCP") and Internet Protocol ("IP")). Depending
`
`on the specifications and/or protocols at issue, the architecture may include up to seven different
`
`layers described by the Open Systems Interconnection (OSI) model (listed, in order, from highest
`
`to lowest): the application layer, the presentation layer, the session layer, the transport layer, the
`
`network layer, the data link layer, and the physical layer. Each software layer performs different
`
`functions associated with transferring and storing data.
`
`21.
`
`In order to prepare data for transmission over a network, a sending computer must
`
`process the data through each layer of the protocol stack (working from highest to lowest). At
`
`each layer, the sending computer must perform further processing on the data resulting from
`
`processing by the previous layer, such as preparing and attaching a new header containing
`
`associated metadata. In the transport layer, the sending computer must also divide the data up
`
`into units (e.g., packets) that are small enough to be transmitted over the network medium.
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`Likewise, a receiving computer must process incoming data through each layer of the same
`
`protocol stack (working from lowest to highest) before it can be used by host applications on the
`
`receiving computer. At each layer, the receiving computer must perform further processing on
`
`the data resulting from processing by the previous layer, such as removing and processing an
`
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`additional header and, in the transport layer, combining multiple units of data together in
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`memory. In both the sending and receiving operations, the computer may move and/or make a
`
`new copy of the data each time another layer is processed.
`
`22.
`
`This conventional approach for transferring and storing data within a network,
`
`while functional, is also slow and highly inefficient. Too much of the processing power of a
`
`computer's CPU is wasted performing brute-force, layer-by-layer processing. Recognizing these
`
`inefficiencies early on, the Alacritech team developed sophisticated solutions that greatly
`
`improve upon the conventional approach. Central to these solutions is Alacritech's pioneering
`
`use of dedicated NIDs to efficiently handle optimal portions of the processing associated with
`
`sending, receiving, and storing data, particularly for complicated multi-layer protocol suites that
`
`use variable-length units of data with multiple headers, such as TCP/IP.
`
`23.
`
`Others in the industry attempted solutions that involved offloading essentially all
`
`processing associated with data communications to a NID, completely bypassing the host CPU,
`
`but they were unable to develop effective solutions that were suitable for TCP/IP and other more
`
`complicated protocol suites involving maintenance of state and variable-length data units with
`
`multiple headers, situations in which it is important that the host CPU remains involved in the
`
`processing. Still others in the industry attempted solutions involving offload of discrete TCP/IP
`
`processing tasks to a NID, but they were only able to offload very limited tasks, such as
`
`checksum processing, that did not significantly reduce the processing burden on the host CPU.
`
`24.
`
`Only Alacritech solved the problem of how to efficiently offload large portions of
`
`communications processing to NIDs implementing TCP/IP and other more complicated protocol
`
`suites. By offloading processing tasks to a dedicated NID in accordance with the solutions
`
`provided by the Asserted Patents, transfer of data between devices is accelerated and the host
`
`
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`CPUs retain dramatically more processing power to perform other more substantive tasks,
`
`without sacrificing the flexibility and control necessary to implement a complicated protocol
`
`suite such as TCP/IP. Some of the innovative solutions and techniques developed by Alacritech
`
`and claimed by the Asserted Patents are discussed below.
`
`25.
`
`Some of the Asserted Patents provide solutions that increase efficiency of
`
`network computing by using multiple paths to process received data, whereby an intelligent NID
`
`uses criteria (e.g., provided by the host CPU) to determine whether incoming data should be
`
`processed directly by the NID (e.g., using a "fast-path"), or whether it should be passed to and
`
`processed by the host CPU in the conventional manner (e.g., using a "slow-path"). This
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`substantially reduces the burden on the host CPU, while retaining its flexibility and control for
`
`handling exceptions and other complicated processing tasks. And, because the NID is
`
`specifically designed to perform these operations (usually in hardware), it can perform them
`
`more efficiently and more quickly than a host CPU.
`
`26.
`
`Alacritech also pioneered techniques that allow NIDs to transfer and store data
`
`more quickly and efficiently. For example, some of the Asserted Patents provide solutions
`
`through which NIDs transfer data to and from host memory associated with upper layer (e.g.,
`
`application layer) software, without unit-by-unit lower-layer processing by the host CPU and
`
`without excessive intermediate copying of data in a series of intermediate buffers and/or caches.
`
`In this way, data can be transferred to the network or the host memory directly by the NID,
`
`without substantial processing by the host CPU or excessive intermediate copying, resulting in
`
`much faster and more efficient transfer and storage of data.
`
`27.
`
`As another example, some of the Asserted Patents provide solutions for more
`
`efficiently preparing and sending data over a network. For example, the NID uses information
`
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`(e.g., provided by the host CPU) to divide data up into smaller units for transmission, and to
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`generate and attach multiple lower-layer headers to the units of data. Moreover, it does so in
`
`essentially a single operation, without the brute-force, layer-by-layer processing (and associated
`
`copying) required to carry out the same tasks under the conventional approach described above.
`
`These solutions greatly reduce processing by the host CPU associated with sending data, and
`
`they allow the NID to prepare and transmit data more efficiently.
`
`28.
`
`Similarly, some of the Asserted Patents provide solutions for more efficiently
`
`processing data received from a network. For example, the NID removes and processes the
`
`lower-layer headers from related units of data, without the brute-force processing of those
`
`headers required under the conventional approach described above. In addition, the NID may
`
`combine processed data units into a single payload of data that it delivers to host memory. These
`
`solutions greatly reduce processing by the host CPU associated with receiving and storing data,
`
`and they allow the NID to receive and process data more efficiently.
`
`29.
`
`The Asserted Patents are a product of Alacritech's extensive research and
`
`development, reflecting groundbreaking innovations that are found throughout modern networks,
`
`especially large-scale and/or high-end networks such as those used in data centers.
`
`30.
`
`The technologies covered by Alacritech's Asserted Patents are critical to
`
`fundamental network and/or storage acceleration techniques, including Large Segment Offload
`
`("LSO") (also called Large Send Offload or Generic Segmentation Offload), Receive Side
`
`Coalescing ("RSC") (also called Receive Segment Coalescing, Large Receive Offload, or
`
`Generic Receive Offload), and TCP Offload Engine ("TOE"). They are also essential to many
`
`network and/or storage protocols that incorporate Remote Direct Memory Access ("RDMA"),
`
`such as the InfiniBand protocol, the RDMA over Converged Ethernet ("RoCE") protocol, the
`
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`Internet Wide Area RDMA Protocol ("iWARP"), the Internet Small Computer System Interface
`
`("iSCSI") Extensions for RDMA ("iSER") protocol, and the Server Message Block ("SMB")
`
`Direct protocol.
`
`31. Without the benefit of Alacritech's groundbreaking inventions, modern computing
`
`networks (especially large-scale and/or high-performance networks) would be significantly
`
`slower and less efficient (and, therefore, more expensive and less useful) than they are today.
`
`Defendants' Infringing Technologies
`
`32.
`
`Defendants use Alacritech's patented technologies across many different parts of
`
`their businesses, including in the data centers they help their customers build and operate, in the
`
`servers and other network products that they make, use and/or sell, and in the associated
`
`consulting and support services that they provide to their customers. Defendants infringe the
`
`Asserted Patents directly, and also induce and contribute to infringement of the Asserted Patents
`
`by their customers.
`
`33. Wistron makes, uses and/or sells a variety of network products that infringe the
`
`Asserted Patents, including servers, storage devices, network adapters and other network
`
`interface devices, and converged products, which Wistron's customers sell under their own brand
`
`names. Wistron also provides a range of services, through which Wistron designs, builds and/or
`
`provides technical support for infringing networking infrastructure for its customers, often using
`
`the infringing network products described above. See, e.g., "About Wistron," available at
`
`http://www.wistron.com/about/about_wistron.htm; "Wistron Products and Services," available at
`
`http://www.wistron.com/about/products_and_services.htm; "Wistron Products," available at
`
`http://www.wistron.com/about/products_and_services_products.htm.
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`10
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`34. Wiwynn makes, uses and/or sells a variety of servers, storage devices, and other
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`network products (including products manufactured by Wistron) that infringe the Asserted
`
`Patents. In addition, Wiwynn provides a large portfolio of network solutions and services,
`
`including end-to-end Data Center and Cloud solutions and other technical support services,
`
`through which Wiwynn designs, builds and/or provides technical support for infringing data
`
`centers and other infringing networking infrastructure for its customers, often using the
`
`infringing network products described above. See, e.g., "Wiwynn Company Overview,"
`
`available at http://www.wiwynn.com/english/page/index/3; "Wiwynn Products & Services,"
`
`available at http://www.wiwynn.com/english/product; "Wiwynn Service & Integration,"
`
`available at http://www.wiwynn.com/english/product/service; "Wistron Group," available at
`
`http://www.wistron.com/about/wistron_group.htm.
`
`35.
`
`SMS InfoComm sells parts and provides its customers with technical support and
`
`repair services for a variety network products (including products from Wiwynn and Wistron)
`
`that infringe the Asserted Patents, including servers, storage devices, cloud computing devices,
`
`and other network products. See, e.g., "SMS InfoComm Corporation Service," available at
`
`http://www.smsinfocomm.com/Files/index_Service.html.
`
`36.
`
`A large and growing portion of Defendants' revenue is tied to the infringing
`
`network products and services described above. Without the benefit Alacritech's patented
`
`technologies, the infringing network products and services Defendants provide would suffer a
`
`significant degradation in performance, causing a substantial decrease in Defendants' revenue.
`
`COUNT I
`
`INFRINGEMENT OF U.S. PATENT NO. 7,124,205
`
`37.
`
`Alacritech re-alleges and incorporates by reference each of the allegations of the
`
`paragraphs set forth above as though fully set forth herein.
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`38.
`
`Alacritech is the current exclusive owner and assignee of all right, title, and
`
`interest in and to U.S. Patent No. 7,124,205 (the "'205 patent"), titled "Network Interface Device
`
`that Fast-Path Processes Solicited Session Layer Read Commands," duly and legally issued by
`
`the United States Patent and Trademark Office on October 17, 2006, including the right to bring
`
`this suit for injunctive relief and damages. A true and correct copy of the '205 patent is attached
`
`hereto as Exhibit A.
`
`39.
`
`40.
`
`The '205 patent is valid and enforceable.
`
`Defendants have directly infringed and are currently directly infringing the '205
`
`patent by making, using, selling, offering for sale, and/or importing into the United States,
`
`without authority, products, methods, equipment, and/or services that practice one or more
`
`claims of the '205 patent in connection with infringing RSC functionality, including but not
`
`limited to the Wiwynn SV100G2, SV300, SV300G2, SV320, SV320G2, SV324G2, SV5270G2-
`
`R, SV5270G2-S, SV7110, SV7220G2-N, SV7220G2-P, SV7220G2-S, SV7220G2-V, NM10GR,
`
`and NM10GS; any other activities, products and/or services involving the products identified
`
`above; and any other activities, products and/or services that practice and/or support similarly
`
`infringing RSC functionality (collectively, "the '205 Accused Products"). The '205 Accused
`
`Products are non-limiting examples that were identified based on publicly available information,
`
`and Alacritech reserves the right to identify additional infringing activities, products and
`
`services, including, for example, on the basis of information obtained during discovery.
`
`41.
`
`As just one non-limiting example, set forth below (with claim language in italics)
`
`is a description of Defendants' infringement of exemplary claim 5 (including claim 1, upon
`
`which claim 5 depends) of the '205 patent in connection with the Wiwynn SV7220G2 Server
`
`configured with a Wiwynn NM10GR Mezzanine Card. This description is based on publicly
`
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`available information. Alacritech reserves the right to modify this description, including, for
`
`example, on the basis of information about the '205 Accused Products that it obtains during
`
`discovery.
`
`1(a) An apparatus comprising: a host computer having a protocol stack and a destination
`
`memory, the protocol stack including a session layer portion, the session layer portion being for
`
`processing a session layer protocol; – Defendants make, use, sell, offer for sale, and/or import
`
`servers, network interface devices (e.g., controllers and cards), and other network products that
`
`support infringing RSC functionality. One example of an infringing products is the Wiwynn
`
`SV7220G2 Server (the "SV7220G2 Server") configured with a Wiwynn NM10GR Mezzanine
`
`Card (the "NM10GR Card"). See, e.g., "Wiwynn 2016 OCP US Summit Product Brochure,"
`
`available
`
`at
`
`https://www.circleb.eu/wp-content/uploads/2016/04/OCP-US-Summit-OPS.pdf
`
`("OCP Product Brochure");
`
`"Wiwynn SV7220G2 Series Datasheet," available at
`
`http://www.wiwynn.com/usr_files/20150413140223_Datasheet%20-
`
`%20SV7220G2_150413.pdf ("SV7220G2 Datasheet"). The SV7220G2 Server comprises a host
`
`computer that has destination memory and a protocol stack (e.g., of the server's Microsoft
`
`Windows or Linux operating system) including a session layer portion for processing a session
`
`layer protocol, such as iSCSI. See, e.g., OCP Product Brochure; SV7220G2 Datasheet;
`
`"Introduction
`
`of
`
`iSCSI
`
`Target
`
`in Windows
`
`Server
`
`2012"
`
`available
`
`at
`
`https://blogs.technet.microsoft.com/filecab/2012/05/21/introduction-of-iscsi-target-in-windows-
`
`server-2012. Microsoft describes how using a network interface device supporting infringing
`
`RSC functionality reduces processing overhead of the protocol stack on a server (such as the
`
`SV7220G2 Server incorporating the NM10GR Card) running the Microsoft Windows Server
`
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`Operating System, which enables RSC by default. See, e.g., "Receive Segment Coalescing,"
`
`available at https://technet.microsoft.com/en-us/library/hh997024.aspx.
`
`
`
`1(b) and a network interface device coupled to the host computer, – The SV7220G2
`
`Server incorporating the NM10GR Card includes a network interface device coupled to the host
`
`computer, comprising the NM10GR Card with its Intel X550 controller (the "X550 Controller").
`
`See, e.g., OCP Product Brochure; SV7220G2 Datasheet. The X550 Controller provides "unified
`
`networking delivering . . . iSCSI." See, e.g., "Intel Ethernet Controller X550 Product Brief"
`
`("X550
`
`Product
`
`Brief"),
`
`available
`
`at
`
`http://www.intel.com/content/www/us/en/embedded/products/networking/ethernet-x550-
`
`brief.html. An introduction to the X550 Controller's RSC functionality is provided in Section
`
`7.10 of the "Intel Ethernet Controller X550 Datasheet," Revision 2.1 (May 2016), available at
`
`http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/ethernet-x550-
`
`datasheet.pdf (the "X550 Datasheet").
`
`
`
`
`
`14
`
`

`

`Case 2:16-cv-00692-JRG Document 1 Filed 06/30/16 Page 15 of 88 PageID #: 15
`
`1(c) the network interface device receiving from outside the apparatus a response to a
`
`solicited read command, the solicited read command being of the session layer protocol, – The
`
`network interface device of a SV7220G2 Server incorporating the NM10GR Card receives
`
`responses to solicited read commands of the session layer protocol issued by the SV7220G2
`
`Server over networks that are outside the apparatus. This is indicated, for example, in § 1.3.2
`
`("Network Interfaces") at 21 of the X550 Datasheet. See, also, e.g., Internet Engineering Task
`
`Force (IETF), Request for Comments: 7143 "Internet Small Computer System Interface (iSCSI)
`
`Protocol (Consolidated)," available at http://www.rfc-base.org/txt/rfc-7143.txt, at Appendix A at
`
`253 ("Read Operation Example").
`
`1(d) performing fast-path processing on the response such that a data portion of the
`
`response is placed into the destination memory without the protocol stack of the host computer
`
`performing any network layer processing or any transport layer processing on the response. – In
`
`connection with the RSC functionality discussed above, the network interface device of a
`
`SV7220G2 Server incorporating the NM10GR Card performs fast-path processing on a response
`
`such that a data portion of the response is placed into destination memory without the protocol
`
`stack of the SV7220G2 Server performing any network layer processing or any transport layer
`
`processing on the response. This is described in Section 7.10 of the X550 Datasheet, excerpts of
`
`which are provided below.
`
`
`
`15
`
`

`

`Case 2:16-cv-00692-JRG Document 1 Filed 06/30/16 Page 16 of 88 PageID #: 16
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`Case 2:16-cv-00692-JRG Document1 Filed 06/30/16 Page 16 of 88 PagelD #: 16
`
`7.10 Receive Side Coalescing (RSC)
`
`The X550 can merge multiple received frames from the same TCP/IP connection (referred to as flow in
`this section) into a single structure. The X550 does this by coalescing the incoming framesinto a single
`or multiple buffers (descriptors) that share a single accumulated header. This feature is called RSC.
`Note that the term Large Receive is used to describe a packet construct generated by RSC.
`
`The X550 digests received packets and categorizes them by their TCP/IP connections (flows). For each
`flow, hardware coalesces the packets as shown in Figure 7-41 and Figure 7-42 (the colored parameters
`are explained in the RSC context table and receive descriptor sections). The X550 can handle up to 32
`concurrent flows per LAN port at any given time. Each flow handled by RSC offload has an associated
`context. The X550 opens and closes the RSC contexts autonomously with no need for any software
`intervention. Software needs only to enable RSC in the selected receive queues.
`
`
`
`3K
`***
`
`First packet in the RSC.
`
`Last packet in the RSC
`
`Packets
`
`Large Rx
`Packet|Header|Payload-1|Payload-2|Payload-3|Payload-4
`
`
`
`
`
`
`vergeRe Header|Payload-1| Payload-2|Payload-3| Payloada4
`ites:
`Large receive example
`while using advanced receive
`descriptors
`(SRRCTL.DESCTYPE= 1b)
`
`
`
`EOP
`Data Length =
`partial buffer size
`
`———
`
`|
`
`Large Rx
`Descriptors
`BI
`
`NEXTP
`Data Length =
`entire buffer size
`
`NEXTP
`Data Length =
`entire buffer size
`
`Figure 7-41 RSC Functionality (No Header Split)
`
`
`
`3K
`***
`
`
`
`16
`
`INTEL EX. 1444.016
`
`

`

`Case 2:16-cv-00692-JRG Document 1 Filed 06/30/16 Page 17 of 88 PageID #: 17
`
`
`
`5. The apparatus of claim 1, wherein the protocol stack of the host computer can process
`
`a second response to a second solicited read command of the session layer protocol, the protocol
`
`stack processing the second response such that the protocol stack performs both network layer
`
`processing and transport layer processing on the response. – In connection with the RSC
`
`functionality discussed above, the SV7220G2 Server incorporating the NM10GR Card can
`
`process a second response to a second solicited read command of the session layer protocol (e.g.,
`
`iSCSI protocol) such that the protocol stack of the SV7220G2 Server performs both network
`
`layer and transport layer processing on the response. As described in Section 7.10.1 and shown
`
`in Figure 7-43 (and elsewhere) in the X550 Datasheet, if a response does not qualify for fast-path
`
`processing, it is sent to the host protocol stack for conventional processing.
`
`
`
`***
`
`17
`
`
`
`

`

`Case 2:16-cv-00692-JRG Document 1 Filed 06/30/16 Page 18 of 88 PageID #: 18
`
`42.
`
`As of no later than the filing and service of this Complaint, Defendants are also
`
`indirectly infringing the '205 patent.
`
`43.
`
`Defendants have actual knowledge of Alacritech's rights in the '205 patent and
`
`details of Defendants' infringement of the '205 patent based on at least the filing and service of
`
`
`
`this Complaint.
`
`44.
`
`Defendants make, use, import, offer for sale, and/or sell the '205 Accused
`
`Products (including, for example, the products described above) with knowledge of or willful
`
`blindness to the fact that their actions will induce their customers to infringe the '205 patent.
`
`Defendants induce others to infringe the '205 patent in violati