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`(1) Dan Radut | LinkedIn
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`Learning Modular
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`Viewers: 25,675
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`Dan Radut
`
`Consultant at PatentLawFirm
`Kitchener, Canada Area
`
`Connect
`
`FISI Consulting Law Firms
`Polytechnic University of
`Timisoara, Romania
`See contact info
`87 connections
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`A highly dependable electronics engineer with extensive experience in high-speed complex FPGA devices
`VHDL coding and in HW electronic analog and digital design. Results-driven and creative problem solver
`with proven abilities for electronic system design project leadership. Able to meet project goals within al...
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`FISI
`Consulting
`Law Firms
`
`Experience
`Consultant
`FISI Consulting Law Firms
`Jan 2017 – Present · 1 yr 8 mos
`New York, USA
`FISI Contract - Consultancy on patent claims regarding "System and method for adapting a USB to
`provide power for charging a mobile device"
`
`FPGA free help/consulting for FPGA groups online
`1.Developed and simulated an i2c interface RTL VHDL/Verilog code for the DS1621 digital
`thermometer with Vivado 2016.3
`2. Analysis of an AES_128_Cipher with a CanrightSBox and simulation on Quartus with ModelSim
`3. Designed and simulated an SRAD(Speckle Reduction Anisotropic Diffusion) speckle n... See more
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`Home
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`Sr FPGA and Hardware Designer
`Home
`Jan 2014 – Dec 2016 · 3 yrs
`Waterloo, ON
`Study and extensive training of Verilog and System Verilog.
`Extensive Xilinx Vivado IDE training
`• Advanced XilinxDesignConstraints and StaticTimingAnalysis
`• Timing Closure Baseline Methodology... See more
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`Teled
`yne
`DALSA
`
`Sr FPGA and HW designer
`Teledyne DALSA
`May 2002 – Dec 2013 · 11 yrs 8 mos
`Waterloo, Ontario
`• Developed RTL VHDL codes for application specific custom high-speed TDI and area scan CCD
`cameras. Defined FPGA architecture, created top-down block diagrams and wrote the FPGA project
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`MessagingMessagingMessaging
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`Sketch: Working with
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`Fundamental Ex 2024-p. 1
`ZTE et al v Fundamental
`IPR2018-00111
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`
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`8/3/2018
`
`(1) Dan Radut | LinkedIn
`
`documentation, released camera documents.
`Altera (CycloneII, CycloneIII, Stratix), Xilinx (VirtexII Pro, irtex4, Spartan6), and Lattice(EC... See more
`
`See more
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`RIM |
`BlackBerry
`
`Hardware Designer
`RIM | BlackBerry
`Mar 1999 – Jan 2002 · 2 yrs 11 mos
`Waterloo, Ontario
`• Designed test boards using Mentor Graphics tools for testing and qualifying new parts
`• Developed power circuitry implemented on pagers (SMPS, LDOs, control, decoupling)
`• Designed USB-powered chargers for Li cell batteries
`
`Elctronics Design Engineer
`NDT Technologies
`Jul 1997 – May 1998 · 11 mos
`Baie d'Urfe, Quebec
`
`Electronics Engineer
`MPP
`Feb 1996 – Apr 1997 · 1 yr 3 mos
`Champlan, France
`
`Electronics Engineer
`Evans&Sutherland
`Feb 1991 – May 1995 · 4 yrs 4 mos
`Palaiseau, France
`
`Elecronics Engineer
`Medical Institute
`Aug 1988 – Sep 1990 · 2 yrs 2 mos
`Timisoara, Romania
`
`Eltronics Engineer
`Titan
`Feb 1980 – Jul 1988 · 8 yrs 6 mos
`Tmisoara, Romania
`Show fewer experiences
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`Education
`Polytechnic University of Timisoara, Romania
`Diploma Of Electronics Engineer, Eletronics and Telecommunications
`1974 – 1979
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`Skills & Endorsements
`VHDL · 7
`Endorsed by 3 of Dan’s colleagues at Teledyne DALSA
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`Verilog · 7
`Endorsed by 3 of Dan’s colleagues at Teledyne DALSA
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`ModelSim · 7
`Endorsed by 3 of Dan’s colleagues at Teledyne DALSA
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`Fundamental Ex 2024-p. 2
`ZTE et al v Fundamental
`IPR2018-00111
`
`
`
`8/3/2018
`
`(1) Dan Radut | LinkedIn
`
`Accomplishments
`3 Languages
`
`English • French • Romanian
`
`1 Honor & Award
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`Additional Honors & Awards
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`Fundamental Ex 2024-p. 3
`ZTE et al v Fundamental
`IPR2018-00111
`
`