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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`ZTE (USA) Inc.,
`Samsung Electronics Co., Ltd., and
`Samsung Electronics America, Inc.,
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`Petitioner
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`v.
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`Fundamental Innovation Systems International LLC,
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`Patent Owner
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`
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`DECLARATION OF JAMES T. GEIER
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`Case No. IPR2018-00110
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`ZTE/SAMSUNG 1009-0001
`IPR2018-00110
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`I.(cid:1)
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`II.(cid:1)
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`TABLE OF CONTENTS
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`Introduction ...................................................................................................... 1(cid:1)
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`Background/Qualifications .............................................................................. 1(cid:1)
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`III.(cid:1) Documents and Materials Considered ............................................................. 2(cid:1)
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`IV.(cid:1) Legal Principles ............................................................................................... 3(cid:1)
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`V.(cid:1)
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`Person of Ordinary Skill in the Art .................................................................. 8(cid:1)
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`VI.(cid:1)
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`’550 Patent ....................................................................................................... 9(cid:1)
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`A.(cid:1)
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`B.(cid:1)
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`C.(cid:1)
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`Summary ............................................................................................... 9(cid:1)
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`Prosecution History ............................................................................... 9(cid:1)
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`Priority Date ........................................................................................10(cid:1)
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`VII.(cid:1) Technology Background & State of the Art ..................................................11(cid:1)
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`VIII.(cid:1) Claim Construction ........................................................................................20(cid:1)
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`IX.(cid:1)
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`Invalidity Opinions ........................................................................................21(cid:1)
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`A.(cid:1) Dougherty anticipates claims 1-3, 9-12, and 18. .................................21(cid:1)
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`1.(cid:1)
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`2.(cid:1)
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`Dougherty ..................................................................................21(cid:1)
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`Application of Dougherty to claims 1-3, 9-12, and 18 .............26(cid:1)
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`B.(cid:1)
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`Dougherty and Shiga render obvious claims 4-8 and 13-17. ..............41(cid:1)
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`1.(cid:1)
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`2.(cid:1)
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`3.(cid:1)
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`Shiga ..........................................................................................41(cid:1)
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`The Dougherty/Shiga combinations .........................................44(cid:1)
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`Application of the Dougherty/Shiga combinations to
`claims 4-8 and 13-17 .................................................................51(cid:1)
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`Geier Declaration
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`i
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`IPR2018-00110
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`I.
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`Introduction
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`1. My name is James T. Geier. I submit this declaration on behalf of
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`ZTE (USA) Inc., Samsung Electronics Co., Ltd., and Samsung Electronics
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`America, Inc. (“Petitioner”), which I understand are challenging the validity of
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`claims 1-18 (“the challenged claims”) of U.S. Patent No. 8,624,550 (“the 550
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`patent”) in a petition for inter partes review.
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`2.
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`I have been asked to provide an opinion on the validity of the
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`challenged claims. In my opinion, U.S. Patent No. 7,360,004 (“Dougherty”)
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`anticipates claims 1-3, 9-12, and 18 of the ’550 patent, and the combination of
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`Dougherty and U.S. Patent No. 6,625,738 (“Shiga”) renders obvious claims 4-8
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`and 13-17 of the ’550 patent.
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`II. Background/Qualifications
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`3.
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`Appendix A to this declaration is my curriculum vitae, which sets
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`forth my qualifications.
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`4.
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`I received a B.S. degree in Electrical Engineering from California
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`State University in 1985. In 1990, I received an M.S. degree in Electrical
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`Engineering from the Air Force Institute of Technology.
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`5.
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`I have 30 years’ experience in the communications industry designing,
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`analyzing, and implementing communications systems, wireless networks, and
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`mobile devices. I have authored over a dozen books on mobile and wireless topics,
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`including Designing and Deploying 802.11 Wireless Networks (Cisco Press),
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`Implementing 802.1X Security Solutions (Wiley), Wireless Networking Handbook
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`(New Riders) and Network Re-engineering (McGraw-Hill). I have been an active
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`participant within standards organizations, such as the IEEE 802.11 Working
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`Group and the Wi-Fi Alliance. I have served as Chairman of the IEEE Computer
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`Society, Dayton Section, and various conferences.
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`6.
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`I have significant experience with USB, which includes reviewing and
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`analyzing USB specifications and designing and integrating corresponding USB
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`interfaces within various applications. Since 1998, I have been analyzing the
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`operation and limitations of USB in relation to mobile devices that I have
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`designed. For example, during 1998-1999, I analyzed and tested the integration of
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`USB into Monarch Marking Systems bar code scanners and printers. Also, during
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`2008-2009, I integrated USB into a microcontroller-based monitoring and control
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`system, which involved writing software drivers to interface the microcontroller to
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`the functionality of a USB port. In addition, I have analyzed how USB impacts the
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`operation and specifications of many other devices, such as wireless IP phones and
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`patient heart monitors, which I’ve been part of designing.
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`III. Documents and Materials Considered
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`7.
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`Appendix B to this declaration lists materials that I have considered in
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`rendering the opinions that I express in this declaration. In forming my opinions, I
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`have also relied on my experience and education.
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`IV. Legal Principles
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`8.
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`I am not an attorney. I offer no opinions on the law. But counsel has
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`informed me of legal standards that apply to the issue of patent validity. I have
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`applied these standards in arriving at my conclusions.
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`9.
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`I understand that in an inter partes review the petitioner has the burden
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`of proving a proposition of unpatentability by a preponderance of the evidence. I
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`understand this standard is different from the standard that applies in a district
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`court, where I understand a challenger bears the burden of proving invalidity by
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`clear and convincing evidence.
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`10.
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`I understand that a patent claim is invalid based on anticipation if a
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`single prior art reference discloses all of the features of that claim, and does so in a
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`way that enables one of ordinary skill in the art to make and use the invention.
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`Each of the claim features may be expressly or inherently present in the prior art
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`reference. I understand that if the prior art necessarily functions in accordance
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`with, or includes a claim’s feature, then that prior art inherently discloses that
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`feature. I have relied on this understanding in expressing the opinions set forth
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`below.
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`11.
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`I understand that a prior art reference describes the claimed invention
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`if it either expressly or inherently describes each and every feature set forth in the
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`claim; i.e., in determining whether a single item of prior art anticipates a patent
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`claim, one should take into consideration not only what is expressly disclosed in
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`that item, but also what is inherently present as a natural result of the practice of
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`the system or method disclosed in that item.
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`12.
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`I understand that to establish inherency, the evidence must make clear
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`that the missing descriptive matter is necessarily present in the item of prior art and
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`that it would be so recognized by persons of ordinary skill in the art. I also
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`understand that prior art use of the claimed patented invention that was accidental,
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`unrecognized, or unappreciated at the time of filing can still be an invalidating
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`anticipation.
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`13.
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`I understand that although multiple prior art references may not be
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`combined to show anticipation, additional references may be used to interpret the
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`allegedly anticipating reference and shed light on what it would have meant to
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`those skilled in the art at the time of the invention. These additional references
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`must make it clear that the missing descriptive matter in the patent claim is
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`necessarily present in the allegedly anticipating reference, and that it would be so
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`recognized by persons of ordinary skill in the art.
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`14.
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`I understand that a patent may not be valid even though the invention
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`is not identically disclosed or described in the prior art if the differences between
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`the subject matter sought to be patented and the prior art are such that the subject
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`matter as a whole would have been obvious to a person having ordinary skill in the
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`art in the relevant subject matter at the time the invention was made.
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`15. To determine if a claim is obvious, the following factors should be
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`considered: (1) the level of ordinary skill in the art at the time the invention was
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`made; (2) the scope and content of the prior art; (3) the differences between the
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`claimed invention and the prior art; and (4) secondary considerations, including
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`evidence of commercial success, long-felt but unsolved need, unsuccessful
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`attempts by others, copying of the claimed invention, unexpected and superior
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`results, acceptance and praise by others, independent invention by others, and the
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`like.
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`16. For example, I understand that the combination of familiar elements
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`according to known methods is likely to be obvious when it does no more than
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`yield predictable results. I also understand that an obviousness analysis need not
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`seek out precise teachings directed to the specific subject matter of the challenged
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`claim because a court can take account of the inferences and/or creative steps that a
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`person of ordinary skill in the art would employ.
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`17.
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`I understand that the obviousness determination of an invention turns
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`on whether a hypothetical person with ordinary skill and full knowledge of all the
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`pertinent prior art, when faced with the problem to which the claimed invention is
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`addressed, would be led naturally to the solution adopted in the claimed invention
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`or would naturally view that solution as an available alternative. Facts to be
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`evaluated in this analysis include:
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`(cid:120) The scope and contents of the prior art;
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`(cid:120) Differences between the prior art and the claims at issue;
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`(cid:120) The level of ordinary skill in the pertinent art; and
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`(cid:120) Evidence of objective factors suggesting or negating obviousness.
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`(cid:120) I understand that the following rationales may be used to determine whether
`a piece of prior art can be combined with other prior art or with other
`information within the knowledge of one of ordinary skill in the art:
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`(cid:120) Combining prior art elements according to known methods to yield
`predictable results;
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`(cid:120) Simple substitution of one known element for another to obtain predictable
`results;
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`(cid:120) Use of known techniques to improve similar devices (methods, or products)
`in the same way;
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`(cid:120) Applying a known technique to a known device (method, or product) ready
`for improvement to yield predictable results;
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`(cid:120) “Obvious to try” - choosing from a finite number of identified, predictable
`solutions, with a reasonable expectation of success;
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`(cid:120) Known work in one field of endeavor may prompt variations of it for use in
`either the same field or a different one based on design incentives or other
`market forces if the variations would have been predictable to one of
`ordinary skill in the art; or
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`(cid:120) Some teaching, suggestion, or motivation in the prior art that would have led
`one of ordinary skill to modify the prior art reference or to combine prior art
`reference teachings to arrive at the claimed invention.
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`18.
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`I understand that when a work is available in one field of endeavor,
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`design incentives and/or other market forces, for example, can prompt variations of
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`it, either in the same field or a different one. Moreover, if a person of ordinary skill
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`can implement a predictable variation, I understand that that likely bars its
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`patentability.
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`19.
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`I understand that obviousness must be tested as of the time the
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`invention was made. I understand that the test for obviousness is what the
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`combined teachings of the prior art references would have suggested, disclosed, or
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`taught to one of ordinary skill in the art. In particular, it is my understanding that a
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`patent claim is invalid based upon obviousness if it does nothing more than
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`combine familiar elements from one or more prior art references or products
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`according to known methods to yield predictable results. For example, I understand
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`that where a technique has been used to improve one device, and a person of
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`ordinary skill in the art would have recognized that it would improve similar
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`devices in the same way, using that technique is obvious. I understand that
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`obviousness can be proved by showing that a combination of elements was
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`obvious to try, i.e.: that it does no more than yield predictable results; implements a
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`predictable variation; is no more than the predictable use of prior art elements
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`according to their established functions; or when there is design need or market
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`pressure to solve a problem and there are a finite number of identified, predictable
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`solutions. I have been further informed that when a patent claim simply arranges
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`old elements with each element performing the same function it had been known to
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`perform and yields results no more than one would expect from such an
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`arrangement, the combination is obvious.
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`20.
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`I understand that another factor to be considered is common sense.
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`For example, I understand that common sense teaches that familiar items may have
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`obvious uses beyond their primary purposes, and, in many cases, a person of
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`ordinary skill will be able to fit the teachings of multiple patents together like
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`pieces of a puzzle.
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`21.
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`I understand that the Supreme Court articulated additional guidance
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`for obviousness in its KSR decision. My understanding is that the Supreme Court
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`said that technical people of ordinary skill look for guidance in other solutions to
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`problems of a similar nature, and that the obviousness inquiry must track reality,
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`and not legal fictions. I have relied on these understandings in expressing the
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`opinions set forth below.
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`22.
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`I understand that a new use of an old product or material cannot be
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`claimed as a new product; the apparatus or system itself is old and cannot be
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`patented. I further understand that, in general, merely discovering and claiming a
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`new benefit to an old process cannot render the process newly patentable.
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`V.
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`Person of Ordinary Skill in the Art
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`23. For purposes of this declaration, I have been asked to apply the
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`Geier Declaration
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`following standard for a person of ordinary skill in the art (POSITA) of the subject
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`matter of the ’550 patent: the POSITA would have had a master’s degree in
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`electrical engineering, computer science, or a related field, plus 2-3 years of
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`experience with Universal Serial Bus (“USB”).
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`VI.
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`’550 Patent
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`A.
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`Summary
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`24. The ’550 patent relates to “[a]n adapter for providing a source of
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`power to a mobile device through an industry standard port.”1 The ’550 patent has
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`18 claims.
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`B.
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`Prosecution History
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`25. The ’550 patent issued from U.S. Patent Application No. 13/536,767,
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`which was filed on June 28, 2012. That same day, the applicant cancelled all
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`pending claims and added 18 new claims.2
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`26. On May 28, 2013, the examiner rejected all pending claims based
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`upon obviousness-type double patenting over claims 1-12 of U.S. Patent No.
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`7,986,127.3 In response, on August 7, 2013, the applicant filed a terminal
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`disclaimer.4
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`1 ’550 patent at 2:19-20.
`2 ’550 file history at 216.
`3 ’550 file history at 103-107.
`4 ’550 file history at 95-98.
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`27. On September 5, 2013, the examiner issued a notice of allowance.5
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`Before the patent issued, the applicant requested an amendment after allowance on
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`November 19, 2013, to “correct minor clerical errors” and to “correct a
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`typographical error” made to claim 27.6 The examiner approved the amendments,
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`and the ’550 patent issued on January 7, 2014.7
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`C.
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`Priority Date
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`28. The ’550 patent claims priority through a series of continuations to
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`two provisional applications: (1) U.S. Provisional Application No. 60/273,021
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`(“the ’021 provisional”), filed March 1, 2001; and (2) U.S. Provisional Application
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`No. 60/330,486 (“the ’486 provisional”), filed October 23, 2001.
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`29.
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`I have reviewed the ’021 provisional and the ’486 provisional. In my
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`opinion, the ’021 provisional does not describe the features added in claims 4-8
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`and 13-17 of the ’550 patent. Specifically, the ’021 provisional contains no
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`description for the following claim features:
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`(i)
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`(ii)
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`said current is supplied in response to an abnormal data condition on
`said USB communication path (claims 4 and 13);
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`said abnormal data condition is an abnormal data line condition on
`said D+ line and said D- line (claims 6 and 15);
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`(iii)
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`said abnormal data line condition is a logic high signal on each of said
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`5 ’550 file history at 81-84.
`6 ’550 file history at 50-60.
`7 ’550 file history at 41.
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`D+ and D- lines (claims 7 and 16); and
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`(iv) each said logic high signal is greater than 2V (claims 8 and 17).
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`30. The later-filed ’486 provisional is the first application in the priority
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`chain that potentially provides written description for these claim elements.8 Thus,
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`the earliest potential priority date for claims 4-8 and 13-17 is October 23, 2001.9
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`My analysis remains the same regardless of whether the ’550 patent’s claims are
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`entitled to a priority date of March 1, 2001 or October 23, 2001.
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`VII. Technology Background & State of the Art
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`31. As of March 2001, POSITAs were familiar with the USB
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`Implementers Forum, Inc. (“USB-IF”), which has been responsible for “the
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`advancement and adoption of Universal Serial Bus technology” since its inception
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`in 1995.10 As of December 2000, USB-IF had more than 900 member companies
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`that helped facilitate the development of USB.11
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`32. POSITAs were also familiar with the USB specification and its
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`various revisions. On September 23, 1998, USB-IF released Universal Serial Bus
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`8 ’486 provisional, at 14:9-15:17.
`9 Both grounds in this petition apply even if the claims are entitled to the March 1,
`2001 filing date.
`10 https://web.archive.org/web/20001209192500/
`http://usb.org:80/info.html
`11 https://web.archive.org/web/20001202111600/
`http://www.usb.org:80/app/db/search/contacts
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`Specification, Revision 1.1 (“USB 1.1”).12 USB 1.1 was widely adopted by
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`industry leaders and consumers. On April 27, 2000, USB-IF released USB
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`Revision 2.0 (“USB 2.0”).13 Among USB 2.0’s improvements were faster speeds
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`and additional functionality.
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`33. POSITAs also understood the architecture for a USB system.
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`Generally, a USB system includes a USB host, one or more USB devices, and a
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`USB interconnect.14 A USB host (e.g., a laptop computer system) interacts with
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`USB devices and is responsible for tasks such as (i) detecting the attachment and
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`removal of USB devices; (ii) managing control and data flow between the host and
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`USB devices; (iii) collecting status and activity statistics; and (iv) providing power
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`to attached USB devices.15 A USB device connects to the USB host, and falls into
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`one of two categories: (i) a hub, which has the ability to provide additional USB
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`attachment points, or (ii) a function, which is a device that is able to transmit or
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`receive data or control information over the USB bus (e.g., a peripheral device,
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`such as a keyboard, mouse, or mobile phone).16 A USB interconnect is the manner
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`in which USB devices are connected and communicate with the host.17 The
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`12 USB 1.1 at 1.
`13 USB 2.0 at 1.
`14 USB 2.0 at 15; USB 1.1 at 15.
`15 USB 2.0 at 24; USB 1.1 at 24.
`16 USB 2.0 at 22-24; USB 1.1 at 21-24.
`17 USB 2.0 at 15; USB 1.1 at 15.
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`following figure from USB 2.0 depicts a typical configuration of a USB host,
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`interconnect, and device(s):18
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`34. From the USB specifications, POSITAs also understood the USB
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`cable structure. As of the claimed priority date, the USB cable “consist[ed] of four
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`conductors, two power conductors, and two signal conductors.”19 The following
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`figure from USB 2.0 depicts the four wires within a USB cable.20
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`18 USB 2.0 at Figure 4-4.
`19 USB 2.0 at 86; USB 1.1 at 74.
`20 USB 2.0 at Figure 4-2.
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`VBUS and GND deliver power, and D+ and D- carry signals for communication
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`between a USB host and the connected device.21
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`35. POSITAs also understood the USB connector structure. USB 1.1 and
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`USB 2.0 specified Series “A” and Series “B” connectors.22 “Table 6-1 provides the
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`standardized contact terminating assignments by numbers and electrical value for
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`Series ‘A’ and Series ‘B’ connectors.”23
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`According to USB 1.1 and USB 2.0, “[a]ll USB devices must have the standard
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`21 USB 2.0 at 17-18; USB 1.1 at 17.
`22 USB 2.0 at 85, 94; USB 1.1 at 73, 82.
`23 USB 2.0 at 94; USB 1.1 at 82.
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`Series ‘A’ connector.”24 “The ‘B’ connector allows device vendors to provide a
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`standard detachable cable.”25
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`36. POSITAs also understood how the USB host configured a USB
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`device. For example, USB 2.0 stated that “[w]hen a USB device is attached to or
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`removed from the USB, the host uses a process known as bus enumeration to
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`identify and manage the device state changes necessary.”26 In its “Bus
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`Enumeration” section, USB 2.0 specified the bus-enumeration requirements,
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`including eight actions taken “[w]hen a USB device is attached to a powered
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`24 USB 2.0 at 85; see also USB 1.1 at 73.
`25 Id.
`26 USB 2.0 at 243.
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`port.”27
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`37. POSITAs also understood that USB 2.0 imposed current limits on
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`VBUS. For example, USB 2.0 limited a USB device’s current draw on VBUS to
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`“one unit load [i.e., 100 mA] or less until configured.”28 USB 2.0 also stated that
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`“[d]epending on the power capabilities of the port to which the device is attached,
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`a USB device may be able to draw up to five unit loads [i.e., 500 mA] from VBUS
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`after configuration.”29
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`38. POSITAs also understood that USB 2.0 imposed voltage limits on
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`VBUS. For example, USB 2.0 imposed a 5.25 V limit on the VBUS line.30
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`39. POSITAs also knew about the different signaling states on the D+ and
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`D- lines.31 Some of these states (e.g., Differential 0, Differential 1, Data J State,
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`and Data K State) transmit data while others (e.g., Single-ended 0, Single-Ended 1)
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`27 Id.
`28 USB 2.0 at 245.
`29 Id.
`30 USB 2.0 at 175, 178.
`31 USB 2.0 at 123.
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`are used as specific signaling conditions.32 Relevant here is the Single-Ended 1
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`(“SE1”) condition. USB 2.0 defined “SE1” as “a state in which both the D+ and D-
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`lines are at a voltage above VOSE1 (min), which is 0.8 V.”33 USB 2.0 also taught
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`that the low- and full-speed USB drivers “must never ‘intentionally’ generate an
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`SE1 on the bus.”34 In other words, according to USB 2.0, an abnormal data
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`condition would occur if D+ and D- were intentionally set in a high state above 0.8
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`V.
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`32 USB 2.0 at 144-146, Table 7-2.
`33 USB 2.0 at 123.
`34 USB 2.0 at 123.
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`40. Finally, POSITAs knew that the SE1 condition would be a logical
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`choice for signaling information about a device without interfering with USB
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`signaling. For example, Casebolt taught that SE1 could be used as a special
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`signaling mode. Specifically, Specifically, as shown below, the D+ and D- data
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`lines would be connected to Vcc (+5V) to signal a PS/2 adapter.35
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`35 Casebolt at FIG. 2C, 7:41-54, Table 1.
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`Indeed, knowledge of SE1 was so common that Cypress Semiconductor integrated
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`it into their enCoRe product, stating “USB D+ and D- lines can also be used for
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`PS/2 SCLK and SDATA pins, respectively. With USB disabled, these lines can be
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`placed in a high impedance state that will pull up to VCC.”36 As yet another
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`example, Kerai used a high state on USB D+ and D- for charging.37 As shown
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`below, both USB D+ and D- (yellow) are brought to a high state in cooperation
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`with the charging system (green) for a special charging mode.
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`36 Cypress datasheet at 21, 22, 24, 25, 41.
`37 Kerai at FIG. 3.
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`Therefore, a POSITA would have understood that a high state on USB D+ and D-
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`lines could be used in a variety of contexts, including PS/2 (e.g., Casebolt’s PS/2
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`adapter), standard USB (e.g., the keyboard in Shiga), and others (e.g., Kerai’s
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`charging scheme) and was not restricted to a single application.
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`VIII. Claim Construction
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`41. For purposes of this proceeding, in which I understand the standard
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`for claim construction is the broadest reasonable interpretation (BRI) standard, I
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`have been asked to apply the interpretation of the claim term in the table below.
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`Claim Term
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`USB enumeration
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`Interpretation that I was asked to
`apply in this proceeding (in which the
`BRI standard applies)
`the bus-enumeration procedure specified
`in the USB 2.0 specification or an
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`earlier USB specification at the time of
`the alleged invention
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`42. For every other claim term, I have applied the plain meaning of the
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`term to persons of ordinary skill in the art.
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`IX.
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`Invalidity Opinions
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`43.
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`In my opinion, Dougherty anticipates claims 1-3, 9-12, and 18 of the
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`’550 patent (see Section A below), and the combination of Dougherty and Shiga
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`renders obvious claims 4-8 and 13-17 of the ’550 patent (see Section B below).
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`A. Dougherty anticipates claims 1-3, 9-12, and 18.
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`1.
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`Dougherty
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`44. Dougherty taught a docking station that powers a laptop over the
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`power rails of a USB interface.38 Dougherty’s Figure 1, annotated below, depicts a
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`system in which a docking station (blue) 200 powers a laptop computer (red) 100
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`via a USB cable (yellow):
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`38 Dougherty at Abstract, 2:55-58.
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`45.
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`In Figure 1, the docking station 200 connects to the laptop computer
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`100 via a standard USB communication cable 126, 138 with four conductors.39
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`Serial communication conductors 126 “allow communication between devices
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`using USB protocol.”40 The other two conductors carry power between the laptop
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`computer 100 and the docking station 200.41
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`46. Dougherty’s docking station 200 can power the laptop computer 100
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`39 Dougherty at 4:61-63.
`40 Dougherty at 4:64-65.
`41 Dougherty at 4:65-66.
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`in two scenarios. In the first scenario, the laptop computer 100 has a charged
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`battery and is in an operational state (“charged battery scenario”).42 In the second
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`scenario, the laptop computer 100 either does not have a battery (non-operational)
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`or the battery is completely discharged (“dead battery scenario”).43
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`a.
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`Dougherty’s “charged battery” scenario
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`47. Dougherty taught a four-step process by which the docking station
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`200 powers the laptop 100 when the laptop 100 has a charged battery.
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`48. First, the laptop 100 and docking station 200 perform a “handshaking
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`protocol” over the serial communication lines. Specifically, once a user connects
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`the laptop computer 100 and docking station 200, “th[e] handshaking protocol
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`between the laptop computer 100 and the docking station 200 reveals to software
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`running in the laptop computer 100 that the docking station 200 is capable of
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`providing power across the power rails 138 of the USB interface.”44
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`49. Second, “[b]ased on the handshaking between the two devices,
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`operating system software loads a driver specifically used with the docking station
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`200.”45 The driver “turns off the laptop computer’s ability to provide five volts to
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`42 Dougherty at 5:26-27.
`43 Dougherty at 6:5-10.
`44 Dougherty at 5:44-48.
`45 Dougherty at 5:53-55.
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`the power rails 138.”46 Specifically, the driver “commands the Super I/O controller
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`130 to issue a five volt shut-off command signal 148,” which “de-couples the five
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`volt input line 142 from the positive power rail 144.”47 By turning off the laptop’s
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`ability to provide power to downstream devices, “the laptop computer 100 breaks
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`with the standard USB protocol.”48
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`50. Third, “docking station dock logic 234 must establish that the laptop
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`computer to which it is docked is capable of receiving power.”49 Specifically,
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`“communication and control circuit 250 [within the docking station 200]
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`preferably communicates with reactive signaling circuit 150 [within the laptop
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`100] by serially communicating across the positive power rail 144.”50
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`46 Dougherty at 5:55-58.
`47 Dougherty at 5:60-67.
`48 Dougherty at 5:67-6:3.
`49 Dougherty at 6:13-15.
`50 Dougherty at 6:38-41.
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`51.
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`“If communication and control circuit 250 establishes positive
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`communication with reactive signaling circuit 150, the docking station 200 has
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`made a positive identification that the laptop to which it is docked is capable of
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`receiving power across the USB connection.”51 “The communication and control
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`logic 250, after positively identifying the laptop as capable of receiving power,
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`informs the voltage ramp logic 210 [in docking station 200] across the ramp signal
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`line 213 to ramp the voltage on the positive USB power rail 244, 144 up to
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`approximately 18 volts.”52
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`52. Finally, “[v]oltage ramp logic 210 [in the docking station 200], upon
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`receiving the ramp indication from the communication and control logic 250,
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`51 Dougherty at 6:32-37, 6:38-7:2.
`52 Dougherty at 7:3-7.
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`preferably ramps the voltage to 18 volts over a period of 20-50 milli-seconds.”53
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`“When the dock station 200 provides for full operation of the laptop computer 100,
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`as many as 2.5 amps of current may flow from the dock station 200 to the laptop
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`computer 100 across the USB connectors 136, 236.”54
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`b.
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`Dougherty’s “dead battery” scenario
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`53.
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`In the “dead battery” scenario, the laptop 100 and docking station 200
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`do not perform the first two steps described above.55 They perform only the third
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`and fourth steps.56 The laptop 100 and docking station 200 complete the third and
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`fo